s6ddrphy: prepare quilt

diff --git a/.gitignore b/.gitignore
index 9d2acfa3a66f1aa83de9f6f95d38c5cca8fb1ac7..15832e3347a781ac651d3a08d87fbb0a8904b02a 100644 (file)
--- a/.gitignore
+++ b/.gitignore
@@ -6,3 +6,5 @@ build/*
 tools/bin2hex
 tools/flterm
 tools/mkmmimg
+verilog/s6ddrphy/*.v
+verilog/s6ddrphy/.pc

diff --git a/verilog/s6ddrphy/README b/verilog/s6ddrphy/README
new file mode 100644 (file)
index 0000000..eddbdd0
--- /dev/null
+++ b/verilog/s6ddrphy/README
@@ -0,0 +1 @@
+The Verilog files of the Spartan-6 DDR PHY from Xilinx/Northwest Logic go here.

diff --git a/verilog/s6ddrphy/patches/s6ddrphy.diff b/verilog/s6ddrphy/patches/s6ddrphy.diff
new file mode 100644 (file)
index 0000000..e69de29

diff --git a/verilog/s6ddrphy/patches/series b/verilog/s6ddrphy/patches/series
new file mode 100644 (file)
index 0000000..dd08e5b
--- /dev/null
+++ b/verilog/s6ddrphy/patches/series
@@ -0,0 +1 @@
+s6ddrphy.diff