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Use "write_edif -pvector bra" for Xilinx EDIF files
author
Clifford Wolf
<clifford@clifford.at>
Tue, 5 Mar 2019 23:16:13 +0000
(15:16 -0800)
committer
Clifford Wolf
<clifford@clifford.at>
Tue, 5 Mar 2019 23:16:13 +0000
(15:16 -0800)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
techlibs/xilinx/synth_xilinx.cc
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diff --git
a/techlibs/xilinx/synth_xilinx.cc
b/techlibs/xilinx/synth_xilinx.cc
index 6c11d885d53a1aeedbe62c77963e95e51b1614af..3632f348f99f9cedc4066f65d2410e1370c651cd 100644
(file)
--- a/
techlibs/xilinx/synth_xilinx.cc
+++ b/
techlibs/xilinx/synth_xilinx.cc
@@
-252,7
+252,7
@@
struct SynthXilinxPass : public Pass
if (check_label(active, run_from, run_to, "edif"))
{
if (!edif_file.empty())
- Pass::call(design, stringf("write_edif %s", edif_file.c_str()));
+ Pass::call(design, stringf("write_edif
-pvector bra
%s", edif_file.c_str()));
}
if (check_label(active, run_from, run_to, "blif"))
{