m32c.c (m32c_secondary_reload_class): Allow PSI registers to be reloaded in HI classe...

* config/m32c/m32c.c (m32c_secondary_reload_class): Allow PSI
registers to be reloaded in HI classes when the target is HI.

From-SVN: r176903

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1874a3b2675037dcf3b35dd1927d15b525d51adf..371128808b3942120c3481112791d685d7829dcf 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2011-07-28  DJ Delorie  <dj@redhat.com>
+
+       * config/m32c/m32c.c (m32c_secondary_reload_class): Allow PSI
+       registers to be reloaded in HI classes when the target is HI.
+
 2011-07-28  Sebastian Pop  <sebastian.pop@amd.com>
 
        * graphite-clast-to-gimple.c: Replace v1, v2, lb, ub with

diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c
index 7c359c9ac0393b0991bec2162f5c5ace3cd97588..4ae7228f7726be03d4902e79747f80f02fcd0840 100644 (file)
--- a/gcc/config/m32c/m32c.c
+++ b/gcc/config/m32c/m32c.c
@@ -845,7 +845,7 @@ m32c_secondary_reload_class (int rclass, enum machine_mode mode, rtx x)
   if (reg_classes_intersect_p (rclass, CR_REGS)
       && GET_CODE (x) == REG
       && REGNO (x) >= SB_REGNO && REGNO (x) <= SP_REGNO)
-    return TARGET_A16 ? HI_REGS : A_REGS;
+    return (TARGET_A16 || mode == HImode) ? HI_REGS : A_REGS;
   return NO_REGS;
 }