[965] Correctly set read mask for OPCODE_SWZ in pass1.

While OPCODE_SWZ has usually been optimized away in pass0, it may still
exist if a SWZ with dst saturate was emitted in pass_fp.  Fixes an error
in oglconform fpalu.c.

diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass1.c b/src/mesa/drivers/dri/i965/brw_wm_pass1.c
index 26c044d40024fffc9bc9ca8a87e1646b3de22444..f6f3a38e9e000e57f15e535ea78390f30470d527 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm_pass1.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_pass1.c
@@ -150,6 +150,7 @@ void brw_wm_pass1( struct brw_wm_compile *c )
       case OPCODE_FLR:
       case OPCODE_FRC:
       case OPCODE_MOV:
+      case OPCODE_SWZ:
         read0 = writemask;
         break;
 
@@ -257,7 +258,6 @@ void brw_wm_pass1( struct brw_wm_compile *c )
         read0 = WRITEMASK_XYW;
         break;
 
-      case OPCODE_SWZ:
       case OPCODE_DST:
       case OPCODE_TXP:
       default: