* armemu.c (LoadSMult): Use WriteR15() to discard the least

significant bits of PC.

diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog
index 526b49d05ef7ec1f859fed18b7936aee19e1fcbd..06345b2fd7599c1684765912dd5cdac998c13750 100644 (file)
--- a/sim/arm/ChangeLog
+++ b/sim/arm/ChangeLog
@@ -1,5 +1,8 @@
 2000-07-04  Alexandre Oliva  <aoliva@redhat.com>
 
+       * armemu.c (LoadSMult): Use WriteR15() to discard the least
+       significant bits of PC.
+
        * armemu.h (WRITEDESTB): New macro.
        * armemu.c (ARMul_Emulate26, bl): Use WriteR15Branch() to
        modify PC.  Moved the existing logic...

diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c
index 2fc0eda5f573935e6b3a0b96444717ec33f9dc64..43cd6dc804463f52525e3d6ba4ec0cbb36fbd3be 100644 (file)
--- a/sim/arm/armemu.c
+++ b/sim/arm/armemu.c
@@ -3544,7 +3544,7 @@ LoadSMult (ARMul_State * state, ARMword instr,
          state->Cpsr = GETSPSR (state->Bank);
          ARMul_CPSRAltered (state);
        }
-      state->Reg[15] = PC;
+      WriteR15 (state, PC);
 #else
       if (state->Mode == USER26MODE || state->Mode == USER32MODE)
        {                       /* protect bits in user mode */
@@ -3555,8 +3555,8 @@ LoadSMult (ARMul_State * state, ARMword instr,
        }
       else
        ARMul_R15Altered (state);
-#endif
       FLUSHPIPE;
+#endif
     }
 
   if (!BIT (15) && state->Mode != USER26MODE && state->Mode != USER32MODE)