(no commit message)

diff --git a/openpower/sv/implementation.mdwn b/openpower/sv/implementation.mdwn
index a6b91bb57d788d1a1ee36ada9ce935ceb5977ad7..4ddc2090bcc8905c788afb88c0b8e967eff4053f 100644 (file)
--- a/openpower/sv/implementation.mdwn
+++ b/openpower/sv/implementation.mdwn
@@ -16,7 +16,8 @@ Links:
 * <https://bugs.libre-soc.org/show_bug.cgi?id=241> gem5 / ISACaller simulator
   - <https://bugs.libre-soc.org/show_bug.cgi?id=581> gem5 upstreaming
 * <https://bugs.libre-soc.org/show_bug.cgi?id=583> TestIssuer
-* <https://bugs.libre-soc.org/show_bug.cgi?id=587> setvl ancillary
+* <https://bugs.libre-soc.org/show_bug.cgi?id=587> setvl ancillary tasks
+ (instruction form SVL-Form, field designations, pseudocode, SPR allocation)
 
 
 # Code to convert