BITFIELD (CpuPREFETCHWT1),
BITFIELD (CpuSE1),
BITFIELD (CpuCLWB),
- BITFIELD (Cpu64),
- BITFIELD (CpuNo64),
BITFIELD (CpuMPX),
BITFIELD (CpuAVX512IFMA),
BITFIELD (CpuAVX512VBMI),
BITFIELD (CpuINVLPGB),
BITFIELD (CpuTLBSYNC),
BITFIELD (CpuSNP),
+ BITFIELD (Cpu64),
+ BITFIELD (CpuNo64),
#ifdef CpuUnused
BITFIELD (CpuUnused),
#endif
else
next = flag + 1;
- /* First we turn on everything except for cpu64. */
+ /* First we turn on everything except for cpu64, cpuno64, and - if
+ present - the padding field. */
for (i = 0; i < ARRAY_SIZE (flags); i++)
- if (flags[i].position != Cpu64)
+ if (flags[i].position < Cpu64)
flags[i].value = 1;
/* Turn off selective bits. */
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
- 1, 1, 0, 1, 1 } }
+ 1, 1, 0, 0, 0 } }
#define CPU_GENERIC32_FLAGS \
{ { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
CpuTLBSYNC,
/* SNP instructions required */
CpuSNP,
+
+ /* NOTE: These last three items need to remain last and in this order. */
+
/* 64bit support required */
Cpu64,
/* Not supported in the 64bit mode */
unsigned int cpuinvlpgb:1;
unsigned int cputlbsync:1;
unsigned int cpusnp:1;
+ /* NOTE: These last three fields need to remain last and in this order. */
unsigned int cpu64:1;
unsigned int cpuno64:1;
#ifdef CpuUnused