gallium/drivers: handle PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED query
authorBrian Paul <brianp@vmware.com>
Fri, 1 Feb 2013 18:16:54 +0000 (11:16 -0700)
committerBrian Paul <brianp@vmware.com>
Mon, 4 Feb 2013 16:33:44 +0000 (09:33 -0700)
Initially, only softpipe/llvmpipe support SQRT.

src/gallium/drivers/i915/i915_screen.c
src/gallium/drivers/nv30/nv30_screen.c
src/gallium/drivers/nv50/nv50_screen.c
src/gallium/drivers/nvc0/nvc0_screen.c
src/gallium/drivers/r300/r300_screen.c
src/gallium/drivers/r600/r600_pipe.c
src/gallium/drivers/radeonsi/radeonsi_pipe.c
src/gallium/drivers/svga/svga_screen.c

index 430987e2cd7620ac9981e28b5ca70544d1c3093e..eb96e9e13b001abadfdcbca4e1ca081f288c1efc 100644 (file)
@@ -139,6 +139,7 @@ i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_sha
       case PIPE_SHADER_CAP_MAX_PREDS:
          return 0;
       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
+      case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
          return 0;
       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
index d30ae119d6c3b903821d18ae38b82d6c2f8d6c42..caa5f8f64db81b7b133d53a0d21e75966e1a0406 100644 (file)
@@ -187,6 +187,7 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
          return 2;
       case PIPE_SHADER_CAP_MAX_PREDS:
       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
+      case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
@@ -222,6 +223,7 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
          return 16;
       case PIPE_SHADER_CAP_MAX_PREDS:
       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
+      case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
index be74350c9fd121d42e55175c7c957a2168724dea..aed1dd56eb501868127f759ba8b8a93468ffac65 100644 (file)
@@ -235,6 +235,8 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
       return nv50_screen(pscreen)->max_tls_space / ONE_TEMP_SIZE;
    case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
       return 1;
+   case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
+      return 0;
    case PIPE_SHADER_CAP_SUBROUTINES:
       return 0; /* please inline, or provide function declarations */
    case PIPE_SHADER_CAP_INTEGERS:
index acc28d1d45fbd2cf4ea301067d963e96088239fc..077f89efef9d5ceaf507bfe8c8d9858705d29800 100644 (file)
@@ -231,6 +231,8 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
       return NVC0_CAP_MAX_PROGRAM_TEMPS;
    case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
       return 1;
+   case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
+      return 0;
    case PIPE_SHADER_CAP_SUBROUTINES:
       return 1; /* but inlining everything, we need function declarations */
    case PIPE_SHADER_CAP_INTEGERS:
index 5a249ae894108ff0ff763e30a39026979414da6d..01f782c4a27c4b3be45ade4a1259d57ac217dab7 100644 (file)
@@ -226,6 +226,7 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e
            return r300screen->caps.num_tex_units;
         case PIPE_SHADER_CAP_MAX_ADDRS:
         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
+        case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
@@ -274,6 +275,7 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e
         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
+        case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
index 6255a361508ab899d3869ccc2453eaa850cb9977..1338fc127b93493742ba3e9e67035b208abbf165 100644 (file)
@@ -686,6 +686,8 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
                return 0; /* nothing uses this */
        case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
                return 1;
+       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
+               return 0;
        case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
        case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
        case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
index cebe9d37e78e61335c9778ed35b6dc729b8bc220..c88a613b8b2dfe65492be962c4886328f574d00c 100644 (file)
@@ -462,6 +462,8 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
                return 0; /* FIXME */
        case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
                return 1;
+       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
+               return 0;
        case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
        case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
        case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
index c2492f995434b326d1c0db41da8660bfd02966ce..3e71ac3c6bf145e54c51e94703df9d6ca58027f7 100644 (file)
@@ -307,6 +307,8 @@ static int svga_get_shader_param(struct pipe_screen *screen, unsigned shader, en
          return 1;
       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
          return 1;
+      case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
+         return 0;
       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
@@ -352,6 +354,8 @@ static int svga_get_shader_param(struct pipe_screen *screen, unsigned shader, en
          return 1;
       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
          return 1;
+      case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
+         return 0;
       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
          return 1;