add shiftleft and lessthan
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 14 Oct 2018 05:02:59 +0000 (06:02 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 14 Oct 2018 05:02:59 +0000 (06:02 +0100)
riscv/insns/sll.h
riscv/insns/slli.h
riscv/insns/slliw.h
riscv/insns/sllw.h
riscv/insns/slt.h
riscv/insns/slti.h
riscv/insns/sltiu.h
riscv/insns/sltu.h
riscv/sv_insn_redirect.cc
riscv/sv_insn_redirect.h

index 7db761318f576847e2421ce2fbf4fabbcd71e8a7..9b09d6e7b7838754340adf6edc48eeaf5eb91c1e 100644 (file)
@@ -1 +1 @@
-WRITE_RD(sext_xlen(RS1 << (RS2 & (xlen-1))));
+WRITE_RD(sext_xlen(rv_sl(RS1, (RS2 & (xlen-1)))));
index 26782fda3d1a00f0d44d4e17cc5f661eec055873..156d4e37b8f226879fa5e1cde9addbcf9083223c 100644 (file)
@@ -1,2 +1,2 @@
 require(SHAMT < xlen);
-WRITE_RD(sext_xlen(RS1 << SHAMT));
+WRITE_RD(sext_xlen(rv_sl(RS1, SHAMT)));
index c1fda656c25093edc5ee67b430dcf9665545ba2d..c9495ab77edbc48766fec26d53c535f1a78145bc 100644 (file)
@@ -1,2 +1,2 @@
 require_rv64;
-WRITE_RD(sext32(RS1 << SHAMT));
+WRITE_RD(sext32(rv_sl(RS1, SHAMT)));
index affe894441be2778b253a7f2ef33e764fd759468..0b25be0a4c47b9cb76d2d393c741c8314cf4f8a4 100644 (file)
@@ -1,2 +1,2 @@
 require_rv64;
-WRITE_RD(sext32(RS1 << (RS2 & 0x1F)));
+WRITE_RD(sext32(rv_sl(RS1, (RS2 & 0x1F))));
index 25ccd45ee8958be21ae69f8507705032ec9fad1b..650d333299d07fc5793fc567137850f28b65e718 100644 (file)
@@ -1 +1 @@
-WRITE_RD(sreg_t(RS1) < sreg_t(RS2));
+WRITE_RD(rv_lt(sreg_t(RS1), sreg_t(RS2)));
index 3671d2418fbbd3771f6f412cf301748a4eac2a4c..216e0eb48e5eae5e5301e96de299bedc35c275fe 100644 (file)
@@ -1 +1 @@
-WRITE_RD(sreg_t(RS1) < sreg_t(insn.i_imm()));
+WRITE_RD(rv_lt(sreg_t(RS1), sreg_t(insn.i_imm())));
index f39845713fbc80eda8acbb8ed83cb6a68b0b7f09..a74d2ad8a3ecb7558a859cdb41549d4c5cf557ee 100644 (file)
@@ -1 +1 @@
-WRITE_RD(RS1 < reg_t(insn.i_imm()));
+WRITE_RD(rv_lt(RS1, reg_t(insn.i_imm())));
index 84d97a2a3d2f89c6d3c59654cf86492b84b22cf3..bc6e9116ce4c16a4952d72ba04cb864609e93cb0 100644 (file)
@@ -1 +1 @@
-WRITE_RD(RS1 < RS2);
+WRITE_RD(rv_lt(RS1, RS2));
index 4f0a103c6def1bc7dfe3c901d56c87edb5d5d0dd..0cba560499ee10951204a71301368a85ddf1cb3d 100644 (file)
@@ -267,3 +267,18 @@ reg_t sv_proc_t::rv_xor(reg_t lhs, reg_t rhs)
     return lhs ^ rhs;
 }
 
+reg_t sv_proc_t::rv_sl(reg_t lhs, reg_t rhs)
+{
+    return lhs << rhs;
+}
+
+reg_t sv_proc_t::rv_lt(reg_t lhs, reg_t rhs)
+{
+    return lhs < rhs;
+}
+
+sreg_t sv_proc_t::rv_lt(sreg_t lhs, sreg_t rhs)
+{
+    return lhs < rhs;
+}
+
index 5aeccd150f1c713366fa8fd608f925063f422e20..b32d96f94e2617af6b393acfa0c1eb3d45ea3789 100644 (file)
@@ -104,6 +104,9 @@ public:
     reg_t rv_and(reg_t lhs, reg_t rhs);
     reg_t rv_or(reg_t lhs, reg_t rhs);
     reg_t rv_xor(reg_t lhs, reg_t rhs);
+    reg_t rv_sl(reg_t lhs, reg_t rhs);
+    reg_t rv_lt(reg_t lhs, reg_t rhs);
+    sreg_t rv_lt(sreg_t lhs, sreg_t rhs);
 
 #include "sv_insn_decl.h"
 };