{
rtx insn, tmp_reg;
- if (reg == 0)
- abort ();
+ gcc_assert (reg);
/* Before reload, allocate a temporary register for the intermediate
result. This allows the sequence to be deleted when the final
&& XEXP (XEXP (orig, 0), 0) == pic_offset_table_rtx)
return orig;
- if (reg == 0)
- abort ();
-
- if (GET_CODE (XEXP (orig, 0)) == PLUS)
- {
- base = legitimize_pic_address (XEXP (XEXP (orig, 0), 0), Pmode, reg);
- orig = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode,
- base == reg ? 0 : reg);
- }
- else
- abort ();
+ gcc_assert (reg);
+ gcc_assert (GET_CODE (XEXP (orig, 0)) == PLUS);
+
+ base = legitimize_pic_address (XEXP (XEXP (orig, 0), 0), Pmode, reg);
+ orig = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode,
+ base == reg ? 0 : reg);
if (GET_CODE (orig) == CONST_INT)
{
if (mode == GET_MODE (orig))
return orig;
- if (REGNO (orig) >= FIRST_PSEUDO_REGISTER)
- abort ();
+ gcc_assert (REGNO (orig) < FIRST_PSEUDO_REGISTER);
return gen_rtx_REG (mode, REGNO (orig));
}
if (GET_CODE (operand0) == MEM && IS_INDEX_ADDR_P (XEXP (operand0, 0)))
{
/* This is only safe up to the beginning of life analysis. */
- if (no_new_pseudos)
- abort ();
+ gcc_assert (!no_new_pseudos);
tem = copy_to_mode_reg (Pmode, XEXP (operand0, 0));
operand0 = replace_equiv_address (operand0, tem);
{
/* Save away the constant part of the expression. */
const_part = XEXP (XEXP (operand1, 0), 1);
- if (GET_CODE (const_part) != CONST_INT)
- abort ();
+ gcc_assert (GET_CODE (const_part) == CONST_INT);
/* Force the function label into memory. */
temp = force_const_mem (mode, XEXP (XEXP (operand1, 0), 0));
long i;
REAL_VALUE_TYPE d;
- if (GET_MODE (operands[1]) != SFmode)
- abort ();
+ gcc_assert (GET_MODE (operands[1]) == SFmode);
/* Translate the CONST_DOUBLE to a CONST_INT with the same target
bit pattern. */
optype1 = RNDOP;
/* Check for the cases that the operand constraints are not
- supposed to allow to happen. Abort if we get one,
- because generating code for these cases is painful. */
-
- if (optype0 != REGOP && optype1 != REGOP)
- abort ();
+ supposed to allow to happen. */
+ gcc_assert (optype0 == REGOP || optype1 == REGOP);
/* Handle auto decrementing and incrementing loads and stores
specifically, since the structure of the function doesn't work
rtx high_reg = gen_rtx_SUBREG (SImode, operands[1], 0);
operands[0] = XEXP (addr, 0);
- if (GET_CODE (operands[1]) != REG || GET_CODE (operands[0]) != REG)
- abort ();
+ gcc_assert (GET_CODE (operands[1]) == REG
+ && GET_CODE (operands[0]) == REG);
- if (!reg_overlap_mentioned_p (high_reg, addr))
- {
- /* No overlap between high target register and address
- register. (We do this in a non-obvious way to
- save a register file writeback) */
- if (GET_CODE (addr) == POST_INC)
- return "{stws|stw},ma %1,8(%0)\n\tstw %R1,-4(%0)";
- return "{stws|stw},ma %1,-8(%0)\n\tstw %R1,12(%0)";
- }
- else
- abort ();
+ gcc_assert (!reg_overlap_mentioned_p (high_reg, addr));
+
+ /* No overlap between high target register and address
+ register. (We do this in a non-obvious way to
+ save a register file writeback) */
+ if (GET_CODE (addr) == POST_INC)
+ return "{stws|stw},ma %1,8(%0)\n\tstw %R1,-4(%0)";
+ return "{stws|stw},ma %1,-8(%0)\n\tstw %R1,12(%0)";
}
else if (GET_CODE (addr) == PRE_INC || GET_CODE (addr) == PRE_DEC)
{
rtx high_reg = gen_rtx_SUBREG (SImode, operands[1], 0);
operands[0] = XEXP (addr, 0);
- if (GET_CODE (operands[1]) != REG || GET_CODE (operands[0]) != REG)
- abort ();
-
- if (!reg_overlap_mentioned_p (high_reg, addr))
- {
- /* No overlap between high target register and address
- register. (We do this in a non-obvious way to
- save a register file writeback) */
- if (GET_CODE (addr) == PRE_INC)
- return "{stws|stw},mb %1,8(%0)\n\tstw %R1,4(%0)";
- return "{stws|stw},mb %1,-8(%0)\n\tstw %R1,4(%0)";
- }
- else
- abort ();
+ gcc_assert (GET_CODE (operands[1]) == REG
+ && GET_CODE (operands[0]) == REG);
+
+ gcc_assert (!reg_overlap_mentioned_p (high_reg, addr));
+ /* No overlap between high target register and address
+ register. (We do this in a non-obvious way to save a
+ register file writeback) */
+ if (GET_CODE (addr) == PRE_INC)
+ return "{stws|stw},mb %1,8(%0)\n\tstw %R1,4(%0)";
+ return "{stws|stw},mb %1,-8(%0)\n\tstw %R1,4(%0)";
}
}
if (optype1 == MEMOP)
rtx high_reg = gen_rtx_SUBREG (SImode, operands[0], 0);
operands[1] = XEXP (addr, 0);
- if (GET_CODE (operands[0]) != REG || GET_CODE (operands[1]) != REG)
- abort ();
+ gcc_assert (GET_CODE (operands[0]) == REG
+ && GET_CODE (operands[1]) == REG);
if (!reg_overlap_mentioned_p (high_reg, addr))
{
rtx high_reg = gen_rtx_SUBREG (SImode, operands[0], 0);
operands[1] = XEXP (addr, 0);
- if (GET_CODE (operands[0]) != REG || GET_CODE (operands[1]) != REG)
- abort ();
+ gcc_assert (GET_CODE (operands[0]) == REG
+ && GET_CODE (operands[1]) == REG);
if (!reg_overlap_mentioned_p (high_reg, addr))
{
{
output_asm_insn ("fstd%F0 %1,%0", operands);
}
- else if (operands[1] == CONST0_RTX (GET_MODE (operands[0])))
+ else
{
- if (GET_CODE (operands[0]) == REG)
- {
- rtx xoperands[2];
- xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
- xoperands[0] = operands[0];
- output_asm_insn ("copy %%r0,%0\n\tcopy %%r0,%1", xoperands);
- }
+ rtx xoperands[2];
+
+ gcc_assert (operands[1] == CONST0_RTX (GET_MODE (operands[0])));
+
/* This is a pain. You have to be prepared to deal with an
arbitrary address here including pre/post increment/decrement.
so avoid this in the MD. */
- else
- abort ();
+ gcc_assert (GET_CODE (operands[0]) == REG);
+
+ xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
+ xoperands[0] = operands[0];
+ output_asm_insn ("copy %%r0,%0\n\tcopy %%r0,%1", xoperands);
}
- else abort ();
return "";
}
\f
else if (CONSTANT_P (XEXP (addr, 1)))
addr = XEXP (addr, 0);
else
- abort ();
+ gcc_unreachable ();
}
- if (GET_CODE (addr) == REG)
- return addr;
- abort ();
+ gcc_assert (GET_CODE (addr) == REG);
+ return addr;
}
/* Emit code to perform a block move.
return "";
default:
- abort ();
+ gcc_unreachable ();
}
}
return "";
default:
- abort ();
+ gcc_unreachable ();
}
}
if ((mask & (1 << ms0)) == 0)
break;
- if (ms0 != 32)
- abort ();
+ gcc_assert (ms0 == 32);
if (ls1 == 32)
{
len = ls0;
- if (len == 0)
- abort ();
+ gcc_assert (len);
operands[2] = GEN_INT (len);
return "{extru|extrw,u} %1,31,%2,%0";
if ((mask & ((unsigned HOST_WIDE_INT) 1 << ms0)) == 0)
break;
- if (ms0 != HOST_BITS_PER_WIDE_INT)
- abort ();
+ gcc_assert (ms0 == HOST_BITS_PER_WIDE_INT);
if (ls1 == HOST_BITS_PER_WIDE_INT)
{
len = ls0;
- if (len == 0)
- abort ();
+ gcc_assert (len);
operands[2] = GEN_INT (len);
return "extrd,u %1,63,%2,%0";
if ((mask & (1 << bs1)) == 0)
break;
- if (bs1 != 32 && ((unsigned HOST_WIDE_INT) 1 << bs1) <= mask)
- abort ();
+ gcc_assert (bs1 == 32 || ((unsigned HOST_WIDE_INT) 1 << bs1) > mask);
p = 31 - bs0;
len = bs1 - bs0;
if ((mask & ((unsigned HOST_WIDE_INT) 1 << bs1)) == 0)
break;
- if (bs1 != HOST_BITS_PER_WIDE_INT
- && ((unsigned HOST_WIDE_INT) 1 << bs1) <= mask)
- abort ();
+ gcc_assert (bs1 == HOST_BITS_PER_WIDE_INT
+ || ((unsigned HOST_WIDE_INT) 1 << bs1) > mask);
p = 63 - bs0;
len = bs1 - bs0;
{
rtx insn, basereg, srcreg, delta;
- if (!VAL_14_BITS_P (mod))
- abort ();
+ gcc_assert (VAL_14_BITS_P (mod));
basereg = gen_rtx_REG (Pmode, base);
srcreg = gen_rtx_REG (word_mode, reg);
attr_type = get_attr_type (insn);
- if (REG_NOTE_KIND (link) == REG_DEP_ANTI)
+ switch (REG_NOTE_KIND (link))
{
+ case REG_DEP_ANTI:
/* Anti dependency; DEP_INSN reads a register that INSN writes some
cycles later. */
/* For other anti dependencies, the cost is 0. */
return 0;
- }
- else if (REG_NOTE_KIND (link) == REG_DEP_OUTPUT)
- {
+
+ case REG_DEP_OUTPUT:
/* Output dependency; DEP_INSN writes a register that INSN writes some
cycles later. */
if (attr_type == TYPE_FPLOAD)
/* For other output dependencies, the cost is 0. */
return 0;
+
+ default:
+ gcc_unreachable ();
}
- else
- abort ();
}
/* Adjust scheduling priorities. We use this to try and keep addil
case PROCESSOR_8000: return 4;
default:
- abort ();
+ gcc_unreachable ();
}
}
case LTU:
fputs ("<<", file); break;
default:
- abort ();
+ gcc_unreachable ();
}
return;
case 'N': /* Condition, (N)egated */
case LTU:
fputs (">>=", file); break;
default:
- abort ();
+ gcc_unreachable ();
}
return;
/* For floating point comparisons. Note that the output
case ORDERED:
fputs ("?", file); break;
default:
- abort ();
+ gcc_unreachable ();
}
return;
case 'S': /* Condition, operands are (S)wapped. */
case LTU:
fputs (">>", file); break;
default:
- abort ();
+ gcc_unreachable ();
}
return;
case 'B': /* Condition, (B)oth swapped and negate. */
case LTU:
fputs ("<<=", file); break;
default:
- abort ();
+ gcc_unreachable ();
}
return;
case 'k':
- if (GET_CODE (x) == CONST_INT)
- {
- fprintf (file, HOST_WIDE_INT_PRINT_DEC, ~INTVAL (x));
- return;
- }
- abort ();
+ gcc_assert (GET_CODE (x) == CONST_INT);
+ fprintf (file, HOST_WIDE_INT_PRINT_DEC, ~INTVAL (x));
+ return;
case 'Q':
- if (GET_CODE (x) == CONST_INT)
- {
- fprintf (file, HOST_WIDE_INT_PRINT_DEC, 64 - (INTVAL (x) & 63));
- return;
- }
- abort ();
+ gcc_assert (GET_CODE (x) == CONST_INT);
+ fprintf (file, HOST_WIDE_INT_PRINT_DEC, 64 - (INTVAL (x) & 63));
+ return;
case 'L':
- if (GET_CODE (x) == CONST_INT)
- {
- fprintf (file, HOST_WIDE_INT_PRINT_DEC, 32 - (INTVAL (x) & 31));
- return;
- }
- abort ();
+ gcc_assert (GET_CODE (x) == CONST_INT);
+ fprintf (file, HOST_WIDE_INT_PRINT_DEC, 32 - (INTVAL (x) & 31));
+ return;
case 'O':
- if (GET_CODE (x) == CONST_INT && exact_log2 (INTVAL (x)) >= 0)
- {
- fprintf (file, "%d", exact_log2 (INTVAL (x)));
- return;
- }
- abort ();
+ gcc_assert (GET_CODE (x) == CONST_INT && exact_log2 (INTVAL (x)) >= 0);
+ fprintf (file, "%d", exact_log2 (INTVAL (x)));
+ return;
case 'p':
- if (GET_CODE (x) == CONST_INT)
- {
- fprintf (file, HOST_WIDE_INT_PRINT_DEC, 63 - (INTVAL (x) & 63));
- return;
- }
- abort ();
+ gcc_assert (GET_CODE (x) == CONST_INT);
+ fprintf (file, HOST_WIDE_INT_PRINT_DEC, 63 - (INTVAL (x) & 63));
+ return;
case 'P':
- if (GET_CODE (x) == CONST_INT)
- {
- fprintf (file, HOST_WIDE_INT_PRINT_DEC, 31 - (INTVAL (x) & 31));
- return;
- }
- abort ();
+ gcc_assert (GET_CODE (x) == CONST_INT);
+ fprintf (file, HOST_WIDE_INT_PRINT_DEC, 31 - (INTVAL (x) & 31));
+ return;
case 'I':
if (GET_CODE (x) == CONST_INT)
fputs ("i", file);
addresses. */
break;
default:
- abort ();
+ gcc_unreachable ();
}
if (GET_CODE (x) == REG)
{
int offset = 0; /* assembler wants -$global$ at end */
rtx base = NULL_RTX;
- if (GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF)
+ switch (GET_CODE (XEXP (XEXP (x, 0), 0)))
{
+ case SYMBOL_REF:
base = XEXP (XEXP (x, 0), 0);
output_addr_const (file, base);
+ break;
+ case CONST_INT:
+ offset = INTVAL (XEXP (XEXP (x, 0), 0));
+ break;
+ default:
+ gcc_unreachable ();
}
- else if (GET_CODE (XEXP (XEXP (x, 0), 0)) == CONST_INT)
- offset = INTVAL (XEXP (XEXP (x, 0), 0));
- else abort ();
- if (GET_CODE (XEXP (XEXP (x, 0), 1)) == SYMBOL_REF)
+ switch (GET_CODE (XEXP (XEXP (x, 0), 1)))
{
+ case SYMBOL_REF:
base = XEXP (XEXP (x, 0), 1);
output_addr_const (file, base);
+ break;
+ case CONST_INT:
+ offset = INTVAL (XEXP (XEXP (x, 0), 1));
+ break;
+ default:
+ gcc_unreachable ();
}
- else if (GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
- offset = INTVAL (XEXP (XEXP (x, 0), 1));
- else abort ();
/* How bogus. The compiler is apparently responsible for
rounding the constant if it uses an LR field selector.
if (round_constant)
offset = ((offset + 0x1000) & ~0x1fff);
- if (GET_CODE (XEXP (x, 0)) == PLUS)
+ switch (GET_CODE (XEXP (x, 0)))
{
+ case PLUS:
if (offset < 0)
{
offset = -offset;
}
else
sep = "+";
- }
- else if (GET_CODE (XEXP (x, 0)) == MINUS
- && (GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF))
- sep = "-";
- else abort ();
+ break;
+
+ case MINUS:
+ gcc_assert (GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF);
+ sep = "-";
+ break;
+ default:
+ gcc_unreachable ();
+ }
+
if (!read_only_operand (base, VOIDmode) && !flag_pic)
fputs ("-$global$", file);
if (offset)
return;
}
- if (GET_CODE (call_insn) != CALL_INSN)
- abort ();
- for (link = CALL_INSN_FUNCTION_USAGE (call_insn); link; link = XEXP (link, 1))
+ gcc_assert (GET_CODE (call_insn) == CALL_INSN);
+ for (link = CALL_INSN_FUNCTION_USAGE (call_insn);
+ link; link = XEXP (link, 1))
{
rtx use = XEXP (link, 0);
return output_lbranch (operands[0], insn);
default:
- abort ();
+ gcc_unreachable ();
}
return buf;
}
if (dbr_sequence_length () != 0)
{
/* We can't handle a jump in the delay slot. */
- if (GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
- abort ();
+ gcc_assert (GET_CODE (NEXT_INSN (insn)) != JUMP_INSN);
final_scan_insn (NEXT_INSN (insn), asm_out_file,
optimize, 0, NULL);
break;
default:
- abort ();
+ gcc_unreachable ();
}
return buf;
}
break;
default:
- abort ();
+ gcc_unreachable ();
}
return buf;
}
if (! nullify && length == 4 && dbr_sequence_length () == 0)
nullify = forward_branch_p (insn);
- /* Handle short versions first. */
- if (length == 4 && nullify)
- return "addib,%C2,n %1,%0,%3";
- else if (length == 4 && ! nullify)
- return "addib,%C2 %1,%0,%3";
- else if (length == 8)
+ switch (length)
{
+ case 4:
+ if (nullify)
+ return "addib,%C2,n %1,%0,%3";
+ else
+ return "addib,%C2 %1,%0,%3";
+
+ case 8:
/* Handle weird backwards branch with a fulled delay slot
which is nullified. */
if (dbr_sequence_length () != 0
return "addi,%N2 %1,%0,%0\n\tb,n %3";
else
return "addi,%N2 %1,%0,%0\n\tb %3";
+
+ default:
+ gcc_unreachable ();
}
- else
- abort ();
+
}
/* Deal with gross reload from FP register case. */
else if (which_alternative == 1)
if (! nullify && length == 4 && dbr_sequence_length () == 0)
nullify = forward_branch_p (insn);
- /* Handle short versions first. */
- if (length == 4 && nullify)
- return "movb,%C2,n %1,%0,%3";
- else if (length == 4 && ! nullify)
- return "movb,%C2 %1,%0,%3";
- else if (length == 8)
+ switch (length)
{
+ case 4:
+ if (nullify)
+ return "movb,%C2,n %1,%0,%3";
+ else
+ return "movb,%C2 %1,%0,%3";
+
+ case 8:
/* Handle weird backwards branch with a filled delay slot
which is nullified. */
if (dbr_sequence_length () != 0
return "or,%N2 %1,%%r0,%0\n\tb,n %3";
else
return "or,%N2 %1,%%r0,%0\n\tb %3";
+
+ default:
+ gcc_unreachable ();
}
- else
- abort ();
}
/* Deal with gross reload from FP register case. */
else if (which_alternative == 1)
return "";
/* A sibcall should never have a branch in the delay slot. */
- if (sibcall)
- abort ();
+ gcc_assert (!sibcall);
/* This call has an unconditional jump in its delay slot. */
xoperands[0] = XEXP (PATTERN (NEXT_INSN (insn)), 1);
"!is_function_label_plus_const (operands[2])"
"*
{
- if (flag_pic && symbolic_operand (operands[2], Pmode))
- abort ();
- else if (symbolic_operand (operands[2], Pmode))
+ gcc_assert (!flag_pic || !symbolic_operand (operands[2], Pmode));
+
+ if (symbolic_operand (operands[2], Pmode))
return \"ldo RR'%G2(%1),%0\";
else
return \"ldo R'%G2(%1),%0\";
rtx op0 = operands[0];
rtx op1 = operands[1];
- if (GET_CODE (op1) == CONST_INT)
+ switch (GET_CODE (op1))
{
+ case CONST_INT:
operands[0] = operand_subword (op0, 1, 0, DImode);
output_asm_insn (\"ldil L'%1,%0\", operands);
output_asm_insn (\"ldi -1,%0\", operands);
else
output_asm_insn (\"ldi 0,%0\", operands);
- return \"\";
- }
- else if (GET_CODE (op1) == CONST_DOUBLE)
- {
+ break;
+
+ case CONST_DOUBLE:
operands[0] = operand_subword (op0, 1, 0, DImode);
operands[1] = GEN_INT (CONST_DOUBLE_LOW (op1));
output_asm_insn (\"ldil L'%1,%0\", operands);
operands[0] = operand_subword (op0, 0, 0, DImode);
operands[1] = GEN_INT (CONST_DOUBLE_HIGH (op1));
output_asm_insn (singlemove_string (operands), operands);
- return \"\";
+ break;
+
+ default:
+ gcc_unreachable ();
}
- else
- abort ();
+ return \"\";
}"
[(set_attr "type" "move")
(set_attr "length" "8")])
the only method that we have for doing DImode multiplication
is with a libcall. This could be trouble if we haven't
allocated enough space for the outgoing arguments. */
- if (INTVAL (nb) > current_function_outgoing_args_size)
- abort ();
+ gcc_assert (INTVAL (nb) <= current_function_outgoing_args_size);
emit_move_insn (arg_pointer_rtx,
gen_rtx_PLUS (word_mode, stack_pointer_rtx,
the only method that we have for doing DImode multiplication
is with a libcall. This could be trouble if we haven't
allocated enough space for the outgoing arguments. */
- if (INTVAL (nb) > current_function_outgoing_args_size)
- abort ();
+ gcc_assert (INTVAL (nb) <= current_function_outgoing_args_size);
emit_move_insn (arg_pointer_rtx,
gen_rtx_PLUS (word_mode, stack_pointer_rtx,
the only method that we have for doing DImode multiplication
is with a libcall. This could be trouble if we haven't
allocated enough space for the outgoing arguments. */
- if (INTVAL (nb) > current_function_outgoing_args_size)
- abort ();
+ gcc_assert (INTVAL (nb) <= current_function_outgoing_args_size);
emit_move_insn (arg_pointer_rtx,
gen_rtx_PLUS (word_mode, stack_pointer_rtx,
the only method that we have for doing DImode multiplication
is with a libcall. This could be trouble if we haven't
allocated enough space for the outgoing arguments. */
- if (INTVAL (nb) > current_function_outgoing_args_size)
- abort ();
+ gcc_assert (INTVAL (nb) <= current_function_outgoing_args_size);
emit_move_insn (arg_pointer_rtx,
gen_rtx_PLUS (word_mode, stack_pointer_rtx,
{
int locality = INTVAL (operands[2]);
- if (locality < 0 || locality > 3)
- abort ();
+ gcc_assert (locality >= 0 && locality <= 3);
/* Change operand[0] to a MEM as we don't have the infrastructure
to output all the supported address modes for ldw/ldd when we use
};
int read_or_write = INTVAL (operands[1]);
- if (read_or_write < 0 || read_or_write > 1)
- abort ();
+ gcc_assert (read_or_write >= 0 && read_or_write <= 1);
return instr [read_or_write];
}
};
int read_or_write = INTVAL (operands[1]);
- if ((which_alternative != 0 && which_alternative != 1)
- || (read_or_write < 0 || read_or_write > 1))
- abort ();
+ gcc_assert (which_alternative == 0 || which_alternative == 1);
+ gcc_assert (read_or_write >= 0 && read_or_write <= 1);
return instr [which_alternative][read_or_write];
}
projects / gcc.git / commitdiff