asmicon/multiplexer: correct read-to-write delay to prevent conflicts on the tag bus

diff --git a/milkymist/asmicon/multiplexer.py b/milkymist/asmicon/multiplexer.py
index f3d5ffbfd680580d7a5a6dbdefc014233f77c1e8..c9734a1fa1c4ed7304af691b27913185ca4980e5 100644 (file)
--- a/milkymist/asmicon/multiplexer.py
+++ b/milkymist/asmicon/multiplexer.py
@@ -239,7 +239,7 @@ class Multiplexer:
                
                # Control FSM
                fsm = FSM("READ", "WRITE", "REFRESH", delayed_enters=[
-                       ("RTW", "WRITE", math.ceil((self.timing_settings.CL+1)/2)),
+                       ("RTW", "WRITE", self.timing_settings.rd_delay),
                        ("WTR", "READ", self.timing_settings.tWR)
                ])
                fsm.act(fsm.READ,