freedreno/a6xx: cleanup "blit_mem"

Rename to "control_mem", and switch to using a struct to manage the
layout, rather than just ad-hoc hard-coded offsets.

For recovering from VSC stream overflow, we'll need to add more, but
best to clean it up first.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_context.c b/src/gallium/drivers/freedreno/a6xx/fd6_context.c
index d16fbea6c6c34891d3be04ec13b6a3f34a7408ef..cb848fc20fc9f73f3babdfb1d88011ff474b707b 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_context.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_context.c
@@ -52,7 +52,7 @@ fd6_context_destroy(struct pipe_context *pctx)
 
        fd_bo_del(fd6_ctx->vsc_data);
        fd_bo_del(fd6_ctx->vsc_data2);
-       fd_bo_del(fd6_ctx->blit_mem);
+       fd_bo_del(fd6_ctx->control_mem);
 
        fd_context_cleanup_common_vbos(&fd6_ctx->base);
 
@@ -124,8 +124,8 @@ fd6_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags)
                        A6XX_VSC_DATA2_PITCH * 32,
                        DRM_FREEDRENO_GEM_TYPE_KMEM, "vsc_data2");
 
-       fd6_ctx->blit_mem = fd_bo_new(screen->dev, 0x1000,
-                       DRM_FREEDRENO_GEM_TYPE_KMEM, "blit");
+       fd6_ctx->control_mem = fd_bo_new(screen->dev, 0x1000,
+                       DRM_FREEDRENO_GEM_TYPE_KMEM, "control");
 
        fd_context_setup_common_vbos(&fd6_ctx->base);
 

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_context.h b/src/gallium/drivers/freedreno/a6xx/fd6_context.h
index e033a73f3bef8a3ddc5df7cb983117727a53c303..6a49ec6b80a876830e50f520cac210c2c7217a7d 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_context.h
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_context.h
@@ -54,12 +54,10 @@ struct fd6_context {
 #define A6XX_VSC_DATA_PITCH  0x4400
 #define A6XX_VSC_DATA2_PITCH 0x10400
 
-       /* TODO not sure what this is for.. probably similar to
-        * CACHE_FLUSH_TS on kernel side, where value gets written
-        * to this address synchronized w/ 3d (ie. a way to
-        * synchronize when the CP is running far ahead)
+       /* The 'control' mem BO is used for various housekeeping
+        * functions.  See 'struct fd6_control'
         */
-       struct fd_bo *blit_mem;
+       struct fd_bo *control_mem;
        uint32_t seqno;
 
        struct u_upload_mgr *border_color_uploader;
@@ -108,6 +106,19 @@ fd6_context(struct fd_context *ctx)
 struct pipe_context *
 fd6_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags);
 
+
+/* This struct defines the layout of the fd6_context::control buffer: */
+struct fd6_control {
+       uint32_t seqno;          /* seqno for async CP_EVENT_WRITE, etc */
+       uint32_t _pad0;
+       uint32_t flush_base;     /* dummy address for VPC_SO[i].FLUSH_BASE_LO/HI */
+       uint32_t _pad1;
+};
+
+#define control_ptr(fd6_ctx, member)  \
+       (fd6_ctx)->control_mem, offsetof(struct fd6_control, member), 0, 0
+
+
 static inline void
 emit_marker6(struct fd_ringbuffer *ring, int scratch_idx)
 {

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
index e75bb369bba85b6884ffcf1d1d8431d58874d0d8..181f647a2bb2bd214b5627a0990cbb32f537b20f 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
@@ -728,7 +728,7 @@ fd6_emit_streamout(struct fd_ringbuffer *ring, struct fd6_emit *emit, struct ir3
                // TODO just give hw a dummy addr for now.. we should
                // be using this an then CP_MEM_TO_REG to set the
                // VPC_SO[i].BUFFER_OFFSET for the next draw..
-               OUT_RELOCW(ring, fd6_context(ctx)->blit_mem, 0x100, 0, 0);
+               OUT_RELOCW(ring, control_ptr(fd6_context(ctx), flush_base));
 
                emit->streamout_mask |= (1 << i);
        }
@@ -1312,7 +1312,7 @@ fd6_framebuffer_barrier(struct fd_context *ctx)
 
        OUT_PKT7(ring, CP_WAIT_REG_MEM, 6);
        OUT_RING(ring, 0x00000013);
-       OUT_RELOC(ring, fd6_ctx->blit_mem, 0, 0, 0);
+       OUT_RELOC(ring, control_ptr(fd6_ctx, seqno));
        OUT_RING(ring, seqno);
        OUT_RING(ring, 0xffffffff);
        OUT_RING(ring, 0x00000010);
@@ -1326,7 +1326,7 @@ fd6_framebuffer_barrier(struct fd_context *ctx)
 
        OUT_PKT7(ring, CP_UNK_A6XX_14, 4);
        OUT_RING(ring, 0x00000000);
-       OUT_RELOC(ring, fd6_ctx->blit_mem, 0, 0, 0);
+       OUT_RELOC(ring, control_ptr(fd6_ctx, seqno));
        OUT_RING(ring, seqno);
 }
 

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
index ba44904ce4bd9ba3b23ea874a2cc3aa8ca03cca2..46a9ca8214993b46d57dc02131f238b7ff139a6d 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
@@ -136,7 +136,7 @@ fd6_event_write(struct fd_batch *batch, struct fd_ringbuffer *ring,
        if (timestamp) {
                struct fd6_context *fd6_ctx = fd6_context(batch->ctx);
                seqno = ++fd6_ctx->seqno;
-               OUT_RELOCW(ring, fd6_ctx->blit_mem, 0, 0, 0);  /* ADDR_LO/HI */
+               OUT_RELOCW(ring, control_ptr(fd6_ctx, seqno));  /* ADDR_LO/HI */
                OUT_RING(ring, seqno);
        }
 
@@ -159,7 +159,7 @@ fd6_cache_flush(struct fd_batch *batch, struct fd_ringbuffer *ring)
 
        OUT_PKT7(ring, CP_WAIT_REG_MEM, 6);
        OUT_RING(ring, 0x00000013);
-       OUT_RELOC(ring, fd6_ctx->blit_mem, 0, 0, 0);
+       OUT_RELOC(ring, control_ptr(fd6_ctx, seqno));
        OUT_RING(ring, seqno);
        OUT_RING(ring, 0xffffffff);
        OUT_RING(ring, 0x00000010);
@@ -168,7 +168,7 @@ fd6_cache_flush(struct fd_batch *batch, struct fd_ringbuffer *ring)
 
        OUT_PKT7(ring, CP_UNK_A6XX_14, 4);
        OUT_RING(ring, 0x00000000);
-       OUT_RELOC(ring, fd6_ctx->blit_mem, 0, 0, 0);
+       OUT_RELOC(ring, control_ptr(fd6_ctx, seqno));
        OUT_RING(ring, seqno);
 }