mips-dspr2.md (mips_prepend): Mask operand 3 rather than operand 2.

gcc/
2012-02-02  Jia Liu  <proljc@gmail.com>

	* config/mips/mips-dspr2.md (mips_prepend): Mask operand 3 rather
	than operand 2.

gcc/testsuite/
	* gcc.target/mips/mips-prepend-1.c: New test.

From-SVN: r183841

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9bb55173ed3fe4199e63be8a9ae0ce87cf66cb0c..03f897f056f3aace8c63837796aa617570c5d83d 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-02-02  Jia Liu  <proljc@gmail.com>
+
+       * config/mips/mips-dspr2.md (mips_prepend): Mask operand 3 rather
+       than operand 2.
+
 2012-02-02 Jan Hubicka  <jh@suse.cz>
           Tom de Vries  <tom@codesourcery.com>
 

diff --git a/gcc/config/mips/mips-dspr2.md b/gcc/config/mips/mips-dspr2.md
index 5ae902f01652896b53374812144a72b1e4098c2d..108f51be6c0ffd1e6121242b1602669aeec61821 100644 (file)
--- a/gcc/config/mips/mips-dspr2.md
+++ b/gcc/config/mips/mips-dspr2.md
@@ -353,7 +353,7 @@
   "ISA_HAS_DSPR2"
 {
   if (INTVAL (operands[3]) & ~(unsigned HOST_WIDE_INT) 31)
-    operands[2] = GEN_INT (INTVAL (operands[2]) & 31);
+    operands[3] = GEN_INT (INTVAL (operands[3]) & 31);
   return "prepend\t%0,%z2,%3";
 }
   [(set_attr "type"    "arith")

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 2e97e5b567097449bc9a529820fa8ea24576fdca..eddd59cb96d033a9380bd84f388f2d97a33052fe 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2012-02-02  Richard Sandiford  <rdsandiford@googlemail.com>
+
+       * gcc.target/mips/mips-prepend-1.c: New test.
+
 2012-02-02 Jan Hubicka  <jh@suse.cz>
           Tom de Vries  <tom@codesourcery.com>
 

diff --git a/gcc/testsuite/gcc.target/mips/mips-prepend-1.c b/gcc/testsuite/gcc.target/mips/mips-prepend-1.c
new file mode 100644 (file)
index 0000000..126dbeb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/mips-prepend-1.c
@@ -0,0 +1,8 @@
+/* { dg-options "-mdspr2" } */
+/* { dg-final { scan-assembler "prepend\[^\n\]*,10" } } */
+
+NOMIPS16 int
+foo (int x, int y)
+{
+  return __builtin_mips_prepend (x, y, 42);
+}