adapt test_12_mr to /mrr and /mr modes, svm is gone, /mr is missing

diff --git a/src/openpower/sv/trans/test_pysvp64dis.py b/src/openpower/sv/trans/test_pysvp64dis.py
index 2c290b05c7f33a340d5004972315a5677f929a75..40ef39a522068a5f7ace818eccac82acb910c424 100644 (file)
--- a/src/openpower/sv/trans/test_pysvp64dis.py
+++ b/src/openpower/sv/trans/test_pysvp64dis.py
@@ -204,10 +204,12 @@ class SVSTATETestCase(unittest.TestCase):
                         ]
         self._do_tst(expected)
 
-    def test_12_smr_svmr(self):
+    def test_12_mr_r(self):
         expected = [
                     "sv.add./mrr/vec2 *3,*7,*11",
-                    "sv.add./svm/vec4 *3,*7,*11",
+                    "sv.add./mr/vec2 *3,*7,*11",
+                    "sv.add./mrr *3,*7,*11",
+                    "sv.add./mr *3,*7,*11",
                         ]
         self._do_tst(expected)