Neved used.
v2: gallivm: rename "pred" -> "exec_mask"
etnaviv: remove the cap
gallium: fix tgsi_instruction::Padding
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
#define LP_MAX_TGSI_IMMEDIATES 4096
-#define LP_MAX_TGSI_PREDS 16
-
#define LP_MAX_TGSI_CONSTS 4096
#define LP_MAX_TGSI_CONST_BUFFERS 16
return PIPE_MAX_CONSTANT_BUFFERS;
case PIPE_SHADER_CAP_MAX_TEMPS:
return LP_MAX_TGSI_TEMPS;
- case PIPE_SHADER_CAP_MAX_PREDS:
- return LP_MAX_TGSI_PREDS;
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 1;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
LLVMValueRef immediates[LP_MAX_INLINED_IMMEDIATES][TGSI_NUM_CHANNELS];
LLVMValueRef temps[LP_MAX_INLINED_TEMPS][TGSI_NUM_CHANNELS];
LLVMValueRef addr[LP_MAX_TGSI_ADDRS][TGSI_NUM_CHANNELS];
- LLVMValueRef preds[LP_MAX_TGSI_PREDS][TGSI_NUM_CHANNELS];
/* We allocate/use this array of temps if (1 << TGSI_FILE_TEMPORARY) is
* set in the indirect_files field.
LLVMValueRef immediates[LP_MAX_INLINED_IMMEDIATES];
LLVMValueRef temps[LP_MAX_INLINED_TEMPS];
LLVMValueRef addr[LP_MAX_TGSI_ADDRS];
- LLVMValueRef preds[LP_MAX_TGSI_PREDS];
/* We allocate/use this array of temps if (1 << TGSI_FILE_TEMPORARY) is
* set in the indirect_files field.
ptr = bld->addr[reg->Indirect.Index];
break;
- case TGSI_FILE_PREDICATE:
- ptr = bld->preds[reg->Register.Index];
- break;
-
default:
assert(0);
return;
if (!ptr)
return;
- /*
- * Predicate
- */
-
- if (inst->Instruction.Predicate) {
- LLVMValueRef pred;
-
- assert(inst->Predicate.Index < LP_MAX_TGSI_PREDS);
-
- pred = LLVMBuildLoad(builder,
- bld->preds[inst->Predicate.Index], "");
-
- /*
- * Convert the value to an integer mask.
- */
- pred = lp_build_compare(bld->bld_base.base.gallivm,
- bld->bld_base.base.type,
- PIPE_FUNC_NOTEQUAL,
- pred,
- bld->bld_base.base.zero);
-
- if (inst->Predicate.Negate) {
- pred = LLVMBuildNot(builder, pred, "");
- }
-
- pred = bld->bld_base.emit_swizzle(&bld->bld_base, pred,
- inst->Predicate.SwizzleX,
- inst->Predicate.SwizzleY,
- inst->Predicate.SwizzleZ,
- inst->Predicate.SwizzleW);
-
- if (mask) {
- mask = LLVMBuildAnd(builder, mask, pred, "");
- } else {
- mask = pred;
- }
- }
/*
* Writemask
bld->addr[idx] = lp_build_alloca(gallivm, vec_type, "");
break;
- case TGSI_FILE_PREDICATE:
- assert(idx < LP_MAX_TGSI_PREDS);
- bld->preds[idx] = lp_build_alloca(gallivm, vec_type, "");
- break;
-
case TGSI_FILE_SAMPLER_VIEW:
/*
* The target stored here MUST match whatever there actually
} else if (dst->File == TGSI_FILE_OUTPUT) {
regs = info->output;
max_regs = ARRAY_SIZE(info->output);
- } else if (dst->File == TGSI_FILE_ADDRESS ||
- dst->File == TGSI_FILE_PREDICATE) {
+ } else if (dst->File == TGSI_FILE_ADDRESS) {
continue;
} else {
assert(0);
memset(res, 0, sizeof res);
- if (!inst->Instruction.Predicate &&
- !inst->Instruction.Saturate) {
+ if (!inst->Instruction.Saturate) {
for (chan = 0; chan < 4; ++chan) {
if (dst->WriteMask & (1 << chan)) {
if (inst->Instruction.Opcode == TGSI_OPCODE_MOV) {
*/
static void lp_exec_mask_store(struct lp_exec_mask *mask,
struct lp_build_context *bld_store,
- LLVMValueRef pred,
LLVMValueRef val,
LLVMValueRef dst_ptr)
{
LLVMBuilderRef builder = mask->bld->gallivm->builder;
+ LLVMValueRef exec_mask = mask->has_mask ? mask->exec_mask : NULL;
assert(lp_check_value(bld_store->type, val));
assert(LLVMGetTypeKind(LLVMTypeOf(dst_ptr)) == LLVMPointerTypeKind);
assert(LLVMGetElementType(LLVMTypeOf(dst_ptr)) == LLVMTypeOf(val));
- /* Mix the predicate and execution mask */
- if (mask->has_mask) {
- if (pred) {
- pred = LLVMBuildAnd(builder, pred, mask->exec_mask, "");
- } else {
- pred = mask->exec_mask;
- }
- }
-
- if (pred) {
+ if (exec_mask) {
LLVMValueRef res, dst;
dst = LLVMBuildLoad(builder, dst_ptr, "");
- res = lp_build_select(bld_store, pred, val, dst);
+ res = lp_build_select(bld_store, exec_mask, val, dst);
LLVMBuildStore(builder, res, dst_ptr);
} else
LLVMBuildStore(builder, val, dst_ptr);
LLVMValueRef base_ptr,
LLVMValueRef indexes,
LLVMValueRef values,
- struct lp_exec_mask *mask,
- LLVMValueRef pred)
+ struct lp_exec_mask *mask)
{
struct gallivm_state *gallivm = bld->bld_base.base.gallivm;
LLVMBuilderRef builder = gallivm->builder;
unsigned i;
-
- /* Mix the predicate and execution mask */
- if (mask->has_mask) {
- if (pred) {
- pred = LLVMBuildAnd(builder, pred, mask->exec_mask, "");
- }
- else {
- pred = mask->exec_mask;
- }
- }
+ LLVMValueRef pred = mask->has_mask ? mask->exec_mask : NULL;
/*
* Loop over elements of index_vec, store scalar value.
*ddy = lp_build_ddy(&bld->bld_base.base, src);
}
-
-/**
- * Predicate.
- */
-static void
-emit_fetch_predicate(
- struct lp_build_tgsi_soa_context *bld,
- const struct tgsi_full_instruction *inst,
- LLVMValueRef *pred)
-{
- LLVMBuilderRef builder = bld->bld_base.base.gallivm->builder;
- unsigned index;
- unsigned char swizzles[4];
- LLVMValueRef unswizzled[4] = {NULL, NULL, NULL, NULL};
- LLVMValueRef value;
- unsigned chan;
-
- if (!inst->Instruction.Predicate) {
- TGSI_FOR_EACH_CHANNEL( chan ) {
- pred[chan] = NULL;
- }
- return;
- }
-
- swizzles[0] = inst->Predicate.SwizzleX;
- swizzles[1] = inst->Predicate.SwizzleY;
- swizzles[2] = inst->Predicate.SwizzleZ;
- swizzles[3] = inst->Predicate.SwizzleW;
-
- index = inst->Predicate.Index;
- assert(index < LP_MAX_TGSI_PREDS);
-
- TGSI_FOR_EACH_CHANNEL( chan ) {
- unsigned swizzle = swizzles[chan];
-
- /*
- * Only fetch the predicate register channels that are actually listed
- * in the swizzles
- */
- if (!unswizzled[swizzle]) {
- value = LLVMBuildLoad(builder,
- bld->preds[index][swizzle], "");
-
- /*
- * Convert the value to an integer mask.
- *
- * TODO: Short-circuit this comparison -- a D3D setp_xx instructions
- * is needlessly causing two comparisons due to storing the intermediate
- * result as float vector instead of an integer mask vector.
- */
- value = lp_build_compare(bld->bld_base.base.gallivm,
- bld->bld_base.base.type,
- PIPE_FUNC_NOTEQUAL,
- value,
- bld->bld_base.base.zero);
- if (inst->Predicate.Negate) {
- value = LLVMBuildNot(builder, value, "");
- }
-
- unswizzled[swizzle] = value;
- } else {
- value = unswizzled[swizzle];
- }
-
- pred[chan] = value;
- }
-}
-
/**
* store an array of 8 64-bit into two arrays of 8 floats
* i.e.
static void
emit_store_64bit_chan(struct lp_build_tgsi_context *bld_base,
LLVMValueRef chan_ptr, LLVMValueRef chan_ptr2,
- LLVMValueRef pred,
LLVMValueRef value)
{
struct lp_build_tgsi_soa_context * bld = lp_soa_context(bld_base);
bld_base->base.type.length),
"");
- lp_exec_mask_store(&bld->exec_mask, float_bld, pred, temp, chan_ptr);
- lp_exec_mask_store(&bld->exec_mask, float_bld, pred, temp2, chan_ptr2);
+ lp_exec_mask_store(&bld->exec_mask, float_bld, temp, chan_ptr);
+ lp_exec_mask_store(&bld->exec_mask, float_bld, temp2, chan_ptr2);
}
/**
const struct tgsi_full_instruction *inst,
unsigned index,
unsigned chan_index,
- LLVMValueRef pred,
LLVMValueRef value)
{
struct lp_build_tgsi_soa_context * bld = lp_soa_context(bld_base);
/* Scatter store values into output registers */
emit_mask_scatter(bld, outputs_array, index_vec, value,
- &bld->exec_mask, pred);
+ &bld->exec_mask);
}
else {
LLVMValueRef out_ptr = lp_get_output_ptr(bld, reg->Register.Index,
LLVMValueRef out_ptr2 = lp_get_output_ptr(bld, reg->Register.Index,
chan_index + 1);
emit_store_64bit_chan(bld_base, out_ptr, out_ptr2,
- pred, value);
+ value);
} else
- lp_exec_mask_store(&bld->exec_mask, float_bld, pred, value, out_ptr);
+ lp_exec_mask_store(&bld->exec_mask, float_bld, value, out_ptr);
}
break;
/* Scatter store values into temp registers */
emit_mask_scatter(bld, temps_array, index_vec, value,
- &bld->exec_mask, pred);
+ &bld->exec_mask);
}
else {
LLVMValueRef temp_ptr;
reg->Register.Index,
chan_index + 1);
emit_store_64bit_chan(bld_base, temp_ptr, temp_ptr2,
- pred, value);
+ value);
}
else
- lp_exec_mask_store(&bld->exec_mask, float_bld, pred, value, temp_ptr);
+ lp_exec_mask_store(&bld->exec_mask, float_bld, value, temp_ptr);
}
break;
assert(dtype == TGSI_TYPE_SIGNED);
assert(LLVMTypeOf(value) == int_bld->vec_type);
value = LLVMBuildBitCast(builder, value, int_bld->vec_type, "");
- lp_exec_mask_store(&bld->exec_mask, int_bld, pred, value,
+ lp_exec_mask_store(&bld->exec_mask, int_bld, value,
bld->addr[reg->Register.Index][chan_index]);
break;
- case TGSI_FILE_PREDICATE:
- assert(LLVMTypeOf(value) == float_bld->vec_type);
- value = LLVMBuildBitCast(builder, value, float_bld->vec_type, "");
- lp_exec_mask_store(&bld->exec_mask, float_bld, pred, value,
- bld->preds[reg->Register.Index][chan_index]);
- break;
-
default:
assert( 0 );
}
{
unsigned chan_index;
- struct lp_build_tgsi_soa_context * bld = lp_soa_context(bld_base);
enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(inst->Instruction.Opcode);
- if(info->num_dst) {
- LLVMValueRef pred[TGSI_NUM_CHANNELS];
-
- emit_fetch_predicate( bld, inst, pred );
+ if(info->num_dst) {
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) {
if (tgsi_type_is_64bit(dtype) && (chan_index == 1 || chan_index == 3))
continue;
- emit_store_chan(bld_base, inst, 0, chan_index, pred[chan_index], dst[chan_index]);
+ emit_store_chan(bld_base, inst, 0, chan_index, dst[chan_index]);
}
}
}
}
break;
- case TGSI_FILE_PREDICATE:
- assert(last < LP_MAX_TGSI_PREDS);
- for (idx = first; idx <= last; ++idx) {
- for (i = 0; i < TGSI_NUM_CHANNELS; i++)
- bld->preds[idx][i] = lp_build_alloca(gallivm, vec_type,
- "predicate");
- }
- break;
-
case TGSI_FILE_SAMPLER_VIEW:
/*
* The target stored here MUST match whatever there actually
instruction.NrTokens = 0;
instruction.Opcode = TGSI_OPCODE_MOV;
instruction.Saturate = 0;
- instruction.Predicate = 0;
instruction.NumDstRegs = 1;
instruction.NumSrcRegs = 1;
instruction.Label = 0;
static struct tgsi_instruction
tgsi_build_instruction(unsigned opcode,
unsigned saturate,
- unsigned predicate,
unsigned num_dst_regs,
unsigned num_src_regs,
struct tgsi_header *header)
instruction = tgsi_default_instruction();
instruction.Opcode = opcode;
instruction.Saturate = saturate;
- instruction.Predicate = predicate;
instruction.NumDstRegs = num_dst_regs;
instruction.NumSrcRegs = num_src_regs;
header_bodysize_grow( header );
}
-struct tgsi_instruction_predicate
-tgsi_default_instruction_predicate(void)
-{
- struct tgsi_instruction_predicate instruction_predicate;
-
- instruction_predicate.SwizzleX = TGSI_SWIZZLE_X;
- instruction_predicate.SwizzleY = TGSI_SWIZZLE_Y;
- instruction_predicate.SwizzleZ = TGSI_SWIZZLE_Z;
- instruction_predicate.SwizzleW = TGSI_SWIZZLE_W;
- instruction_predicate.Negate = 0;
- instruction_predicate.Index = 0;
- instruction_predicate.Padding = 0;
-
- return instruction_predicate;
-}
-
-static struct tgsi_instruction_predicate
-tgsi_build_instruction_predicate(int index,
- unsigned negate,
- unsigned swizzleX,
- unsigned swizzleY,
- unsigned swizzleZ,
- unsigned swizzleW,
- struct tgsi_instruction *instruction,
- struct tgsi_header *header)
-{
- struct tgsi_instruction_predicate instruction_predicate;
-
- instruction_predicate = tgsi_default_instruction_predicate();
- instruction_predicate.SwizzleX = swizzleX;
- instruction_predicate.SwizzleY = swizzleY;
- instruction_predicate.SwizzleZ = swizzleZ;
- instruction_predicate.SwizzleW = swizzleW;
- instruction_predicate.Negate = negate;
- instruction_predicate.Index = index;
-
- instruction_grow(instruction, header);
-
- return instruction_predicate;
-}
-
static struct tgsi_instruction_label
tgsi_default_instruction_label( void )
{
unsigned i;
full_instruction.Instruction = tgsi_default_instruction();
- full_instruction.Predicate = tgsi_default_instruction_predicate();
full_instruction.Label = tgsi_default_instruction_label();
full_instruction.Texture = tgsi_default_instruction_texture();
full_instruction.Memory = tgsi_default_instruction_memory();
*instruction = tgsi_build_instruction(full_inst->Instruction.Opcode,
full_inst->Instruction.Saturate,
- full_inst->Instruction.Predicate,
full_inst->Instruction.NumDstRegs,
full_inst->Instruction.NumSrcRegs,
header);
prev_token = (struct tgsi_token *) instruction;
- if (full_inst->Instruction.Predicate) {
- struct tgsi_instruction_predicate *instruction_predicate;
-
- if (maxsize <= size) {
- return 0;
- }
- instruction_predicate = (struct tgsi_instruction_predicate *)&tokens[size];
- size++;
-
- *instruction_predicate =
- tgsi_build_instruction_predicate(full_inst->Predicate.Index,
- full_inst->Predicate.Negate,
- full_inst->Predicate.SwizzleX,
- full_inst->Predicate.SwizzleY,
- full_inst->Predicate.SwizzleZ,
- full_inst->Predicate.SwizzleW,
- instruction,
- header);
- }
-
if (full_inst->Instruction.Label) {
struct tgsi_instruction_label *instruction_label;
struct tgsi_header *header,
unsigned maxsize );
-struct tgsi_instruction_predicate
-tgsi_default_instruction_predicate(void);
-
struct tgsi_full_src_register
tgsi_full_src_register_from_dst(const struct tgsi_full_dst_register *dst);
TXT( " " );
ctx->indent += info->post_indent;
- if (inst->Instruction.Predicate) {
- CHR( '(' );
-
- if (inst->Predicate.Negate)
- CHR( '!' );
-
- TXT( "PRED[" );
- SID( inst->Predicate.Index );
- CHR( ']' );
-
- if (inst->Predicate.SwizzleX != TGSI_SWIZZLE_X ||
- inst->Predicate.SwizzleY != TGSI_SWIZZLE_Y ||
- inst->Predicate.SwizzleZ != TGSI_SWIZZLE_Z ||
- inst->Predicate.SwizzleW != TGSI_SWIZZLE_W) {
- CHR( '.' );
- ENM( inst->Predicate.SwizzleX, tgsi_swizzle_names );
- ENM( inst->Predicate.SwizzleY, tgsi_swizzle_names );
- ENM( inst->Predicate.SwizzleZ, tgsi_swizzle_names );
- ENM( inst->Predicate.SwizzleW, tgsi_swizzle_names );
- }
-
- TXT( ") " );
- }
-
TXT( info->mnemonic );
if (inst->Instruction.Saturate) {
mach->ShaderType = shader_type;
mach->Addrs = &mach->Temps[TGSI_EXEC_TEMP_ADDR];
mach->MaxGeometryShaderOutputs = TGSI_MAX_TOTAL_VERTICES;
- mach->Predicates = &mach->Temps[TGSI_EXEC_TEMP_P0];
if (shader_type != PIPE_SHADER_COMPUTE) {
mach->Inputs = align_malloc(sizeof(struct tgsi_exec_vector) * PIPE_MAX_SHADER_INPUTS, 16);
}
break;
- case TGSI_FILE_PREDICATE:
- for (i = 0; i < TGSI_QUAD_SIZE; i++) {
- assert(index->i[i] >= 0 && index->i[i] < TGSI_EXEC_NUM_PREDS);
- assert(index2D->i[i] == 0);
-
- chan->u[i] = mach->Predicates[0].xyzw[swizzle].u[i];
- }
- break;
-
case TGSI_FILE_OUTPUT:
/* vertex/fragment output vars can be read too */
for (i = 0; i < TGSI_QUAD_SIZE; i++) {
uint chan_index,
enum tgsi_exec_datatype dst_datatype)
{
- uint i;
static union tgsi_exec_channel null;
union tgsi_exec_channel *dst;
union tgsi_exec_channel index2D;
- uint execmask = mach->ExecMask;
int offset = 0; /* indirection offset */
int index;
dst = &mach->Addrs[index].xyzw[chan_index];
break;
- case TGSI_FILE_PREDICATE:
- index = reg->Register.Index;
- assert(index < TGSI_EXEC_NUM_PREDS);
- dst = &mach->Predicates[index].xyzw[chan_index];
- break;
-
default:
assert( 0 );
return NULL;
}
- if (inst->Instruction.Predicate) {
- uint swizzle;
- union tgsi_exec_channel *pred;
-
- switch (chan_index) {
- case TGSI_CHAN_X:
- swizzle = inst->Predicate.SwizzleX;
- break;
- case TGSI_CHAN_Y:
- swizzle = inst->Predicate.SwizzleY;
- break;
- case TGSI_CHAN_Z:
- swizzle = inst->Predicate.SwizzleZ;
- break;
- case TGSI_CHAN_W:
- swizzle = inst->Predicate.SwizzleW;
- break;
- default:
- assert(0);
- return NULL;
- }
-
- assert(inst->Predicate.Index == 0);
-
- pred = &mach->Predicates[inst->Predicate.Index].xyzw[swizzle];
-
- if (inst->Predicate.Negate) {
- for (i = 0; i < TGSI_QUAD_SIZE; i++) {
- if (pred->u[i]) {
- execmask &= ~(1 << i);
- }
- }
- } else {
- for (i = 0; i < TGSI_QUAD_SIZE; i++) {
- if (!pred->u[i]) {
- execmask &= ~(1 << i);
- }
- }
- }
- }
-
return dst;
}
#define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 8)
#define TGSI_EXEC_NUM_ADDRS 3
-/* predicate register */
-#define TGSI_EXEC_TEMP_P0 (TGSI_EXEC_NUM_TEMPS + 11)
-#define TGSI_EXEC_NUM_PREDS 1
-
#define TGSI_EXEC_NUM_TEMP_EXTRAS 12
struct tgsi_exec_vector SystemValue[TGSI_MAX_MISC_INPUTS];
struct tgsi_exec_vector *Addrs;
- struct tgsi_exec_vector *Predicates;
struct tgsi_sampler *Sampler;
return PIPE_MAX_CONSTANT_BUFFERS;
case PIPE_SHADER_CAP_MAX_TEMPS:
return TGSI_EXEC_NUM_TEMPS;
- case PIPE_SHADER_CAP_MAX_PREDS:
- return TGSI_EXEC_NUM_PREDS;
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 1;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
memset(inst, 0, sizeof *inst);
copy_token(&inst->Instruction, &token);
- if (inst->Instruction.Predicate) {
- next_token(ctx, &inst->Predicate);
- }
-
if (inst->Instruction.Label) {
next_token( ctx, &inst->Label);
}
struct tgsi_full_instruction
{
struct tgsi_instruction Instruction;
- struct tgsi_instruction_predicate Predicate;
struct tgsi_instruction_label Label;
struct tgsi_instruction_texture Texture;
struct tgsi_instruction_memory Memory;
"SAMP",
"ADDR",
"IMM",
- "PRED",
"SV",
"RES"
};
"SAMP",
"ADDR",
"IMM",
- "PRED",
"SV",
"IMAGE",
"SVIEW",
inst = tgsi_default_full_instruction();
- /* Parse predicate.
- */
- eat_opt_white( &ctx->cur );
- if (*ctx->cur == '(') {
- uint file;
- int index;
- uint swizzle[4];
- boolean parsed_swizzle;
-
- inst.Instruction.Predicate = 1;
-
- ctx->cur++;
- if (*ctx->cur == '!') {
- ctx->cur++;
- inst.Predicate.Negate = 1;
- }
-
- if (!parse_register_1d( ctx, &file, &index ))
- return FALSE;
-
- if (parse_optional_swizzle( ctx, swizzle, &parsed_swizzle, 4 )) {
- if (parsed_swizzle) {
- inst.Predicate.SwizzleX = swizzle[0];
- inst.Predicate.SwizzleY = swizzle[1];
- inst.Predicate.SwizzleZ = swizzle[2];
- inst.Predicate.SwizzleW = swizzle[3];
- }
- }
-
- if (*ctx->cur != ')') {
- report_error( ctx, "Expected `)'" );
- return FALSE;
- }
-
- ctx->cur++;
- }
-
/* Parse instruction name.
*/
eat_opt_white( &ctx->cur );
struct tgsi_immediate imm;
union tgsi_immediate_data imm_data;
struct tgsi_instruction insn;
- struct tgsi_instruction_predicate insn_predicate;
struct tgsi_instruction_label insn_label;
struct tgsi_instruction_texture insn_texture;
struct tgsi_instruction_memory insn_memory;
#define UREG_MAX_CONSTANT_RANGE 32
#define UREG_MAX_IMMEDIATE 4096
#define UREG_MAX_ADDR 3
-#define UREG_MAX_PRED 1
#define UREG_MAX_ARRAY_TEMPS 256
struct const_decl {
unsigned properties[TGSI_PROPERTY_COUNT];
unsigned nr_addrs;
- unsigned nr_preds;
unsigned nr_instructions;
struct ureg_tokens domain[2];
return &ureg->domain[domain].tokens[nr];
}
+
void
ureg_property(struct ureg_program *ureg, unsigned name, unsigned value)
{
return ureg_dst_register( TGSI_FILE_ADDRESS, 0 );
}
-/* Allocate a new predicate register.
- */
-struct ureg_dst
-ureg_DECL_predicate(struct ureg_program *ureg)
-{
- if (ureg->nr_preds < UREG_MAX_PRED) {
- return ureg_dst_register(TGSI_FILE_PREDICATE, ureg->nr_preds++);
- }
-
- assert(0);
- return ureg_dst_register(TGSI_FILE_PREDICATE, 0);
-}
-
/* Allocate a new sampler.
*/
struct ureg_src ureg_DECL_sampler( struct ureg_program *ureg,
ureg_emit_insn(struct ureg_program *ureg,
unsigned opcode,
boolean saturate,
- boolean predicate,
- boolean pred_negate,
- unsigned pred_swizzle_x,
- unsigned pred_swizzle_y,
- unsigned pred_swizzle_z,
- unsigned pred_swizzle_w,
unsigned num_dst,
- unsigned num_src )
+ unsigned num_src)
{
union tgsi_any_token *out;
- uint count = predicate ? 2 : 1;
+ uint count = 1;
struct ureg_emit_insn_result result;
validate( opcode, num_dst, num_src );
result.insn_token = ureg->domain[DOMAIN_INSN].count - count;
result.extended_token = result.insn_token;
- if (predicate) {
- out[0].insn.Predicate = 1;
- out[1].insn_predicate = tgsi_default_instruction_predicate();
- out[1].insn_predicate.Negate = pred_negate;
- out[1].insn_predicate.SwizzleX = pred_swizzle_x;
- out[1].insn_predicate.SwizzleY = pred_swizzle_y;
- out[1].insn_predicate.SwizzleZ = pred_swizzle_z;
- out[1].insn_predicate.SwizzleW = pred_swizzle_w;
- }
-
ureg->nr_instructions++;
return result;
struct ureg_emit_insn_result insn;
unsigned i;
boolean saturate;
- boolean predicate;
- boolean negate = FALSE;
- unsigned swizzle[4] = { 0 };
if (nr_dst && ureg_dst_is_empty(dst[0])) {
return;
}
saturate = nr_dst ? dst[0].Saturate : FALSE;
- predicate = nr_dst ? dst[0].Predicate : FALSE;
- if (predicate) {
- negate = dst[0].PredNegate;
- swizzle[0] = dst[0].PredSwizzleX;
- swizzle[1] = dst[0].PredSwizzleY;
- swizzle[2] = dst[0].PredSwizzleZ;
- swizzle[3] = dst[0].PredSwizzleW;
- }
insn = ureg_emit_insn(ureg,
opcode,
saturate,
- predicate,
- negate,
- swizzle[0],
- swizzle[1],
- swizzle[2],
- swizzle[3],
nr_dst,
nr_src);
struct ureg_emit_insn_result insn;
unsigned i;
boolean saturate;
- boolean predicate;
- boolean negate = FALSE;
- unsigned swizzle[4] = { 0 };
if (nr_dst && ureg_dst_is_empty(dst[0])) {
return;
}
saturate = nr_dst ? dst[0].Saturate : FALSE;
- predicate = nr_dst ? dst[0].Predicate : FALSE;
- if (predicate) {
- negate = dst[0].PredNegate;
- swizzle[0] = dst[0].PredSwizzleX;
- swizzle[1] = dst[0].PredSwizzleY;
- swizzle[2] = dst[0].PredSwizzleZ;
- swizzle[3] = dst[0].PredSwizzleW;
- }
insn = ureg_emit_insn(ureg,
opcode,
saturate,
- predicate,
- negate,
- swizzle[0],
- swizzle[1],
- swizzle[2],
- swizzle[3],
nr_dst,
nr_src);
insn = ureg_emit_insn(ureg,
opcode,
FALSE,
- FALSE,
- FALSE,
- TGSI_SWIZZLE_X,
- TGSI_SWIZZLE_Y,
- TGSI_SWIZZLE_Z,
- TGSI_SWIZZLE_W,
nr_dst,
nr_src);
0, ureg->nr_addrs );
}
- if (ureg->nr_preds) {
- emit_decl_range(ureg,
- TGSI_FILE_PREDICATE,
- 0,
- ureg->nr_preds);
- }
-
for (i = 0; i < ureg->nr_immediates; i++) {
emit_immediate( ureg,
ureg->immediate[i].value.u,
unsigned DimIndirect : 1; /* BOOL */
unsigned Dimension : 1; /* BOOL */
unsigned Saturate : 1; /* BOOL */
- unsigned Predicate : 1;
- unsigned PredNegate : 1; /* BOOL */
- unsigned PredSwizzleX : 2; /* TGSI_SWIZZLE_ */
- unsigned PredSwizzleY : 2; /* TGSI_SWIZZLE_ */
- unsigned PredSwizzleZ : 2; /* TGSI_SWIZZLE_ */
- unsigned PredSwizzleW : 2; /* TGSI_SWIZZLE_ */
int Index : 16; /* SINT */
int IndirectIndex : 16; /* SINT */
unsigned IndirectFile : 4; /* TGSI_FILE_ */
struct ureg_dst
ureg_DECL_address( struct ureg_program * );
-struct ureg_dst
-ureg_DECL_predicate(struct ureg_program *);
-
/* Supply an index to the sampler declaration as this is the hook to
* the external pipe_sampler state. Users of this function probably
* don't want just any sampler, but a specific one which they've set
ureg_emit_insn(struct ureg_program *ureg,
unsigned opcode,
boolean saturate,
- boolean predicate,
- boolean pred_negate,
- unsigned pred_swizzle_x,
- unsigned pred_swizzle_y,
- unsigned pred_swizzle_z,
- unsigned pred_swizzle_w,
unsigned num_dst,
- unsigned num_src );
+ unsigned num_src);
void
ureg_emit_label(struct ureg_program *ureg,
insn = ureg_emit_insn(ureg, \
opcode, \
FALSE, \
- FALSE, \
- FALSE, \
- TGSI_SWIZZLE_X, \
- TGSI_SWIZZLE_Y, \
- TGSI_SWIZZLE_Z, \
- TGSI_SWIZZLE_W, \
0, \
0); \
ureg_fixup_insn_size( ureg, insn.insn_token ); \
insn = ureg_emit_insn(ureg, \
opcode, \
FALSE, \
- FALSE, \
- FALSE, \
- TGSI_SWIZZLE_X, \
- TGSI_SWIZZLE_Y, \
- TGSI_SWIZZLE_Z, \
- TGSI_SWIZZLE_W, \
0, \
1); \
ureg_emit_src( ureg, src ); \
insn = ureg_emit_insn(ureg, \
opcode, \
FALSE, \
- FALSE, \
- FALSE, \
- TGSI_SWIZZLE_X, \
- TGSI_SWIZZLE_Y, \
- TGSI_SWIZZLE_Z, \
- TGSI_SWIZZLE_W, \
0, \
0); \
ureg_emit_label( ureg, insn.extended_token, label_token ); \
insn = ureg_emit_insn(ureg, \
opcode, \
FALSE, \
- FALSE, \
- FALSE, \
- TGSI_SWIZZLE_X, \
- TGSI_SWIZZLE_Y, \
- TGSI_SWIZZLE_Z, \
- TGSI_SWIZZLE_W, \
0, \
1); \
ureg_emit_label( ureg, insn.extended_token, label_token ); \
insn = ureg_emit_insn(ureg, \
opcode, \
dst.Saturate, \
- dst.Predicate, \
- dst.PredNegate, \
- dst.PredSwizzleX, \
- dst.PredSwizzleY, \
- dst.PredSwizzleZ, \
- dst.PredSwizzleW, \
1, \
0); \
ureg_emit_dst( ureg, dst ); \
insn = ureg_emit_insn(ureg, \
opcode, \
dst.Saturate, \
- dst.Predicate, \
- dst.PredNegate, \
- dst.PredSwizzleX, \
- dst.PredSwizzleY, \
- dst.PredSwizzleZ, \
- dst.PredSwizzleW, \
1, \
1); \
ureg_emit_dst( ureg, dst ); \
insn = ureg_emit_insn(ureg, \
opcode, \
dst.Saturate, \
- dst.Predicate, \
- dst.PredNegate, \
- dst.PredSwizzleX, \
- dst.PredSwizzleY, \
- dst.PredSwizzleZ, \
- dst.PredSwizzleW, \
1, \
2); \
ureg_emit_dst( ureg, dst ); \
insn = ureg_emit_insn(ureg, \
opcode, \
dst.Saturate, \
- dst.Predicate, \
- dst.PredNegate, \
- dst.PredSwizzleX, \
- dst.PredSwizzleY, \
- dst.PredSwizzleZ, \
- dst.PredSwizzleW, \
1, \
2); \
ureg_emit_texture( ureg, insn.extended_token, target, 0 ); \
insn = ureg_emit_insn(ureg, \
opcode, \
dst.Saturate, \
- dst.Predicate, \
- dst.PredNegate, \
- dst.PredSwizzleX, \
- dst.PredSwizzleY, \
- dst.PredSwizzleZ, \
- dst.PredSwizzleW, \
1, \
2); \
ureg_emit_texture( ureg, insn.extended_token, target, 0 ); \
insn = ureg_emit_insn(ureg, \
opcode, \
dst.Saturate, \
- dst.Predicate, \
- dst.PredNegate, \
- dst.PredSwizzleX, \
- dst.PredSwizzleY, \
- dst.PredSwizzleZ, \
- dst.PredSwizzleW, \
1, \
3); \
ureg_emit_dst( ureg, dst ); \
insn = ureg_emit_insn(ureg, \
opcode, \
dst.Saturate, \
- dst.Predicate, \
- dst.PredNegate, \
- dst.PredSwizzleX, \
- dst.PredSwizzleY, \
- dst.PredSwizzleZ, \
- dst.PredSwizzleW, \
1, \
3); \
ureg_emit_texture( ureg, insn.extended_token, target, 0 ); \
insn = ureg_emit_insn(ureg, \
opcode, \
dst.Saturate, \
- dst.Predicate, \
- dst.PredNegate, \
- dst.PredSwizzleX, \
- dst.PredSwizzleY, \
- dst.PredSwizzleZ, \
- dst.PredSwizzleW, \
1, \
4); \
ureg_emit_texture( ureg, insn.extended_token, target, 0 ); \
insn = ureg_emit_insn(ureg, \
opcode, \
dst.Saturate, \
- dst.Predicate, \
- dst.PredNegate, \
- dst.PredSwizzleX, \
- dst.PredSwizzleY, \
- dst.PredSwizzleZ, \
- dst.PredSwizzleW, \
1, \
4); \
ureg_emit_texture( ureg, insn.extended_token, target, 0 ); \
insn = ureg_emit_insn(ureg, \
opcode, \
dst.Saturate, \
- dst.Predicate, \
- dst.PredNegate, \
- dst.PredSwizzleX, \
- dst.PredSwizzleY, \
- dst.PredSwizzleZ, \
- dst.PredSwizzleW, \
1, \
4); \
ureg_emit_dst( ureg, dst ); \
insn = ureg_emit_insn(ureg, \
opcode, \
dst.Saturate, \
- dst.Predicate, \
- dst.PredNegate, \
- dst.PredSwizzleX, \
- dst.PredSwizzleY, \
- dst.PredSwizzleZ, \
- dst.PredSwizzleW, \
1, \
5); \
ureg_emit_dst( ureg, dst ); \
insn = ureg_emit_insn(ureg, \
opcode, \
dst.Saturate, \
- dst.Predicate, \
- dst.PredNegate, \
- dst.PredSwizzleX, \
- dst.PredSwizzleY, \
- dst.PredSwizzleZ, \
- dst.PredSwizzleW, \
1, \
5); \
ureg_emit_texture( ureg, insn.extended_token, target, 0 ); \
return reg;
}
-static inline struct ureg_dst
-ureg_predicate(struct ureg_dst reg,
- boolean negate,
- unsigned swizzle_x,
- unsigned swizzle_y,
- unsigned swizzle_z,
- unsigned swizzle_w)
-{
- assert(reg.File != TGSI_FILE_NULL);
- reg.Predicate = 1;
- reg.PredNegate = negate;
- reg.PredSwizzleX = swizzle_x;
- reg.PredSwizzleY = swizzle_y;
- reg.PredSwizzleZ = swizzle_z;
- reg.PredSwizzleW = swizzle_w;
- return reg;
-}
-
static inline struct ureg_dst
ureg_dst_indirect( struct ureg_dst reg, struct ureg_src addr )
{
dst.IndirectIndex = 0;
dst.IndirectSwizzle = 0;
dst.Saturate = 0;
- dst.Predicate = 0;
- dst.PredNegate = 0;
- dst.PredSwizzleX = TGSI_SWIZZLE_X;
- dst.PredSwizzleY = TGSI_SWIZZLE_Y;
- dst.PredSwizzleZ = TGSI_SWIZZLE_Z;
- dst.PredSwizzleW = TGSI_SWIZZLE_W;
dst.Index = index;
dst.Dimension = 0;
dst.DimensionIndex = 0;
dst.IndirectIndex = src.IndirectIndex;
dst.IndirectSwizzle = src.IndirectSwizzle;
dst.Saturate = 0;
- dst.Predicate = 0;
- dst.PredNegate = 0;
- dst.PredSwizzleX = TGSI_SWIZZLE_X;
- dst.PredSwizzleY = TGSI_SWIZZLE_Y;
- dst.PredSwizzleZ = TGSI_SWIZZLE_Z;
- dst.PredSwizzleW = TGSI_SWIZZLE_W;
dst.Index = src.Index;
dst.Dimension = src.Dimension;
dst.DimensionIndex = src.DimensionIndex;
dst.IndirectIndex = 0;
dst.IndirectSwizzle = 0;
dst.Saturate = 0;
- dst.Predicate = 0;
- dst.PredNegate = 0;
- dst.PredSwizzleX = TGSI_SWIZZLE_X;
- dst.PredSwizzleY = TGSI_SWIZZLE_Y;
- dst.PredSwizzleZ = TGSI_SWIZZLE_Z;
- dst.PredSwizzleW = TGSI_SWIZZLE_W;
dst.Index = 0;
dst.Dimension = 0;
dst.DimensionIndex = 0;
to be 0.
* ``PIPE_SHADER_CAP_MAX_TEMPS``: The maximum number of temporary registers.
-* ``PIPE_SHADER_CAP_MAX_PREDS``: The maximum number of predicate registers.
* ``PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED``: Whether the continue opcode is supported.
* ``PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR``: Whether indirect addressing
of the input file is supported.
return 64; /* Max native temporaries. */
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 0; /* nothing uses this */
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 1;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
return ((is_a3xx(screen) || is_a4xx(screen) || is_a5xx(screen)) ? 4096 : 64) * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return is_ir3(screen) ? 16 : 1;
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 0; /* nothing uses this */
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 1;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
{
struct tgsi_instruction Instruction;
/*
- struct tgsi_instruction_predicate Predicate;
struct tgsi_instruction_label Label;
*/
struct tgsi_instruction_texture Texture;
return 1;
case PIPE_SHADER_CAP_MAX_TEMPS:
return 12; /* XXX: 12 -> 32 ? */
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 0;
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
return 0;
case TGSI_FILE_OUTPUT: return nv50_ir::FILE_SHADER_OUTPUT;
case TGSI_FILE_TEMPORARY: return nv50_ir::FILE_GPR;
case TGSI_FILE_ADDRESS: return nv50_ir::FILE_ADDRESS;
- case TGSI_FILE_PREDICATE: return nv50_ir::FILE_PREDICATE;
case TGSI_FILE_IMMEDIATE: return nv50_ir::FILE_IMMEDIATE;
case TGSI_FILE_SYSTEM_VALUE: return nv50_ir::FILE_SYSTEM_VALUE;
case TGSI_FILE_BUFFER: return nv50_ir::FILE_MEMORY_BUFFER;
case TGSI_FILE_ADDRESS:
case TGSI_FILE_CONSTANT:
case TGSI_FILE_IMMEDIATE:
- case TGSI_FILE_PREDICATE:
case TGSI_FILE_SAMPLER:
case TGSI_FILE_BUFFER:
break;
DataArray tData; // TGSI_FILE_TEMPORARY
DataArray lData; // TGSI_FILE_TEMPORARY, for indirect arrays
DataArray aData; // TGSI_FILE_ADDRESS
- DataArray pData; // TGSI_FILE_PREDICATE
DataArray oData; // TGSI_FILE_OUTPUT (if outputs in registers)
Value *zero;
switch (file) {
case TGSI_FILE_TEMPORARY:
return idx == 0 ? &tData : &lData;
- case TGSI_FILE_PREDICATE:
- return &pData;
case TGSI_FILE_ADDRESS:
return &aData;
case TGSI_FILE_OUTPUT:
}
} else
if (f == TGSI_FILE_TEMPORARY ||
- f == TGSI_FILE_PREDICATE ||
f == TGSI_FILE_ADDRESS ||
f == TGSI_FILE_OUTPUT) {
if (f == TGSI_FILE_TEMPORARY) {
Converter::Converter(Program *ir, const tgsi::Source *code) : BuildUtil(ir),
code(code),
tgsi(NULL),
- tData(this), lData(this), aData(this), pData(this), oData(this)
+ tData(this), lData(this), aData(this), oData(this)
{
info = code->info;
const unsigned tSize = code->fileSize(TGSI_FILE_TEMPORARY);
- const unsigned pSize = code->fileSize(TGSI_FILE_PREDICATE);
const unsigned aSize = code->fileSize(TGSI_FILE_ADDRESS);
const unsigned oSize = code->fileSize(TGSI_FILE_OUTPUT);
tData.setup(TGSI_FILE_TEMPORARY, 0, 0, tSize, 4, 4, FILE_GPR, 0);
lData.setup(TGSI_FILE_TEMPORARY, 1, 0, tSize, 4, 4, FILE_MEMORY_LOCAL, 0);
- pData.setup(TGSI_FILE_PREDICATE, 0, 0, pSize, 4, 4, FILE_PREDICATE, 0);
aData.setup(TGSI_FILE_ADDRESS, 0, 0, aSize, 4, 4, FILE_GPR, 0);
oData.setup(TGSI_FILE_OUTPUT, 0, 0, oSize, 4, 4, FILE_GPR, 0);
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return 0;
- case PIPE_SHADER_CAP_MAX_PREDS:
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
return 32;
case PIPE_SHADER_CAP_PREFERRED_IR:
return PIPE_SHADER_IR_TGSI;
- case PIPE_SHADER_CAP_MAX_PREDS:
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
return 1;
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 0;
case PIPE_SHADER_CAP_MAX_TEMPS:
return nv50_screen(pscreen)->max_tls_space / ONE_TEMP_SIZE;
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
return 1;
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 0;
case PIPE_SHADER_CAP_MAX_TEMPS:
return NVC0_CAP_MAX_PROGRAM_TEMPS;
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 1;
case PIPE_SHADER_CAP_MAX_TEMPS:
return is_r500 ? 128 : is_r400 ? 64 : 32;
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 0; /* unused */
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return r300screen->caps.num_tex_units;
return 1;
case PIPE_SHADER_CAP_MAX_TEMPS:
return 32;
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 0; /* unused */
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
return 1;
}
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return R600_MAX_USER_CONST_BUFFERS;
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 0; /* nothing uses this */
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 1;
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
R600_ERR("too many dst (%d)\n", i->Instruction.NumDstRegs);
return -EINVAL;
}
- if (i->Instruction.Predicate) {
- R600_ERR("predicate unsupported\n");
- return -EINVAL;
- }
#if 0
if (i->Instruction.Label) {
R600_ERR("label unsupported\n");
return shader != PIPE_SHADER_GEOMETRY;
/* Unsupported boolean features. */
- case PIPE_SHADER_CAP_MAX_PREDS:
case PIPE_SHADER_CAP_SUBROUTINES:
case PIPE_SHADER_CAP_SUPPORTED_IRS:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
* does it is better to defer loop unrolling to the state tracker.
*/
return 0;
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 1;
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 0;
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
case PIPE_SHADER_CAP_MAX_TEMPS:
val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, 32);
return MIN2(val, SVGA3D_TEMPREG_MAX);
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 1;
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 0;
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
return TRUE; /* XXX verify */
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 0;
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
case PIPE_SHADER_CAP_SUBROUTINES:
return 16 * 1024 * sizeof(float);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 0; /* nothing uses this */
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 0;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
return vscreen->caps.caps.v1.max_uniform_blocks;
// case PIPE_SHADER_CAP_MAX_ADDRS:
// return 1;
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 0;
case PIPE_SHADER_CAP_SUBROUTINES:
return 1;
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE,
PIPE_SHADER_CAP_MAX_CONST_BUFFERS,
PIPE_SHADER_CAP_MAX_TEMPS,
- PIPE_SHADER_CAP_MAX_PREDS,
/* boolean caps */
PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED,
PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR,
TGSI_FILE_SAMPLER,
TGSI_FILE_ADDRESS,
TGSI_FILE_IMMEDIATE,
- TGSI_FILE_PREDICATE,
TGSI_FILE_SYSTEM_VALUE,
TGSI_FILE_IMAGE,
TGSI_FILE_SAMPLER_VIEW,
* respectively. For a given operation code, those numbers are fixed and are
* present here only for convenience.
*
- * If Predicate is TRUE, tgsi_instruction_predicate token immediately follows.
- *
* Saturate controls how are final results in destination registers modified.
*/
unsigned Saturate : 1; /* BOOL */
unsigned NumDstRegs : 2; /* UINT */
unsigned NumSrcRegs : 4; /* UINT */
- unsigned Predicate : 1; /* BOOL */
unsigned Label : 1;
unsigned Texture : 1;
unsigned Memory : 1;
- unsigned Padding : 1;
+ unsigned Padding : 2;
};
/*
unsigned Padding : 6;
};
-/*
- * For SM3, the following constraint applies.
- * - Swizzle is either set to identity or replicate.
- */
-struct tgsi_instruction_predicate
-{
- int Index : 16; /* SINT */
- unsigned SwizzleX : 2; /* TGSI_SWIZZLE_x */
- unsigned SwizzleY : 2; /* TGSI_SWIZZLE_x */
- unsigned SwizzleZ : 2; /* TGSI_SWIZZLE_x */
- unsigned SwizzleW : 2; /* TGSI_SWIZZLE_x */
- unsigned Negate : 1; /* BOOL */
- unsigned Padding : 7;
-};
-
/**
* File specifies the register array to access.
*
boolean native_integers;
boolean inline_subroutines;
- boolean lower_preds;
boolean want_texcoord;
boolean shift_wpos;
boolean wpos_is_sysval;
tx->regs.a0 = ureg_DECL_temporary(tx->ureg);
}
-static inline void
-tx_pred_alloc(struct shader_translator *tx, INT idx)
-{
- assert(idx == 0);
- if (ureg_dst_is_undef(tx->regs.p))
- tx->regs.p = ureg_DECL_predicate(tx->ureg);
-}
-
/* NOTE: It's not very clear on which ps1.1-ps1.3 instructions
* the projection should be applied on the texture. It doesn't
* apply on texkill.
}
break;
case D3DSPR_PREDICATE:
- assert(!param->rel);
- tx_pred_alloc(tx, param->idx);
- src = ureg_src(tx->regs.p);
+ assert(!"D3DSPR_PREDICATE");
break;
case D3DSPR_SAMPLER:
assert(param->mod == NINED3DSPSM_NONE);
dst = tx->regs.oDepth; /* XXX: must write .z component */
break;
case D3DSPR_PREDICATE:
- assert(!param->rel);
- tx_pred_alloc(tx, param->idx);
- dst = tx->regs.p;
+ assert(!"D3DSPR_PREDICATE");
break;
case D3DSPR_TEMPFLOAT16:
DBG("unhandled D3DSPR: %u\n", param->file);
tx->native_integers = GET_SHADER_CAP(INTEGERS);
tx->inline_subroutines = !GET_SHADER_CAP(SUBROUTINES);
- tx->lower_preds = !GET_SHADER_CAP(MAX_PREDS);
tx->want_texcoord = GET_CAP(TGSI_TEXCOORD);
tx->shift_wpos = !GET_CAP(TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
tx->texcoord_sn = tx->want_texcoord ?
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