remove redundant symbols

diff --git a/openpower/sv/cookbook/pospopcnt.mdwn b/openpower/sv/cookbook/pospopcnt.mdwn
index 9a2d619f6babd5cb18964f1038ca6d2cd27e178a..9e004646385db871adb388dd31875129387044a6 100644 (file)
--- a/openpower/sv/cookbook/pospopcnt.mdwn
+++ b/openpower/sv/cookbook/pospopcnt.mdwn
@@ -26,9 +26,9 @@ A simple but still hardware-paralleliseable SVP64 assembler for
 8-bit input values (`count8safe`) is as follows:
 
 ```
-mtspr 9, 3"                # move r3 to CTR
+mtspr 9, 3                # move r3 to CTR
 # VL = MIN(CTR,MAXVL=8), Rc=1 (CR0 set if CTR ends)
-setvl 3,0,8,0,1,1"         # set MVL=8, VL=MIN(MVL,CTR)
+setvl 3,0,8,0,1,1         # set MVL=8, VL=MIN(MVL,CTR)
 # load VL bytes (update r4 addr) but compressed (dw=8)
 addi 6, 0, 0               # initialise all 64-bits of r6 to zero
 sv.lbzu/pi/dw=8 *6, 1(4)   # should be /lf here as well
@@ -61,7 +61,7 @@ Firstly the CTR (Counter) SPR is set up, and is key to looping
 as outlined further, below
 
 ```
-mtspr 9, 3"                # move r3 to CTR
+mtspr 9, 3                # move r3 to CTR
 ```
 
 The Vector Length, which is limited to 8 (MVL - Maximum
@@ -81,7 +81,7 @@ a copy of VL into a GPR.
 
 ```
 # VL = MIN(CTR,MAXVL=8)
-setvl 3,0,8,0,1,1"         # set MVL=8, VL=MIN(MVL,CTR)
+setvl 3,0,8,0,1,1         # set MVL=8, VL=MIN(MVL,CTR)
 ```
 
 ```