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diff --git a/openpower/sv/bitmanip/appendix.mdwn b/openpower/sv/bitmanip/appendix.mdwn
index 026a28179f942a318d9612e4fe7ed59e41197c61..69d33cbee15f94da1d26b8bcd4bcbdbdcc586346 100644 (file)
--- a/openpower/sv/bitmanip/appendix.mdwn
+++ b/openpower/sv/bitmanip/appendix.mdwn
@@ -25,16 +25,15 @@ of Knuth M: <https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/sv/b
 **maddx RT, RA, RB, RC** (RS=RT+VL for SVP64, RS=RT+1 for scalar)
 
     prod[0:127] = (RA) * (RB)
-    sub[0:127] = EXTZ(RC) + prod
-    RT <- sub[64:127]
-    RS <- sub[0:63]
+    sum[0:127] = EXTZ(RC) + prod
+    RT <- sum[64:127]
+    RS <- sum[0:63]
 
 **weirdaddx RT, RA, RB** (RS=RB+VL for SVP64, RS=RB+1 for scalar)
 
     cat[0:127] = (RS) || (RB)
     sum[0:127] = cat + EXTZ(RA)
-    rhi[0:63] = sum[0:63]
-    RA = rhi
+    RA = sum[0:63]
     RT = sum[64:127]
 
 These two combine as, simply:
@@ -45,9 +44,9 @@ These two combine as, simply:
     # divisor : r28.v
     # carry   : r40
     li r17, 0
-    sv.msubx r0.v, r16, r20.v, r28.v
+    sv.maddx r0.v, r16, r20.v, r28.v
     # here, RS=RB+VL, therefore again RS starts at r8.v
-    sv.weirdsubx r0.v, r17, r0.v
+    sv.weirdaddx r0.v, r17, r0.v
 
 # big integer division
 
@@ -170,8 +169,7 @@ in order to carry on the algorithm.
 
     cat[0:127] = (RS) || (RB)
     sum[0:127] = cat - EXTS(RA)
-    rhi[0:63] = sum[0:63]
-    RA = ~rhi + 1
+    RA = ~sum[0:63] + 1
     RT = sum[64:127]
 
 These two combine as, simply:
@@ -194,9 +192,8 @@ zero.
 
 See Power ISA v3.1, Book III, Appendix D, Table 13 (sheet 7 of 8), p1357.
 Proposed is the addition of `msubxd` (**DRAFT, NOT APPROVED**) which is
-not proposed for addition in `110010` because the left half is all
-`madd*`.  A corresponding `maddxd` could be added into `110010`
+in `110110`.  A corresponding `maddxd` is proposed for `110010`
 
-| 110000 | 110001  | 110010  | 110011 | 110100 | 110101 | 110110 | 110111 |
-| ------ | ------- | ------- | ------ | ------ | ------ | ------ | ------ |
-| maddhd | maddhdu | maddxd? | maddld | rsvd   | rsvd   | msubxd | rsvd   |
+| 110000 | 110001  | 110010 | 110011 | 110100 | 110101 | 110110 | 110111 |
+| ------ | ------- | ------ | ------ | ------ | ------ | ------ | ------ |
+| maddhd | maddhdu | maddxd | maddld | rsvd   | rsvd   | msubxd | rsvd   |