radeon/vce: implement VCE two pipe support

v2: rebase by Marek

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c
index c7b8952403a185664709a8989f4df11ef9f73a90..02991b2afd7a52a500048c070dd2545b4b9e4934 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vce.c
+++ b/src/gallium/drivers/radeon/radeon_vce.c
@@ -400,6 +400,8 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
                enc->use_vm = true;
        if ((rscreen->info.drm_major > 2) || (rscreen->info.drm_minor >= 42))
                enc->use_vui = true;
+       if (rscreen->info.family >= CHIP_TONGA)
+               enc->use_2p = true;
 
        enc->base = *templ;
        enc->base.context = context;
@@ -439,6 +441,9 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
        cpb_size = cpb_size * align(tmp_surf->npix_y, 16);
        cpb_size = cpb_size * 3 / 2;
        cpb_size = cpb_size * enc->cpb_num;
+       if (enc->use_2p)
+               cpb_size +=  RVCE_MAX_AUX_BUFFER_NUM *
+                       RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE;
        tmp_buf->destroy(tmp_buf);
        if (!rvid_create_buffer(enc->screen, &enc->cpb, cpb_size, PIPE_USAGE_DEFAULT)) {
                RVID_ERR("Can't create CPB buffer.\n");

diff --git a/src/gallium/drivers/radeon/radeon_vce.h b/src/gallium/drivers/radeon/radeon_vce.h
index 66c547855b1f49308d66c63f326f9b2a0a2e84b9..a8448108a55b023511cdfd8a9e6b04bb0fd502bf 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vce.h
+++ b/src/gallium/drivers/radeon/radeon_vce.h
@@ -43,6 +43,9 @@
 #define RVCE_READWRITE(buf, domain, off) rvce_add_buffer(enc, (buf), RADEON_USAGE_READWRITE, (domain), (off))
 #define RVCE_END() *begin = (&enc->cs->buf[enc->cs->cdw] - begin) * 4; }
 
+#define RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE (4096 * 16 * 2.5)
+#define RVCE_MAX_AUX_BUFFER_NUM 4
+
 struct r600_common_screen;
 
 /* driver dependent callback */
@@ -101,6 +104,7 @@ struct rvce_encoder {
        struct pipe_h264_enc_picture_desc pic;
        bool                            use_vm;
        bool                            use_vui;
+       bool                            use_2p;
 };
 
 /* CPB handling functions */

diff --git a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
index 71b5e89fd5906892e839272174ba85977a5335b1..904781525b5328ee0051f6ba7b16634314fa8635 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
+++ b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
@@ -287,6 +287,23 @@ static void encode(struct rvce_encoder *enc)
        RVCE_CS(enc->bs_size); // videoBitstreamRingSize
        RVCE_END();
 
+       if (enc->use_2p) {
+               unsigned aux_offset = enc->cpb.res->buf->size -
+                       RVCE_MAX_AUX_BUFFER_NUM * RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE;
+               RVCE_BEGIN(0x05000002); // auxiliary buffer
+               for (i = 0; i < 4; ++i) {
+                       RVCE_CS(aux_offset);
+                       aux_offset += RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE;
+               }
+               for (i = 0; i < 4; ++i)
+                       RVCE_CS(0x00000000);
+               for (i = 0; i < 4; ++i)
+                       RVCE_CS(RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE);
+               for (i = 0; i < 4; ++i)
+                       RVCE_CS(0x00000000);
+               RVCE_END();
+       }
+
        RVCE_BEGIN(0x03000001); // encode
        RVCE_CS(0x00000000); // insertHeaders
        RVCE_CS(0x00000000); // pictureStructure