intel/genxml: Make 3DSTATE_WM more consistent across gens

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>

diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
index 4a98371e6f6e25796d177e65a838e58b5c3bee1c..5921190e2bd3065b7e6034bff8f55a1288de205f 100644 (file)
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -608,7 +608,7 @@ blorp_emit_ps_config(struct blorp_batch *batch,
          wm.ThreadDispatchEnable = true;
 
       if (params->src.enabled)
-         wm.PixelShaderKillPixel = true;
+         wm.PixelShaderKillsPixel = true;
 
       if (params->dst.surf.samples > 1) {
          wm.MultisampleRasterizationMode = MSRASTMODE_ON_PATTERN;
@@ -709,7 +709,7 @@ blorp_emit_ps_config(struct blorp_batch *batch,
 
       if (params->src.enabled) {
          wm.SamplerCount = 1; /* Up to 4 samplers */
-         wm.PixelShaderKillPixel = true; /* TODO: temporarily smash on */
+         wm.PixelShaderKillsPixel = true; /* TODO: temporarily smash on */
       }
 
       if (params->dst.surf.samples > 1) {

diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index 60e403a6d34394ed848c9a9146049c71bafc9911..2d19305b74c59f6f9164db1d5ea3bee74ef462f2 100644 (file)
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -1464,12 +1464,22 @@
     <field name="Dispatch GRF Start Register For Constant/Setup Data [2]" start="128" end="134" type="uint"/>
     <field name="Maximum Number of Threads" start="185" end="191" type="uint"/>
     <field name="Legacy Diamond Line Rasterization" start="183" end="183" type="bool"/>
-    <field name="Pixel Shader Kill Pixel" start="182" end="182" type="bool"/>
+    <field name="Pixel Shader Kills Pixel" start="182" end="182" type="bool"/>
     <field name="Pixel Shader Computed Depth" start="181" end="181" type="bool"/>
     <field name="Pixel Shader Uses Source Depth" start="180" end="180" type="bool"/>
     <field name="Thread Dispatch Enable" start="179" end="179" type="bool"/>
-    <field name="Line End Cap Antialiasing Region Width" start="176" end="177" type="uint"/>
-    <field name="Line Antialiasing Region Width" start="174" end="175" type="uint"/>
+    <field name="Line End Cap Antialiasing Region Width" start="176" end="177" type="uint">
+      <value name="0.5 pixels" value="0"/>
+      <value name="1.0 pixels" value="1"/>
+      <value name="2.0 pixels" value="2"/>
+      <value name="4.0 pixels" value="3"/>
+    </field>
+    <field name="Line Antialiasing Region Width" start="174" end="175" type="uint">
+      <value name="0.5 pixels" value="0"/>
+      <value name="1.0 pixels" value="1"/>
+      <value name="2.0 pixels" value="2"/>
+      <value name="4.0 pixels" value="3"/>
+    </field>
     <field name="Polygon Stipple Enable" start="173" end="173" type="bool"/>
     <field name="Line Stipple Enable" start="171" end="171" type="bool"/>
     <field name="oMask Present to RenderTarget" start="169" end="169" type="bool"/>

diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 7ac421fed60e49d07e1825cbdef9961fff7753f8..9bb863300aa7a1cd8e1d997744d4b6642f63bea0 100644 (file)
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -1637,7 +1637,12 @@
       <value name="BACK" value="3"/>
     </field>
     <field name="Line Width" start="82" end="91" type="u3.7"/>
-    <field name="Line End Cap Antialiasing Region Width" start="80" end="81" type="uint"/>
+    <field name="Line End Cap Antialiasing Region Width" start="80" end="81" type="uint">
+      <value name="0.5 pixels" value="0"/>
+      <value name="1.0 pixels" value="1"/>
+      <value name="2.0 pixels" value="2"/>
+      <value name="4.0 pixels" value="3"/>
+    </field>
     <field name="Scissor Rectangle Enable" start="75" end="75" type="bool"/>
     <field name="Multisample Rasterization  Mode" start="72" end="73" type="uint"/>
     <field name="Last Pixel Enable" start="127" end="127" type="bool"/>
@@ -1907,7 +1912,7 @@
     <field name="Depth Buffer Resolve Enable" start="60" end="60" type="bool"/>
     <field name="Hierarchical Depth Buffer Resolve Enable" start="59" end="59" type="bool"/>
     <field name="Legacy Diamond Line Rasterization" start="58" end="58" type="bool"/>
-    <field name="Pixel Shader Kill Pixel" start="57" end="57" type="bool"/>
+    <field name="Pixel Shader Kills Pixel" start="57" end="57" type="bool"/>
     <field name="Pixel Shader Computed Depth Mode" start="55" end="56" type="uint">
       <value name="PSCDEPTH_OFF" value="0"/>
       <value name="PSCDEPTH_ON" value="1"/>
@@ -1929,7 +1934,12 @@
     <field name="Barycentric Interpolation Mode" start="43" end="48" type="uint"/>
     <field name="Pixel Shader Uses Input Coverage Mask" start="42" end="42" type="bool"/>
     <field name="Line End Cap Antialiasing Region Width" start="40" end="41" type="uint"/>
-    <field name="Line Antialiasing Region Width" start="38" end="39" type="uint"/>
+    <field name="Line Antialiasing Region Width" start="38" end="39" type="uint">
+      <value name="0.5 pixels" value="0"/>
+      <value name="1.0 pixels" value="1"/>
+      <value name="2.0 pixels" value="2"/>
+      <value name="4.0 pixels" value="3"/>
+    </field>
     <field name="Polygon Stipple Enable" start="36" end="36" type="bool"/>
     <field name="Line Stipple Enable" start="35" end="35" type="bool"/>
     <field name="Point Rasterization Rule" start="34" end="34" type="uint">

diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 2e61e7bea07ff97f2126cf77d984d5972562b184..eb00c15ae622d38e74859c4c8de4ece890c2f216 100644 (file)
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -1892,7 +1892,12 @@
       <value name="BACK" value="3"/>
     </field>
     <field name="Line Width" start="82" end="91" type="u3.7"/>
-    <field name="Line End Cap Antialiasing Region Width" start="80" end="81" type="uint"/>
+    <field name="Line End Cap Antialiasing Region Width" start="80" end="81" type="uint">
+      <value name="0.5 pixels" value="0"/>
+      <value name="1.0 pixels" value="1"/>
+      <value name="2.0 pixels" value="2"/>
+      <value name="4.0 pixels" value="3"/>
+    </field>
     <field name="Line Stipple Enable" start="78" end="78" type="bool"/>
     <field name="Scissor Rectangle Enable" start="75" end="75" type="bool"/>
     <field name="RT Independent Rasterization Enable" start="74" end="74" type="bool"/>
@@ -2180,7 +2185,7 @@
     <field name="Depth Buffer Resolve Enable" start="60" end="60" type="bool"/>
     <field name="Hierarchical Depth Buffer Resolve Enable" start="59" end="59" type="bool"/>
     <field name="Legacy Diamond Line Rasterization" start="58" end="58" type="bool"/>
-    <field name="Pixel Shader Kill Pixel" start="57" end="57" type="bool"/>
+    <field name="Pixel Shader Kills Pixel" start="57" end="57" type="bool"/>
     <field name="Pixel Shader Computed Depth Mode" start="55" end="56" type="uint">
       <value name="PSCDEPTH_OFF" value="0"/>
       <value name="PSCDEPTH_ON" value="1"/>
@@ -2202,7 +2207,12 @@
     <field name="Barycentric Interpolation Mode" start="43" end="48" type="uint"/>
     <field name="Pixel Shader Uses Input Coverage Mask" start="42" end="42" type="bool"/>
     <field name="Line End Cap Antialiasing Region Width" start="40" end="41" type="uint"/>
-    <field name="Line Antialiasing Region Width" start="38" end="39" type="uint"/>
+    <field name="Line Antialiasing Region Width" start="38" end="39" type="uint">
+      <value name="0.5 pixels" value="0"/>
+      <value name="1.0 pixels" value="1"/>
+      <value name="2.0 pixels" value="2"/>
+      <value name="4.0 pixels" value="3"/>
+    </field>
     <field name="RT Independent Rasterization Enable" start="37" end="37" type="bool"/>
     <field name="Polygon Stipple Enable" start="36" end="36" type="bool"/>
     <field name="Line Stipple Enable" start="35" end="35" type="bool"/>

diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index f4dda4e9954525e9cbf26f2d21951d4e9427bac5..3178b1d83a33d907cd718cbc121028979dae58a9 100644 (file)
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -2310,9 +2310,9 @@
     <field name="Legacy Hierarchical Depth Buffer Resolve Enable" start="59" end="59" type="bool"/>
     <field name="Legacy Diamond Line Rasterization" start="58" end="58" type="bool"/>
     <field name="Early Depth/Stencil Control" start="53" end="54" type="uint">
-      <value name="NORMAL" value="0"/>
-      <value name="PSEXEC" value="1"/>
-      <value name="PREPS" value="2"/>
+      <value name="EDSC_NORMAL" value="0"/>
+      <value name="EDSC_PSEXEC" value="1"/>
+      <value name="EDSC_PREPS" value="2"/>
     </field>
     <field name="Force Thread Dispatch Enable" start="51" end="52" type="uint">
       <value name="ForceOff" value="1"/>

diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index 58b41f71dd99245fc709fcb02a6ee05ec3e12259..3d44cdbc26ff4d5a1c78b157767530dac73dffac 100644 (file)
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -2535,9 +2535,9 @@
     <field name="Legacy Hierarchical Depth Buffer Resolve Enable" start="59" end="59" type="bool"/>
     <field name="Legacy Diamond Line Rasterization" start="58" end="58" type="bool"/>
     <field name="Early Depth/Stencil Control" start="53" end="54" type="uint">
-      <value name="NORMAL" value="0"/>
-      <value name="PSEXEC" value="1"/>
-      <value name="PREPS" value="2"/>
+      <value name="EDSC_NORMAL" value="0"/>
+      <value name="EDSC_PSEXEC" value="1"/>
+      <value name="EDSC_PREPS" value="2"/>
     </field>
     <field name="Force Thread Dispatch Enable" start="51" end="52" type="uint">
       <value name="ForceOff" value="1"/>

diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index 0c8baf6e743b4cd574106ce1967db74bedf6e471..03a29bea93169bf10d2209281eaab5aae493392c 100644 (file)
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -134,7 +134,7 @@ genX(graphics_pipeline_create)(
          wm.LineEndCapAntialiasingRegionWidth   = 0; /* 0.5 pixels */
          wm.LineAntialiasingRegionWidth         = 1; /* 1.0 pixels */
          wm.PointRasterizationRule              = RASTRULE_UPPER_RIGHT;
-         wm.PixelShaderKillPixel                = wm_prog_data->uses_kill;
+         wm.PixelShaderKillsPixel               = wm_prog_data->uses_kill;
          wm.PixelShaderComputedDepthMode        = wm_prog_data->computed_depth_mode;
          wm.PixelShaderUsesSourceDepth          = wm_prog_data->uses_src_depth;
          wm.PixelShaderUsesSourceW              = wm_prog_data->uses_src_w;

diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c
index 56eb0324b93fa22a76c73d46ab6c86487e0007bf..e668f949ba7e59118c65e0ae528d9a38daf3af78 100644 (file)
--- a/src/intel/vulkan/gen8_pipeline.c
+++ b/src/intel/vulkan/gen8_pipeline.c
@@ -94,15 +94,15 @@ genX(graphics_pipeline_create)(
       wm.StatisticsEnable                    = true;
       wm.LineEndCapAntialiasingRegionWidth   = _05pixels;
       wm.LineAntialiasingRegionWidth         = _10pixels;
-      wm.ForceThreadDispatchEnable           = NORMAL;
+      wm.ForceThreadDispatchEnable           = 0 /* Normal */;
       wm.PointRasterizationRule              = RASTRULE_UPPER_RIGHT;
 
       if (wm_prog_data && wm_prog_data->early_fragment_tests) {
-         wm.EarlyDepthStencilControl         = PREPS;
+         wm.EarlyDepthStencilControl         = EDSC_PREPS;
       } else if (wm_prog_data && wm_prog_data->has_side_effects) {
-         wm.EarlyDepthStencilControl         = PSEXEC;
+         wm.EarlyDepthStencilControl         = EDSC_PSEXEC;
       } else {
-         wm.EarlyDepthStencilControl         = NORMAL;
+         wm.EarlyDepthStencilControl         = EDSC_NORMAL;
       }
 
       wm.BarycentricInterpolationMode =