power10 on ppc32

We don't support power10 on ppc32, mainly because some instructions
have 34-bit fields for which we don't have relocations on ppc32.
If you try to assemble typical code, you'll see errors saying
"reloc ... not supported by object file format".  Also, on 32-bit
hosts with binutils configured without a 64-bit bfd, you'll see errors
saying "bignum invalid" when using large offsets.  But let's not kill
output of prefix insns entirely on 32-bit hosts.

	* config/tc-ppc.c (md_assemble): Emit prefix insn by parts when
	valueT is smaller than 64 bits.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 94c3bbb4cdd4db7099fbb5a8a0caca02506500cd..122d27fc41c5e5bf3afc85a2077b755450250ffe 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2020-09-09  Alan Modra  <amodra@gmail.com>
+
+       * config/tc-ppc.c (md_assemble): Emit prefix insn by parts when
+       valueT is smaller than 64 bits.
+
 2020-09-07  Cooper Qu  <cooper.qu@linux.alibaba.com>
 
        * config/tc-csky.c (CSKYV2_ISA_DSP): CSKY_ISA_DSPE60.

diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index 1ff1cd9eab2bd1ea1267db2f31edaf1c2a773fd3..441818215e1bd160db0fe107241283702678ecfe 100644 (file)
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -3882,7 +3882,8 @@ md_assemble (char *str)
 
   /* The prefix part of an 8-byte instruction always occupies the lower
      addressed word in a doubleword, regardless of endianness.  */
-  if (!target_big_endian && insn_length == 8)
+  if (insn_length == 8
+      && (sizeof (insn) > sizeof (valueT) || !target_big_endian))
     {
       md_number_to_chars (f, PPC_GET_PREFIX (insn), 4);
       md_number_to_chars (f + 4, PPC_GET_SUFFIX (insn), 4);