Arm: Fix thumb2 PLT branch offsets.

When I previously changed these offsets I had incorrectly used an offset of -2
for this Thumb2 PLT.  Unfortunately because we had no tests for this PLT I had
missed that the result was incorrect.

This patch fixes the offset to PC .-4 so that it correctly addresses the
previous instruction and adds a test for this PLT stub.

bfd/ChangeLog:

	* elf32-arm.c (elf32_thumb2_plt_entry): Fix PC-rel offset.

ld/ChangeLog:

	* testsuite/ld-arm/arm-elf.exp (thumb-plt): New.
	* testsuite/ld-arm/thumb-plt.d: New test.
	* testsuite/ld-arm/thumb-plt.s: New test.

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index d11421f6a2fcf7ff2fe6e350b91e4e2e98c3c229..1998e227d6da2cd9e1eb6210e029e42b839e711b 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,7 @@
+2020-04-01  Tamar Christina  <tamar.christina@arm.com>
+
+       * elf32-arm.c (elf32_thumb2_plt_entry): Fix PC-rel offset.
+
 2020-04-01  Hans-Peter Nilsson  <hp@bitrange.com>
 
        * mmo.c (mmo_scan): Create .text section only when needed, not

diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index 1ccbf143e0aea0ec5c5218285ba110ee8d06b9b0..0036ff96e593456e602c47775f1695fc0e629ea7 100644 (file)
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -2453,8 +2453,8 @@ static const bfd_vma elf32_thumb2_plt_entry [] =
   0x0c00f240,          /* movw    ip, #0xNNNN    */
   0x0c00f2c0,          /* movt    ip, #0xNNNN    */
   0xf8dc44fc,          /* add     ip, pc         */
-  0xe7fdf000           /* ldr.w   pc, [ip]       */
-                       /* b      .-2             */
+  0xe7fcf000           /* ldr.w   pc, [ip]       */
+                       /* b      .-4             */
 };
 
 /* The format of the first entry in the procedure linkage table

diff --git a/ld/ChangeLog b/ld/ChangeLog
index bf7a7eb06155aec983fe3c9f1f115c4a9ff68592..ef4045aeea9916c103f8cd2fcd0f6bf4aa79393b 100644 (file)
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,9 @@
+2020-04-01  Tamar Christina  <tamar.christina@arm.com>
+
+       * testsuite/ld-arm/arm-elf.exp (thumb-plt): New.
+       * testsuite/ld-arm/thumb-plt.d: New test.
+       * testsuite/ld-arm/thumb-plt.s: New test.
+
 2020-04-01  Hans-Peter Nilsson  <hp@bitrange.com>
 
        * testsuite/ld-scripts/defined4.d: Don't xfail mmix-*-*.

diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp
index 18177d19224f7d40c3c8832206615e758cb979af..99a313999e7327fbeb0c344af4a66d2ee73771b6 100644 (file)
--- a/ld/testsuite/ld-arm/arm-elf.exp
+++ b/ld/testsuite/ld-arm/arm-elf.exp
@@ -1268,3 +1268,5 @@ run_dump_test "non-contiguous-arm3"
 run_dump_test "non-contiguous-arm4"
 run_dump_test "non-contiguous-arm5"
 run_dump_test "non-contiguous-arm6"
+
+run_dump_test "thumb-plt"

diff --git a/ld/testsuite/ld-arm/thumb-plt.d b/ld/testsuite/ld-arm/thumb-plt.d
new file mode 100644 (file)
index 0000000..441325b
--- /dev/null
+++ b/ld/testsuite/ld-arm/thumb-plt.d
@@ -0,0 +1,34 @@
+#source: thumb-plt.s
+#name: Thumb only PLT and GOT
+#ld: -shared -e0
+#objdump: -dr
+#skip: *-*-pe *-*-wince *-*-vxworks armeb-*-* *-*-gnueabihf
+
+.*: +file format .*arm.*
+
+
+Disassembly of section \.plt:
+
+00000110 <\.plt>:
+ 110:  b500            push    {lr}
+ 112:  f8df e008       ldr.w   lr, \[pc, #8\]  ; 11c <\.plt\+0xc>
+ 116:  44fe            add     lr, pc
+ 118:  f85e ff08       ldr.w   pc, \[lr, #8\]!
+ 11c:  0001009c        \.word  0x0001009c
+
+00000120 <foo@plt>:
+ 120:  f240 0c98       movw    ip, #152        ; 0x98
+ 124:  f2c0 0c01       movt    ip, #1
+ 128:  44fc            add     ip, pc
+ 12a:  f8dc f000       ldr.w   pc, \[ip\]
+ 12e:  e7fc            b.n     12a <foo@plt\+0xa>
+
+Disassembly of section .text:
+
+00000130 <bar>:
+ 130:  b580            push    {r7, lr}
+ 132:  af00            add     r7, sp, #0
+ 134:  f7ff fff4       bl      120 <foo@plt>
+ 138:  4603            mov     r3, r0
+ 13a:  4618            mov     r0, r3
+ 13c:  bd80            pop     {r7, pc}

diff --git a/ld/testsuite/ld-arm/thumb-plt.s b/ld/testsuite/ld-arm/thumb-plt.s
new file mode 100644 (file)
index 0000000..e3fd80f
--- /dev/null
+++ b/ld/testsuite/ld-arm/thumb-plt.s
@@ -0,0 +1,18 @@
+       .cpu cortex-m3
+       .text
+       .align  1
+       .global bar
+       .arch armv7-m
+       .syntax unified
+       .thumb
+       .thumb_func
+       .fpu softvfp
+       .type   bar, %function
+bar:
+       push    {r7, lr}
+       add     r7, sp, #0
+       bl      foo(PLT)
+       mov     r3, r0
+       mov     r0, r3
+       pop     {r7, pc}
+       .size   bar, .-bar