add Common Frequent Rare to ls012

diff --git a/openpower/sv/rfc/ls012.mdwn b/openpower/sv/rfc/ls012.mdwn
index 77db7d4760358e528da4a50592f09c8b89aa9aea..4282384f1b8d255695136440b67bee04b58d7360 100644 (file)
--- a/openpower/sv/rfc/ls012.mdwn
+++ b/openpower/sv/rfc/ls012.mdwn
@@ -515,6 +515,19 @@ Sounds like an obvious question but if there is no driving need (no
 purely out of curiosity or part of a Research effort not intended for
 production then it's probably best left in the EXT022 Sandbox.
 
+**Common, Frequent, Rare**
+
+Even to the point of asking the same question about a register file,
+not just about an instruction, is the instruction (or other feature)
+intended to be:
+
+* Common   (used all of the time, typically built-in to toolchain)
+* Frequent (specialised tasks but time or resource critical)
+* Rare (when you need them you need them)
+
+A good example would be the addition of 128-bit operations, or even
+(for Elliptic Curve Cryptography - ec25519) 512-bit ALUs.
+
 **How many registers does it need?**
 
 The basic RISC Paradigm is not only to make instruction encoding simple