i965/vec4: Support arbitrarily large sampler state indices on Haswell+.

Like the scalar backend, we add an offset to the "Sampler State Pointer"
field to select a group of 16 samplers, then use the "Sampler Index"
field to select within that group.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 11f45bd92ca00850ace53cb590332586f726c2f1..0f8ebc959840c62b2449a34c06eda5e5efcc90e6 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -387,6 +387,23 @@ vec4_generator::generate_tex(vec4_instruction *inst,
             brw_MOV(p, get_element_ud(header, 2),
                     brw_imm_ud(inst->texture_offset));
          }
+
+         if (inst->sampler >= 16) {
+            /* The "Sampler Index" field can only store values between 0 and 15.
+             * However, we can add an offset to the "Sampler State Pointer"
+             * field, effectively selecting a different set of 16 samplers.
+             *
+             * The "Sampler State Pointer" needs to be aligned to a 32-byte
+             * offset, and each sampler state is only 16-bytes, so we can't
+             * exclusively use the offset - we have to use both.
+             */
+            assert(brw->is_haswell); /* field only exists on Haswell */
+            brw_ADD(p,
+                    get_element_ud(header, 3),
+                    get_element_ud(brw_vec8_grf(0, 0), 3),
+                    brw_imm_ud(16 * (inst->sampler / 16) *
+                               sizeof(gen7_sampler_state)));
+         }
          brw_pop_insn_state(p);
       }
    }
@@ -415,7 +432,7 @@ vec4_generator::generate_tex(vec4_instruction *inst,
              inst->base_mrf,
              src,
               surface_index,
-             inst->sampler,
+             inst->sampler % 16,
              msg_type,
              1, /* response length */
              inst->mlen,

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index daf46b6ab82cb0663fa3ae3c0b60b1af26090dd6..8c287c244b5528ad6aa076065885e558ae201773 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -2370,9 +2370,15 @@ vec4_visitor::visit(ir_texture *ir)
    if (ir->op == ir_tg4)
       inst->texture_offset |= gather_channel(ir, sampler) << 16;
 
-   /* Texel offsets go in the message header; Gen4 also requires headers. */
+   /* The message header is necessary for:
+    * - Gen4 (always)
+    * - Texel offsets
+    * - Gather channel selection
+    * - Sampler indices too large to fit in a 4-bit value.
+    */
    inst->header_present =
-      brw->gen < 5 || inst->texture_offset != 0 || ir->op == ir_tg4;
+      brw->gen < 5 || inst->texture_offset != 0 || ir->op == ir_tg4 ||
+      sampler >= 16;
    inst->base_mrf = 2;
    inst->mlen = inst->header_present + 1; /* always at least one */
    inst->sampler = sampler;