gas/

	* config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
	(mips_parse_argument_token, validate_micromips_insn, md_begin)
	(check_regno, match_float_constant, check_completed_insn, append_insn)
	(match_insn, match_mips16_insn, match_insns, macro_start)
	(macro_build_ldst_constoffset, load_register, macro, mips_ip)
	(mips16_ip, mips_set_option_string, md_parse_option)
	(mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
	(md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
	(s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
	(s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
	Start error messages with a lower-case letter.  Do not end error
	messages with a period.  Wrap long messages to 80 character-lines.
	Use "cannot" instead of "can't" and "can not".

gas/testsuite/
	* gas/mips/ase-errors-1.l, gas/mips/ase-errors-2.l,
	gas/mips/ase-errors-3.l, gas/mips/ase-errors-4.l, gas/mips/at-2.l,
	gas/mips/baddata1.l, gas/mips/elf-rel30.l, gas/mips/illegal.l,
	gas/mips/jalr.l, gas/mips/ldstla-32-1.l, gas/mips/ldstla-32-mips3-1.l,
	gas/mips/lui-1.l, gas/mips/macro-warn-1.l, gas/mips/macro-warn-1-n32.l,
	gas/mips/macro-warn-2.l, gas/mips/macro-warn-3.l,
	gas/mips/macro-warn-4.l, gas/mips/micromips-branch-delay.l,
	gas/mips/micromips-branch-relax.l,
	gas/mips/micromips-branch-relax-pic.l, gas/mips/micromips-ill.l,
	gas/mips/micromips.l, gas/mips/micromips-size-0.l,
	gas/mips/micromips-size-1.l, gas/mips/micromips-warn-branch-delay.l,
	gas/mips/micromips-warn.l, gas/mips/mips16e-64.l,
	gas/mips/mips16e-save-err.l, gas/mips/mips1-fp.l,
	gas/mips/mips32r2-fp32.l, gas/mips/mips32r2-ill.l,
	gas/mips/mips32-sf32.l, gas/mips/mips4-branch-likely.l,
	gas/mips/mips4-fp.l, gas/mips/mips5-fp.l, gas/mips/mips64-mips3d.l,
	gas/mips/mips-double-float-flag.l, gas/mips/mips-gp64-fp32.l,
	gas/mips/mips-gp64-fp64.l, gas/mips/mips-hard-float-flag.l,
	gas/mips/mips-macro-ill-nofp.l, gas/mips/mips-macro-ill-sfp.l,
	gas/mips/nan-error-1.l, gas/mips/nan-error-2.l, gas/mips/noat-2.l,
	gas/mips/noat-3.l, gas/mips/noat-4.l, gas/mips/noat-5.l,
	gas/mips/noat-6.l, gas/mips/noat-7.l, gas/mips/octeon-ill.l,
	gas/mips/r5900-error-vu0.l, gas/mips/r5900-nollsc.l,
	gas/mips/relax-bc1any.l, gas/mips/relax-bposge.l, gas/mips/relax.l,
	gas/mips/relax-swap1.l, gas/mips/relax-swap2.l, gas/mips/set-arch.l,
	gas/mips/tls-ill.l, gas/mips/vr5400-ill.l: Adjust expected output.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 10955f6474449b296736dfcc1697022c3f0f5daa..9ee06673bae76ac56de13cc0b7e337fbd3b6a917 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,19 @@
+2013-08-19  Richard Sandiford  <rdsandiford@googlemail.com>
+
+       * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
+       (mips_parse_argument_token, validate_micromips_insn, md_begin)
+       (check_regno, match_float_constant, check_completed_insn, append_insn)
+       (match_insn, match_mips16_insn, match_insns, macro_start)
+       (macro_build_ldst_constoffset, load_register, macro, mips_ip)
+       (mips16_ip, mips_set_option_string, md_parse_option)
+       (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
+       (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
+       (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
+       (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
+       Start error messages with a lower-case letter.  Do not end error
+       messages with a period.  Wrap long messages to 80 character-lines.
+       Use "cannot" instead of "can't" and "can not".
+
 2013-08-19  Richard Sandiford  <rdsandiford@googlemail.com>
 
        * config/tc-mips.c (imm_expr): Expand comment.

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 3e7ab62d7cd77c1ae5b01dde85ed18619489666e..ca95922ef3c3a977fb1f45ac8187bb0f5c6be1b4 100644 (file)
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -1885,10 +1885,10 @@ mips_check_isa_supports_ase (const struct mips_ase *ase)
       base = mips_opts.micromips ? "microMIPS" : "MIPS";
       size = ISA_HAS_64BIT_REGS (mips_opts.isa) ? 64 : 32;
       if (min_rev < 0)
-       as_warn (_("The %d-bit %s architecture does not support the"
+       as_warn (_("the %d-bit %s architecture does not support the"
                   " `%s' extension"), size, base, ase->name);
       else
-       as_warn (_("The `%s' extension requires %s%d revision %d or greater"),
+       as_warn (_("the `%s' extension requires %s%d revision %d or greater"),
                 ase->name, base, size, min_rev);
     }
   if ((ase->flags & FP64_ASES)
@@ -1896,7 +1896,7 @@ mips_check_isa_supports_ase (const struct mips_ase *ase)
       && (warned_fp32 & ase->flags) != ase->flags)
     {
       warned_fp32 |= ase->flags;
-      as_warn (_("The `%s' extension requires 64-bit FPRs"), ase->name);
+      as_warn (_("the `%s' extension requires 64-bit FPRs"), ase->name);
     }
 }
 
@@ -2713,7 +2713,7 @@ reg_lookup (char **s, unsigned int types, unsigned int *regnop)
   else
     {
       if (types & RWARN)
-       as_warn (_("Unrecognized register name `%s'"), *s);
+       as_warn (_("unrecognized register name `%s'"), *s);
       regno = ~0;
     }
   if (regnop)
@@ -2939,7 +2939,7 @@ mips_parse_argument_token (char *s, char float_format)
          SKIP_SPACE_TABS (s);
          if (!mips_parse_register (&s, &regno2, NULL))
            {
-             set_insn_error (0, _("Invalid register range"));
+             set_insn_error (0, _("invalid register range"));
              return 0;
            }
 
@@ -2958,14 +2958,14 @@ mips_parse_argument_token (char *s, char float_format)
          my_getExpression (&element, s);
          if (element.X_op != O_constant)
            {
-             set_insn_error (0, _("Vector element must be constant"));
+             set_insn_error (0, _("vector element must be constant"));
              return 0;
            }
          s = expr_end;
          SKIP_SPACE_TABS (s);
          if (*s != ']')
            {
-             set_insn_error (0, _("Missing `]'"));
+             set_insn_error (0, _("missing `]'"));
              return 0;
            }
          ++s;
@@ -3281,7 +3281,7 @@ validate_micromips_insn (const struct mips_opcode *opc,
   length = micromips_insn_length (opc);
   if (length != 2 && length != 4)
     {
-      as_bad (_("Internal error: bad microMIPS opcode (incorrect length: %u): "
+      as_bad (_("internal error: bad microMIPS opcode (incorrect length: %u): "
                "%s %s"), length, opc->name, opc->args);
       return 0;
     }
@@ -3289,7 +3289,7 @@ validate_micromips_insn (const struct mips_opcode *opc,
   if ((length == 2 && (major & 7) != 1 && (major & 6) != 2)
       || (length == 4 && (major & 7) != 0 && (major & 4) != 4))
     {
-      as_bad (_("Internal error: bad microMIPS opcode "
+      as_bad (_("internal error: bad microMIPS opcode "
                "(opcode/length mismatch): %s %s"), opc->name, opc->args);
       return 0;
     }
@@ -3320,7 +3320,7 @@ md_begin (void)
     }
 
   if (! bfd_set_arch_mach (stdoutput, bfd_arch_mips, file_mips_arch))
-    as_warn (_("Could not set architecture and machine"));
+    as_warn (_("could not set architecture and machine"));
 
   op_hash = hash_new ();
 
@@ -3335,7 +3335,7 @@ md_begin (void)
          fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
                   mips_opcodes[i].name, retval);
          /* Probably a memory allocation problem?  Give up now.  */
-         as_fatal (_("Broken assembler.  No assembly attempted."));
+         as_fatal (_("broken assembler, no assembly attempted"));
        }
       do
        {
@@ -3426,7 +3426,7 @@ md_begin (void)
     }
 
   if (broken)
-    as_fatal (_("Broken assembler.  No assembly attempted."));
+    as_fatal (_("broken assembler, no assembly attempted"));
 
   /* We add all the general register names to the symbol table.  This
      helps us detect invalid uses of them.  */
@@ -4425,7 +4425,7 @@ check_regno (struct mips_arg_info *arg,
       && (regno & 1) != 0
       && HAVE_32BIT_FPRS
       && !mips_oddfpreg_ok (arg->insn->insn_mo, arg->opnum))
-    as_warn (_("Float register should be even, was %d"), regno);
+    as_warn (_("float register should be even, was %d"), regno);
 
   if (type == OP_REG_CCC)
     {
@@ -4437,12 +4437,12 @@ check_regno (struct mips_arg_info *arg,
       if ((regno & 1) != 0
          && ((length >= 3 && strcmp (name + length - 3, ".ps") == 0)
              || (length >= 5 && strncmp (name + length - 5, "any2", 4) == 0)))
-       as_warn (_("Condition code register should be even for %s, was %d"),
+       as_warn (_("condition code register should be even for %s, was %d"),
                 name, regno);
 
       if ((regno & 3) != 0
          && (length >= 5 && strncmp (name + length - 5, "any4", 4) == 0))
-       as_warn (_("Condition code register should be 0 or 4 for %s, was %d"),
+       as_warn (_("condition code register should be 0 or 4 for %s, was %d"),
                 name, regno);
     }
 }
@@ -5310,7 +5310,7 @@ match_float_constant (struct mips_arg_info *arg, expressionS *imm,
   else
     record_alignment (new_seg, length == 4 ? 2 : 3);
   if (seg == now_seg)
-    as_bad (_("Can't use floating point insn in this section"));
+    as_bad (_("cannot use `%s' in this section"), arg->insn->insn_mo->name);
 
   /* Set the argument to the current address in the section.  */
   imm->X_op = O_absent;
@@ -5439,9 +5439,9 @@ check_completed_insn (struct mips_arg_info *arg)
   if (arg->seen_at)
     {
       if (AT == ATREG)
-       as_warn (_("Used $at without \".set noat\""));
+       as_warn (_("used $at without \".set noat\""));
       else
-       as_warn (_("Used $%u with \".set at=$%u\""), AT, AT);
+       as_warn (_("used $%u with \".set at=$%u\""), AT, AT);
     }
 }
 
@@ -6406,7 +6406,7 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
           && micromips_insn_length (ip->insn_mo) != 2)
          || ((prev_pinfo2 & INSN2_BRANCH_DELAY_32BIT) != 0
              && micromips_insn_length (ip->insn_mo) != 4)))
-    as_warn (_("Wrong size instruction in a %u-bit branch delay slot"),
+    as_warn (_("wrong size instruction in a %u-bit branch delay slot"),
             (prev_pinfo2 & INSN2_BRANCH_DELAY_16BIT) != 0 ? 16 : 32);
 
   if (address_expr == NULL)
@@ -7086,10 +7086,10 @@ match_insn (struct mips_cl_insn *insn, const struct mips_opcode *opcode,
            {
              if (arg.opnum == 2)
                set_insn_error
-                 (0, _("Source and destination must be different"));
+                 (0, _("source and destination must be different"));
              else if (arg.last_regno == 31)
                set_insn_error
-                 (0, _("A destination register must be supplied"));
+                 (0, _("a destination register must be supplied"));
            }
          check_completed_insn (&arg);
          return TRUE;
@@ -7420,7 +7420,7 @@ static void
 match_invalid_for_isa (void)
 {
   set_insn_error_ss
-    (0, _("Opcode not supported on this processor: %s (%s)"),
+    (0, _("opcode not supported on this processor: %s (%s)"),
      mips_cpu_info_from_arch (mips_opts.arch)->name,
      mips_cpu_info_from_isa (mips_opts.isa)->name);
 }
@@ -7499,10 +7499,10 @@ match_insns (struct mips_cl_insn *insn, const struct mips_opcode *first,
   if (!seen_valid_for_size)
     {
       if (mips_opts.insn32)
-       set_insn_error (0, _("Opcode not supported in the `insn32' mode"));
+       set_insn_error (0, _("opcode not supported in the `insn32' mode"));
       else
        set_insn_error_i
-         (0, _("Unrecognized %d-bit version of microMIPS opcode"),
+         (0, _("unrecognized %d-bit version of microMIPS opcode"),
           8 * forced_insn_length);
       return TRUE;
     }
@@ -7586,16 +7586,16 @@ static const char *
 macro_warning (relax_substateT subtype)
 {
   if (subtype & RELAX_DELAY_SLOT)
-    return _("Macro instruction expanded into multiple instructions"
+    return _("macro instruction expanded into multiple instructions"
             " in a branch delay slot");
   else if (subtype & RELAX_NOMACRO)
-    return _("Macro instruction expanded into multiple instructions");
+    return _("macro instruction expanded into multiple instructions");
   else if (subtype & (RELAX_DELAY_SLOT_SIZE_FIRST
                      | RELAX_DELAY_SLOT_SIZE_SECOND))
     return ((subtype & RELAX_DELAY_SLOT_16BIT)
-           ? _("Macro instruction expanded into a wrong size instruction"
+           ? _("macro instruction expanded into a wrong size instruction"
                " in a 16-bit branch delay slot")
-           : _("Macro instruction expanded into a wrong size instruction"
+           : _("macro instruction expanded into a wrong size instruction"
                " in a 32-bit branch delay slot"));
   else
     return 0;
@@ -8056,7 +8056,7 @@ macro_build_ldst_constoffset (expressionS *ep, const char *op,
       macro_build (ep, op, "t,o(b)", treg, BFD_RELOC_LO16, AT);
 
       if (!mips_opts.at)
-       as_bad (_("Macro used $at after \".set noat\""));
+       as_bad (_("macro used $at after \".set noat\""));
     }
 }
 
@@ -8204,7 +8204,7 @@ load_register (int reg, expressionS *ep, int dbl)
       char value[32];
 
       sprintf_vma (value, ep->X_add_number);
-      as_bad (_("Number (0x%s) larger than 32 bits"), value);
+      as_bad (_("number (0x%s) larger than 32 bits"), value);
       macro_build (ep, "addiu", "t,r,j", reg, 0, BFD_RELOC_LO16);
       return;
     }
@@ -8224,7 +8224,7 @@ load_register (int reg, expressionS *ep, int dbl)
       if (ep->X_add_number == 3)
        generic_bignum[3] = 0;
       else if (ep->X_add_number > 4)
-       as_bad (_("Number larger than 64 bits"));
+       as_bad (_("number larger than 64 bits"));
       lo32.X_op = O_constant;
       lo32.X_add_number = generic_bignum[0] + (generic_bignum[1] << 16);
       hi32.X_op = O_constant;
@@ -8640,7 +8640,7 @@ load_address (int reg, expressionS *ep, int *used_at)
     abort ();
 
   if (!mips_opts.at && *used_at == 1)
-    as_bad (_("Macro used $at after \".set noat\""));
+    as_bad (_("macro used $at after \".set noat\""));
 }
 
 /* Move the contents of register SOURCE into register DEST.  */
@@ -9251,7 +9251,7 @@ macro (struct mips_cl_insn *ip, char *str)
        {
        do_true:
          /* result is always true */
-         as_warn (_("Branch %s is always true"), ip->insn_mo->name);
+         as_warn (_("branch %s is always true"), ip->insn_mo->name);
          macro_build (&offset_expr, "b", "p");
          break;
        }
@@ -9467,7 +9467,7 @@ macro (struct mips_cl_insn *ip, char *str)
     do_div3:
       if (op[2] == 0)
        {
-         as_warn (_("Divide by zero."));
+         as_warn (_("divide by zero"));
          if (mips_trap)
            macro_build (NULL, "teq", TRAP_FMT, ZERO, ZERO, 7);
          else
@@ -9577,7 +9577,7 @@ macro (struct mips_cl_insn *ip, char *str)
     do_divi:
       if (imm_expr.X_add_number == 0)
        {
-         as_warn (_("Divide by zero."));
+         as_warn (_("divide by zero"));
          if (mips_trap)
            macro_build (NULL, "teq", TRAP_FMT, ZERO, ZERO, 7);
          else
@@ -9688,7 +9688,7 @@ macro (struct mips_cl_insn *ip, char *str)
       if (offset_expr.X_op != O_symbol
          && offset_expr.X_op != O_constant)
        {
-         as_bad (_("Expression too complex"));
+         as_bad (_("expression too complex"));
          offset_expr.X_op = O_constant;
        }
 
@@ -9776,7 +9776,7 @@ macro (struct mips_cl_insn *ip, char *str)
                  relax_switch ();
                }
              if (!IS_SEXT_32BIT_NUM (offset_expr.X_add_number))
-               as_bad (_("Offset too large"));
+               as_bad (_("offset too large"));
              macro_build_lui (&offset_expr, tempreg);
              macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j",
                           tempreg, tempreg, BFD_RELOC_LO16);
@@ -10298,7 +10298,7 @@ macro (struct mips_cl_insn *ip, char *str)
       gas_assert (mips_opts.micromips);
       if (mips_opts.insn32)
        {
-         as_bad (_("Opcode not supported in the `insn32' mode `%s'"), str);
+         as_bad (_("opcode not supported in the `insn32' mode `%s'"), str);
          break;
        }
       jals = 1;
@@ -10342,18 +10342,18 @@ macro (struct mips_cl_insn *ip, char *str)
          if (mips_pic == SVR4_PIC && !HAVE_NEWABI)
            {
              if (mips_cprestore_offset < 0)
-               as_warn (_("No .cprestore pseudo-op used in PIC code"));
+               as_warn (_("no .cprestore pseudo-op used in PIC code"));
              else
                {
                  if (!mips_frame_reg_valid)
                    {
-                     as_warn (_("No .frame pseudo-op used in PIC code"));
+                     as_warn (_("no .frame pseudo-op used in PIC code"));
                      /* Quiet this warning.  */
                      mips_frame_reg_valid = 1;
                    }
                  if (!mips_cprestore_valid)
                    {
-                     as_warn (_("No .cprestore pseudo-op used in PIC code"));
+                     as_warn (_("no .cprestore pseudo-op used in PIC code"));
                      /* Quiet this warning.  */
                      mips_cprestore_valid = 1;
                    }
@@ -10374,7 +10374,7 @@ macro (struct mips_cl_insn *ip, char *str)
       gas_assert (mips_opts.micromips);
       if (mips_opts.insn32)
        {
-         as_bad (_("Opcode not supported in the `insn32' mode `%s'"), str);
+         as_bad (_("opcode not supported in the `insn32' mode `%s'"), str);
          break;
        }
       jals = 1;
@@ -10486,18 +10486,18 @@ macro (struct mips_cl_insn *ip, char *str)
              macro_build_jalr (&offset_expr, mips_cprestore_offset >= 0);
 
              if (mips_cprestore_offset < 0)
-               as_warn (_("No .cprestore pseudo-op used in PIC code"));
+               as_warn (_("no .cprestore pseudo-op used in PIC code"));
              else
                {
                  if (!mips_frame_reg_valid)
                    {
-                     as_warn (_("No .frame pseudo-op used in PIC code"));
+                     as_warn (_("no .frame pseudo-op used in PIC code"));
                      /* Quiet this warning.  */
                      mips_frame_reg_valid = 1;
                    }
                  if (!mips_cprestore_valid)
                    {
-                     as_warn (_("No .cprestore pseudo-op used in PIC code"));
+                     as_warn (_("no .cprestore pseudo-op used in PIC code"));
                      /* Quiet this warning.  */
                      mips_cprestore_valid = 1;
                    }
@@ -10512,7 +10512,7 @@ macro (struct mips_cl_insn *ip, char *str)
            }
        }
       else if (mips_pic == VXWORKS_PIC)
-       as_bad (_("Non-PIC jump used in PIC library"));
+       as_bad (_("non-PIC jump used in PIC library"));
       else
        abort ();
 
@@ -10920,7 +10920,7 @@ macro (struct mips_cl_insn *ip, char *str)
       if (offset_expr.X_op != O_constant
          && offset_expr.X_op != O_symbol)
        {
-         as_bad (_("Expression too complex"));
+         as_bad (_("expression too complex"));
          offset_expr.X_op = O_constant;
        }
 
@@ -10930,7 +10930,7 @@ macro (struct mips_cl_insn *ip, char *str)
          char value [32];
 
          sprintf_vma (value, offset_expr.X_add_number);
-         as_bad (_("Number (0x%s) larger than 32 bits"), value);
+         as_bad (_("number (0x%s) larger than 32 bits"), value);
        }
 
       /* A constant expression in PIC code can be handled just as it
@@ -11575,7 +11575,7 @@ macro (struct mips_cl_insn *ip, char *str)
       if (offset_expr.X_op != O_symbol
          && offset_expr.X_op != O_constant)
        {
-         as_bad (_("Expression too complex"));
+         as_bad (_("expression too complex"));
          offset_expr.X_op = O_constant;
        }
 
@@ -11585,7 +11585,7 @@ macro (struct mips_cl_insn *ip, char *str)
          char value [32];
 
          sprintf_vma (value, offset_expr.X_add_number);
-         as_bad (_("Number (0x%s) larger than 32 bits"), value);
+         as_bad (_("number (0x%s) larger than 32 bits"), value);
        }
 
       if (mips_pic == NO_PIC || offset_expr.X_op == O_constant)
@@ -12139,7 +12139,7 @@ macro (struct mips_cl_insn *ip, char *str)
        }
       if (op[1] == 0)
        {
-         as_warn (_("Instruction %s: result is always false"),
+         as_warn (_("instruction %s: result is always false"),
                   ip->insn_mo->name);
          move_register (op[0], 0);
          break;
@@ -12292,7 +12292,7 @@ macro (struct mips_cl_insn *ip, char *str)
        }
       if (op[1] == 0)
        {
-         as_warn (_("Instruction %s: result is always true"),
+         as_warn (_("instruction %s: result is always true"),
                   ip->insn_mo->name);
          macro_build (&expr1, HAVE_32BIT_GPRS ? "addiu" : "daddiu", "t,r,j",
                       op[0], 0, BFD_RELOC_LO16);
@@ -12577,11 +12577,11 @@ macro (struct mips_cl_insn *ip, char *str)
     default:
       /* FIXME: Check if this is one of the itbl macros, since they
         are added dynamically.  */
-      as_bad (_("Macro %s not implemented yet"), ip->insn_mo->name);
+      as_bad (_("macro %s not implemented yet"), ip->insn_mo->name);
       break;
     }
   if (!mips_opts.at && used_at)
-    as_bad (_("Macro used $at after \".set noat\""));
+    as_bad (_("macro used $at after \".set noat\""));
 }
 
 /* Implement macros in mips16 mode.  */
@@ -12918,7 +12918,7 @@ mips_ip (char *str, struct mips_cl_insn *insn)
   first = mips_lookup_insn (hash, str, end, &opcode_extra);
   if (first == NULL)
     {
-      set_insn_error (0, _("Unrecognized opcode"));
+      set_insn_error (0, _("unrecognized opcode"));
       return;
     }
 
@@ -12934,7 +12934,7 @@ mips_ip (char *str, struct mips_cl_insn *insn)
 
   if (!match_insns (insn, first, past, tokens, opcode_extra, FALSE)
       && !match_insns (insn, first, past, tokens, opcode_extra, TRUE))
-    set_insn_error (0, _("Illegal operands"));
+    set_insn_error (0, _("invalid operands"));
 
   obstack_free (&mips_operand_tokens, tokens);
 }
@@ -12980,7 +12980,7 @@ mips16_ip (char *str, struct mips_cl_insn *insn)
        }
       /* Fall through.  */
     default:
-      set_insn_error (0, _("Unrecognized opcode"));
+      set_insn_error (0, _("unrecognized opcode"));
       return;
     }
 
@@ -12993,7 +12993,7 @@ mips16_ip (char *str, struct mips_cl_insn *insn)
 
   if (!first)
     {
-      set_insn_error (0, _("Unrecognized opcode"));
+      set_insn_error (0, _("unrecognized opcode"));
       return;
     }
 
@@ -13002,7 +13002,7 @@ mips16_ip (char *str, struct mips_cl_insn *insn)
     return;
 
   if (!match_mips16_insns (insn, first, tokens))
-    set_insn_error (0, _("Illegal operands"));
+    set_insn_error (0, _("invalid operands"));
 
   obstack_free (&mips_operand_tokens, tokens);
 }
@@ -13329,7 +13329,7 @@ static void
 mips_set_option_string (const char **string_ptr, const char *new_value)
 {
   if (*string_ptr != 0 && strcasecmp (*string_ptr, new_value) != 0)
-    as_warn (_("A different %s was already specified, is now %s"),
+    as_warn (_("a different %s was already specified, is now %s"),
             string_ptr == &mips_arch_string ? "-march" : "-mtune",
             new_value);
 
@@ -13622,7 +13622,7 @@ md_parse_option (int c, char *arg)
     case OPTION_64:
       mips_abi = N64_ABI;
       if (!support_64bit_objects())
-       as_fatal (_("No compiled in support for 64 bit object file format"));
+       as_fatal (_("no compiled in support for 64 bit object file format"));
       break;
 
     case OPTION_GP32:
@@ -13668,7 +13668,7 @@ md_parse_option (int c, char *arg)
        {
          mips_abi = N64_ABI;
          if (! support_64bit_objects())
-           as_fatal (_("No compiled in support for 64 bit object file "
+           as_fatal (_("no compiled in support for 64 bit object file "
                        "format"));
        }
       else if (strcmp (arg, "eabi") == 0)
@@ -13715,7 +13715,7 @@ md_parse_option (int c, char *arg)
        mips_flag_nan2008 = FALSE;
       else
        {
-         as_fatal (_("Invalid NaN setting -mnan=%s"), arg);
+         as_fatal (_("invalid NaN setting -mnan=%s"), arg);
          return 0;
        }
       break;
@@ -13764,7 +13764,7 @@ mips_after_parse_args (void)
   if (strncmp (TARGET_OS, "pe", 2) == 0)
     {
       if (g_switch_seen && g_switch_value != 0)
-       as_bad (_("-G not supported in this configuration."));
+       as_bad (_("-G not supported in this configuration"));
       g_switch_value = 0;
     }
 
@@ -13790,7 +13790,8 @@ mips_after_parse_args (void)
             There's no harm in specifying both as long as the ISA levels
             are the same.  */
          if (file_mips_isa != arch_info->isa)
-           as_bad (_("-%s conflicts with the other architecture options, which imply -%s"),
+           as_bad (_("-%s conflicts with the other architecture options,"
+                     " which imply -%s"),
                    mips_cpu_info_from_isa (file_mips_isa)->name,
                    mips_cpu_info_from_isa (arch_info->isa)->name);
        }
@@ -13951,7 +13952,8 @@ md_pcrel_from (fixS *fixP)
       /* We have no relocation type for PC relative MIPS16 instructions.  */
       if (fixP->fx_addsy && S_GET_SEGMENT (fixP->fx_addsy) != now_seg)
        as_bad_where (fixP->fx_file, fixP->fx_line,
-                     _("PC relative MIPS16 instruction references a different section"));
+                     _("PC relative MIPS16 instruction references"
+                       " a different section"));
       return addr;
     }
 }
@@ -14292,7 +14294,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
            }
          else
            as_bad_where (fixP->fx_file, fixP->fx_line,
-                         _("Unsupported constant in relocation"));
+                         _("unsupported constant in relocation"));
        }
       break;
 
@@ -14331,7 +14333,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
     case BFD_RELOC_16_PCREL_S2:
       if ((*valP & 0x3) != 0)
        as_bad_where (fixP->fx_file, fixP->fx_line,
-                     _("Branch to misaligned address (%lx)"), (long) *valP);
+                     _("branch to misaligned address (%lx)"), (long) *valP);
 
       /* We need to save the bits in the instruction since fixup_segment()
         might be deleting the relocation entry (i.e., a branch within
@@ -14375,7 +14377,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
             and there's nothing we can do to fix this instruction
             without turning it into a longer sequence.  */
          as_bad_where (fixP->fx_file, fixP->fx_line,
-                       _("Branch out of range"));
+                       _("branch out of range"));
        }
       break;
 
@@ -14473,10 +14475,10 @@ s_align (int x ATTRIBUTE_UNUSED)
 
   temp = get_absolute_expression ();
   if (temp > max_alignment)
-    as_bad (_("Alignment too large: %d. assumed."), temp = max_alignment);
+    as_bad (_("alignment too large, %d assumed"), temp = max_alignment);
   else if (temp < 0)
     {
-      as_warn (_("Alignment negative: 0 assumed."));
+      as_warn (_("alignment negative, 0 assumed"));
       temp = 0;
     }
   if (*input_line_pointer == ',')
@@ -14772,7 +14774,7 @@ s_option (int x ATTRIBUTE_UNUSED)
        }
     }
   else
-    as_warn (_("Unrecognized option \"%s\""), opt);
+    as_warn (_("unrecognized option \"%s\""), opt);
 
   *input_line_pointer = c;
   demand_empty_rest_of_line ();
@@ -14816,7 +14818,7 @@ s_mipsset (int x ATTRIBUTE_UNUSED)
       char *s = name + 3;
 
       if (!reg_lookup (&s, RTYPE_NUM | RTYPE_GP, &mips_opts.at))
-       as_bad (_("Unrecognized register name `%s'"), s);
+       as_bad (_("unrecognized register name `%s'"), s);
     }
   else if (strcmp (name, "at") == 0)
     {
@@ -15035,7 +15037,7 @@ s_mipsset (int x ATTRIBUTE_UNUSED)
     }
   else
     {
-      as_warn (_("Tried to set unrecognized symbol: %s\n"), name);
+      as_warn (_("tried to set unrecognized symbol: %s\n"), name);
     }
   mips_check_isa_supports_ases ();
   *input_line_pointer = ch;
@@ -15392,7 +15394,7 @@ s_tls_rel_directive (const size_t bytes, const char *dirstr,
 
   if (ex.X_op != O_symbol)
     {
-      as_bad (_("Unsupported use of %s"), dirstr);
+      as_bad (_("unsupported use of %s"), dirstr);
       ignore_rest_of_line ();
     }
 
@@ -15483,7 +15485,7 @@ s_gpword (int ignore ATTRIBUTE_UNUSED)
 
   if (ex.X_op != O_symbol || ex.X_add_number != 0)
     {
-      as_bad (_("Unsupported use of .gpword"));
+      as_bad (_("unsupported use of .gpword"));
       ignore_rest_of_line ();
     }
 
@@ -15521,7 +15523,7 @@ s_gpdword (int ignore ATTRIBUTE_UNUSED)
 
   if (ex.X_op != O_symbol || ex.X_add_number != 0)
     {
-      as_bad (_("Unsupported use of .gpdword"));
+      as_bad (_("unsupported use of .gpdword"));
       ignore_rest_of_line ();
     }
 
@@ -15553,7 +15555,7 @@ s_ehword (int ignore ATTRIBUTE_UNUSED)
 
   if (ex.X_op != O_symbol || ex.X_add_number != 0)
     {
-      as_bad (_("Unsupported use of .ehword"));
+      as_bad (_("unsupported use of .ehword"));
       ignore_rest_of_line ();
     }
 
@@ -15628,7 +15630,7 @@ s_nan (int ignore ATTRIBUTE_UNUSED)
           && memcmp (input_line_pointer, str_legacy, i) == 0)
     mips_flag_nan2008 = FALSE;
   else
-    as_bad (_("Bad .nan directive"));
+    as_bad (_("bad .nan directive"));
 
   input_line_pointer += i;
   demand_empty_rest_of_line ();
@@ -16427,7 +16429,8 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
   if (reloc->howto == NULL)
     {
       as_bad_where (fixp->fx_file, fixp->fx_line,
-                   _("Can not represent %s relocation in this object file format"),
+                   _("cannot represent %s relocation in this object file"
+                     " format"),
                    bfd_get_reloc_code_name (code));
       retval[0] = NULL;
     }
@@ -16521,7 +16524,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
          int i;
 
          as_warn_where (fragp->fr_file, fragp->fr_line,
-                        _("Relaxed out-of-range branch into a jump"));
+                        _("relaxed out-of-range branch into a jump"));
 
          if (RELAX_BRANCH_UNCOND (fragp->fr_subtype))
            goto uncond;
@@ -16774,7 +16777,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
 
       /* Relax 32-bit branches to a sequence of instructions.  */
       as_warn_where (fragp->fr_file, fragp->fr_line,
-                    _("Relaxed out-of-range branch into a jump"));
+                    _("relaxed out-of-range branch into a jump"));
 
       /* Set the short-delay-slot bit.  */
       short_ds = al && (insn & 0x02000000) != 0;
@@ -17441,7 +17444,7 @@ s_mips_end (int x ATTRIBUTE_UNUSED)
 
   if (!cur_proc_ptr)
     {
-      as_warn (_(".end directive without a preceding .ent directive."));
+      as_warn (_(".end directive without a preceding .ent directive"));
       demand_empty_rest_of_line ();
       return;
     }
@@ -17450,7 +17453,7 @@ s_mips_end (int x ATTRIBUTE_UNUSED)
     {
       gas_assert (S_GET_NAME (p));
       if (strcmp (S_GET_NAME (p), S_GET_NAME (cur_proc_ptr->func_sym)))
-       as_warn (_(".end symbol does not match .ent symbol."));
+       as_warn (_(".end symbol does not match .ent symbol"));
 
       if (debug_type == DEBUG_STABS)
        stabs_generate_asm_endfunc (S_GET_NAME (p),
@@ -17527,7 +17530,7 @@ s_mips_ent (int aent)
     get_number ();
 
   if ((bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) == 0)
-    as_warn (_(".ent or .aent not in text section."));
+    as_warn (_(".ent or .aent not in text section"));
 
   if (!aent && cur_proc_ptr)
     as_warn (_("missing .end"));
@@ -17583,7 +17586,7 @@ s_mips_frame (int ignore ATTRIBUTE_UNUSED)
       if (*input_line_pointer++ != ','
          || get_absolute_expression_and_terminator (&val) != ',')
        {
-         as_warn (_("Bad .frame directive"));
+         as_warn (_("bad .frame directive"));
          --input_line_pointer;
          demand_empty_rest_of_line ();
          return;
@@ -17620,7 +17623,7 @@ s_mips_mask (int reg_type)
 
       if (get_absolute_expression_and_terminator (&mask) != ',')
        {
-         as_warn (_("Bad .mask/.fmask directive"));
+         as_warn (_("bad .mask/.fmask directive"));
          --input_line_pointer;
          demand_empty_rest_of_line ();
          return;
@@ -17891,7 +17894,7 @@ mips_parse_cpu (const char *option, const char *cpu_string)
     if (mips_matching_cpu_name_p (p->name, cpu_string))
       return p;
 
-  as_bad (_("Bad value (%s) for %s"), cpu_string, option);
+  as_bad (_("bad value (%s) for %s"), cpu_string, option);
   return 0;
 }
 

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index f9be128ef2d38e7ea33b655a221de0419094f84a..870158f8eec8d5952ea361537e267b6c82c3b325 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,32 @@
+2013-08-19  Richard Sandiford  <rdsandiford@googlemail.com>
+
+       * gas/mips/ase-errors-1.l, gas/mips/ase-errors-2.l,
+       gas/mips/ase-errors-3.l, gas/mips/ase-errors-4.l, gas/mips/at-2.l,
+       gas/mips/baddata1.l, gas/mips/elf-rel30.l, gas/mips/illegal.l,
+       gas/mips/jalr.l, gas/mips/ldstla-32-1.l, gas/mips/ldstla-32-mips3-1.l,
+       gas/mips/lui-1.l, gas/mips/macro-warn-1.l, gas/mips/macro-warn-1-n32.l,
+       gas/mips/macro-warn-2.l, gas/mips/macro-warn-3.l,
+       gas/mips/macro-warn-4.l, gas/mips/micromips-branch-delay.l,
+       gas/mips/micromips-branch-relax.l,
+       gas/mips/micromips-branch-relax-pic.l, gas/mips/micromips-ill.l,
+       gas/mips/micromips.l, gas/mips/micromips-size-0.l,
+       gas/mips/micromips-size-1.l, gas/mips/micromips-warn-branch-delay.l,
+       gas/mips/micromips-warn.l, gas/mips/mips16e-64.l,
+       gas/mips/mips16e-save-err.l, gas/mips/mips1-fp.l,
+       gas/mips/mips32r2-fp32.l, gas/mips/mips32r2-ill.l,
+       gas/mips/mips32-sf32.l, gas/mips/mips4-branch-likely.l,
+       gas/mips/mips4-fp.l, gas/mips/mips5-fp.l, gas/mips/mips64-mips3d.l,
+       gas/mips/mips-double-float-flag.l, gas/mips/mips-gp64-fp32.l,
+       gas/mips/mips-gp64-fp64.l, gas/mips/mips-hard-float-flag.l,
+       gas/mips/mips-macro-ill-nofp.l, gas/mips/mips-macro-ill-sfp.l,
+       gas/mips/nan-error-1.l, gas/mips/nan-error-2.l, gas/mips/noat-2.l,
+       gas/mips/noat-3.l, gas/mips/noat-4.l, gas/mips/noat-5.l,
+       gas/mips/noat-6.l, gas/mips/noat-7.l, gas/mips/octeon-ill.l,
+       gas/mips/r5900-error-vu0.l, gas/mips/r5900-nollsc.l,
+       gas/mips/relax-bc1any.l, gas/mips/relax-bposge.l, gas/mips/relax.l,
+       gas/mips/relax-swap1.l, gas/mips/relax-swap2.l, gas/mips/set-arch.l,
+       gas/mips/tls-ill.l, gas/mips/vr5400-ill.l: Adjust expected output.
+
 2013-08-19  Richard Sandiford  <rdsandiford@googlemail.com>
 
        * gas/mips/ext-ill.l, gas/mips/mips64r2-ill.l: Expect DEXT and DINS

diff --git a/gas/testsuite/gas/mips/ase-errors-1.l b/gas/testsuite/gas/mips/ase-errors-1.l
index bfa76912122fe1156b4fef620cb9e9e2da9be307..f9899820b5fd9704199eaaf1b134df425b8cfb44 100644 (file)
--- a/gas/testsuite/gas/mips/ase-errors-1.l
+++ b/gas/testsuite/gas/mips/ase-errors-1.l
@@ -1,42 +1,42 @@
 .*Assembler messages:
-.*:6: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
-.*:7: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
-.*:9: Warning: The `dsp' extension requires MIPS32 revision 2 or greater
-.*:11: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
-.*:12: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
-.*:14: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
-.*:15: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
-.*:16: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
-# ----------------------------------------------------------------------------
-.*:22: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
-.*:25: Warning: The `dspr2' extension requires MIPS32 revision 2 or greater
-.*:27: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
-.*:30: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
-.*:31: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
-.*:32: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
-# ----------------------------------------------------------------------------
-.*:39: Warning: The `mcu' extension requires MIPS32 revision 2 or greater
-.*:42: Error: Opcode not supported.* `aclr 4,100\(\$4\)'
-# ----------------------------------------------------------------------------
-.*:46: Warning: The 32-bit MIPS architecture does not support the `mdmx' extension
-.*:48: Warning: The `mdmx' extension requires 64-bit FPRs
-.*:51: Error: Opcode not supported.* `add.ob \$f4,\$f6,\$f8'
-# ----------------------------------------------------------------------------
-.*:57: Warning: The `mips3d' extension requires 64-bit FPRs
-.*:58: Warning: The `mips3d' extension requires MIPS32 revision 2 or greater
-.*:61: Error: Opcode not supported.* `addr.ps \$f4,\$f6,\$f8'
-# ----------------------------------------------------------------------------
-.*:68: Warning: The `mt' extension requires MIPS32 revision 2 or greater
-.*:71: Error: Opcode not supported.* `dmt *'
-# ----------------------------------------------------------------------------
-.*:77: Warning: The `smartmips' extension requires MIPS32 revision 1 or greater
-.*:80: Error: Opcode not supported.* `maddp \$4,\$5'
-# ----------------------------------------------------------------------------
-.*:86: Error: Opcode not supported.* `dmfgc0 \$3,\$29'
-.*:88: Warning: The `virt' extension requires MIPS32 revision 2 or greater
-.*:90: Error: Opcode not supported.* `dmfgc0 \$3,\$29'
-.*:92: Error: Opcode not supported.* `hypcall *'
-.*:93: Error: Opcode not supported.* `dmfgc0 \$3,\$29'
-# ----------------------------------------------------------------------------
-.*:100: Warning: The `eva' extension requires MIPS32 revision 2 or greater
-.*:103: Error: Opcode not supported.* `lbue \$4,16\(\$5\)'
+.*:6: Error: opcode not supported.* `ldx \$4,\$5\(\$6\)'
+.*:7: Error: opcode not supported.* `absq_s\.qb \$3,\$4'
+.*:9: Warning: the `dsp' extension requires MIPS32 revision 2 or greater
+.*:11: Error: opcode not supported.* `ldx \$4,\$5\(\$6\)'
+.*:12: Error: opcode not supported.* `absq_s\.qb \$3,\$4'
+.*:14: Error: opcode not supported.* `lbux \$4,\$5\(\$6\)'
+.*:15: Error: opcode not supported.* `ldx \$4,\$5\(\$6\)'
+.*:16: Error: opcode not supported.* `absq_s\.qb \$3,\$4'
+# ----------------------------------------------------------------------------
+.*:22: Error: opcode not supported.* `ldx \$4,\$5\(\$6\)'
+.*:25: Warning: the `dspr2' extension requires MIPS32 revision 2 or greater
+.*:27: Error: opcode not supported.* `ldx \$4,\$5\(\$6\)'
+.*:30: Error: opcode not supported.* `lbux \$4,\$5\(\$6\)'
+.*:31: Error: opcode not supported.* `ldx \$4,\$5\(\$6\)'
+.*:32: Error: opcode not supported.* `absq_s\.qb \$3,\$4'
+# ----------------------------------------------------------------------------
+.*:39: Warning: the `mcu' extension requires MIPS32 revision 2 or greater
+.*:42: Error: opcode not supported.* `aclr 4,100\(\$4\)'
+# ----------------------------------------------------------------------------
+.*:46: Warning: the 32-bit MIPS architecture does not support the `mdmx' extension
+.*:48: Warning: the `mdmx' extension requires 64-bit FPRs
+.*:51: Error: opcode not supported.* `add.ob \$f4,\$f6,\$f8'
+# ----------------------------------------------------------------------------
+.*:57: Warning: the `mips3d' extension requires 64-bit FPRs
+.*:58: Warning: the `mips3d' extension requires MIPS32 revision 2 or greater
+.*:61: Error: opcode not supported.* `addr.ps \$f4,\$f6,\$f8'
+# ----------------------------------------------------------------------------
+.*:68: Warning: the `mt' extension requires MIPS32 revision 2 or greater
+.*:71: Error: opcode not supported.* `dmt *'
+# ----------------------------------------------------------------------------
+.*:77: Warning: the `smartmips' extension requires MIPS32 revision 1 or greater
+.*:80: Error: opcode not supported.* `maddp \$4,\$5'
+# ----------------------------------------------------------------------------
+.*:86: Error: opcode not supported.* `dmfgc0 \$3,\$29'
+.*:88: Warning: the `virt' extension requires MIPS32 revision 2 or greater
+.*:90: Error: opcode not supported.* `dmfgc0 \$3,\$29'
+.*:92: Error: opcode not supported.* `hypcall *'
+.*:93: Error: opcode not supported.* `dmfgc0 \$3,\$29'
+# ----------------------------------------------------------------------------
+.*:100: Warning: the `eva' extension requires MIPS32 revision 2 or greater
+.*:103: Error: opcode not supported.* `lbue \$4,16\(\$5\)'

diff --git a/gas/testsuite/gas/mips/ase-errors-2.l b/gas/testsuite/gas/mips/ase-errors-2.l
index 5e7561df4036d32cd655fc09c060c34ce8335f07..4c24690b1dc39fc37b491bb645446742bc14323c 100644 (file)
--- a/gas/testsuite/gas/mips/ase-errors-2.l
+++ b/gas/testsuite/gas/mips/ase-errors-2.l
@@ -1,34 +1,34 @@
 .*Assembler messages:
-.*:6: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
-.*:7: Warning: The `dsp' extension requires MIPS64 revision 2 or greater
-.*:10: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
-.*:12: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
-.*:13: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
-.*:14: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
+.*:6: Error: opcode not supported.* `absq_s\.qb \$3,\$4'
+.*:7: Warning: the `dsp' extension requires MIPS64 revision 2 or greater
+.*:10: Error: opcode not supported.* `absq_s\.qb \$3,\$4'
+.*:12: Error: opcode not supported.* `lbux \$4,\$5\(\$6\)'
+.*:13: Error: opcode not supported.* `ldx \$4,\$5\(\$6\)'
+.*:14: Error: opcode not supported.* `absq_s\.qb \$3,\$4'
 # ----------------------------------------------------------------------------
-.*:21: Warning: The `dspr2' extension requires MIPS64 revision 2 or greater
-.*:26: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
-.*:27: Error: Opcode not supported.* `ldx \$4,\$5\(\$6\)'
-.*:28: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
+.*:21: Warning: the `dspr2' extension requires MIPS64 revision 2 or greater
+.*:26: Error: opcode not supported.* `lbux \$4,\$5\(\$6\)'
+.*:27: Error: opcode not supported.* `ldx \$4,\$5\(\$6\)'
+.*:28: Error: opcode not supported.* `absq_s\.qb \$3,\$4'
 # ----------------------------------------------------------------------------
-.*:33: Warning: The `mcu' extension requires MIPS64 revision 2 or greater
-.*:36: Error: Opcode not supported.* `aclr 4,100\(\$4\)'
+.*:33: Warning: the `mcu' extension requires MIPS64 revision 2 or greater
+.*:36: Error: opcode not supported.* `aclr 4,100\(\$4\)'
 # ----------------------------------------------------------------------------
-.*:41: Warning: The `mdmx' extension requires MIPS64 revision 1 or greater
-.*:44: Error: Opcode not supported.* `add.ob \$f4,\$f6,\$f8'
+.*:41: Warning: the `mdmx' extension requires MIPS64 revision 1 or greater
+.*:44: Error: opcode not supported.* `add.ob \$f4,\$f6,\$f8'
 # ----------------------------------------------------------------------------
-.*:49: Warning: The `mips3d' extension requires MIPS64 revision 1 or greater
-.*:52: Error: Opcode not supported.* `addr.ps \$f4,\$f6,\$f8'
+.*:49: Warning: the `mips3d' extension requires MIPS64 revision 1 or greater
+.*:52: Error: opcode not supported.* `addr.ps \$f4,\$f6,\$f8'
 # ----------------------------------------------------------------------------
-.*:57: Warning: The `mt' extension requires MIPS64 revision 2 or greater
-.*:60: Error: Opcode not supported.* `dmt *'
+.*:57: Warning: the `mt' extension requires MIPS64 revision 2 or greater
+.*:60: Error: opcode not supported.* `dmt *'
 # ----------------------------------------------------------------------------
-.*:63: Warning: The 64-bit MIPS architecture does not support the `smartmips' extension
-.*:68: Error: Opcode not supported.* `maddp \$4,\$5'
+.*:63: Warning: the 64-bit MIPS architecture does not support the `smartmips' extension
+.*:68: Error: opcode not supported.* `maddp \$4,\$5'
 # ----------------------------------------------------------------------------
-.*:74: Warning: The `virt' extension requires MIPS64 revision 2 or greater
-.*:78: Error: Opcode not supported.* `hypcall *'
-.*:79: Error: Opcode not supported.* `dmfgc0 \$3,\$29'
+.*:74: Warning: the `virt' extension requires MIPS64 revision 2 or greater
+.*:78: Error: opcode not supported.* `hypcall *'
+.*:79: Error: opcode not supported.* `dmfgc0 \$3,\$29'
 # ----------------------------------------------------------------------------
-.*:84: Warning: The `eva' extension requires MIPS64 revision 2 or greater
-.*:87: Error: Opcode not supported.* `lbue \$4,16\(\$5\)'
+.*:84: Warning: the `eva' extension requires MIPS64 revision 2 or greater
+.*:87: Error: opcode not supported.* `lbue \$4,16\(\$5\)'

diff --git a/gas/testsuite/gas/mips/ase-errors-3.l b/gas/testsuite/gas/mips/ase-errors-3.l
index 240ac9b5baeb8fb06f4a322cbfbc4c6ff4226ee9..77823f220844e0322d6c42d3d5da4967bdfac761 100644 (file)
--- a/gas/testsuite/gas/mips/ase-errors-3.l
+++ b/gas/testsuite/gas/mips/ase-errors-3.l
@@ -1,30 +1,30 @@
 .*Assembler messages:
-.*:5: Error: Unrecognized opcode `ldx \$4,\$5\(\$6\)'
-.*:6: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
-.*:9: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
-.*:10: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
+.*:5: Error: unrecognized opcode `ldx \$4,\$5\(\$6\)'
+.*:6: Error: opcode not supported.* `absq_s\.qb \$3,\$4'
+.*:9: Error: opcode not supported.* `lbux \$4,\$5\(\$6\)'
+.*:10: Error: opcode not supported.* `absq_s\.qb \$3,\$4'
 # ----------------------------------------------------------------------------
-.*:18: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
-.*:19: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
+.*:18: Error: opcode not supported.* `lbux \$4,\$5\(\$6\)'
+.*:19: Error: opcode not supported.* `absq_s\.qb \$3,\$4'
 # ----------------------------------------------------------------------------
-.*:26: Error: Opcode not supported.* `aclr 4,100\(\$4\)'
+.*:26: Error: opcode not supported.* `aclr 4,100\(\$4\)'
 # ----------------------------------------------------------------------------
-.*:29: Warning: The 32-bit microMIPS architecture does not support the `mdmx' extension
-.*:29: Warning: The `mdmx' extension requires 64-bit FPRs
-.*:30: Error: Unrecognized opcode `add.ob \$f4,\$f6,\$f8'
+.*:29: Warning: the 32-bit microMIPS architecture does not support the `mdmx' extension
+.*:29: Warning: the `mdmx' extension requires 64-bit FPRs
+.*:30: Error: unrecognized opcode `add.ob \$f4,\$f6,\$f8'
 # ----------------------------------------------------------------------------
-.*:34: Warning: The 32-bit microMIPS architecture does not support the `mips3d' extension
-.*:34: Warning: The `mips3d' extension requires 64-bit FPRs
-.*:35: Error: Unrecognized opcode `addr.ps \$f4,\$f6,\$f8'
+.*:34: Warning: the 32-bit microMIPS architecture does not support the `mips3d' extension
+.*:34: Warning: the `mips3d' extension requires 64-bit FPRs
+.*:35: Error: unrecognized opcode `addr.ps \$f4,\$f6,\$f8'
 # ----------------------------------------------------------------------------
-.*:39: Warning: The 32-bit microMIPS architecture does not support the `mt' extension
-.*:40: Error: Unrecognized opcode `dmt *'
+.*:39: Warning: the 32-bit microMIPS architecture does not support the `mt' extension
+.*:40: Error: unrecognized opcode `dmt *'
 # ----------------------------------------------------------------------------
-.*:44: Warning: The 32-bit microMIPS architecture does not support the `smartmips' extension
-.*:45: Error: Unrecognized opcode `maddp \$4,\$5'
+.*:44: Warning: the 32-bit microMIPS architecture does not support the `smartmips' extension
+.*:45: Error: unrecognized opcode `maddp \$4,\$5'
 # ----------------------------------------------------------------------------
-.*:51: Error: Opcode not supported.* `dmfgc0 \$3,\$29'
-.*:54: Error: Opcode not supported.* `hypcall *'
-.*:55: Error: Opcode not supported.* `dmfgc0 \$3,\$29'
+.*:51: Error: opcode not supported.* `dmfgc0 \$3,\$29'
+.*:54: Error: opcode not supported.* `hypcall *'
+.*:55: Error: opcode not supported.* `dmfgc0 \$3,\$29'
 # ----------------------------------------------------------------------------
-.*:65: Error: Opcode not supported.* `lbue \$4,16\(\$5\)'
+.*:65: Error: opcode not supported.* `lbue \$4,16\(\$5\)'

diff --git a/gas/testsuite/gas/mips/ase-errors-4.l b/gas/testsuite/gas/mips/ase-errors-4.l
index 8636786637034f092c2d22c1b4df4c5a3b4e8452..b473b30e61188948849f000660f0157b862eb385 100644 (file)
--- a/gas/testsuite/gas/mips/ase-errors-4.l
+++ b/gas/testsuite/gas/mips/ase-errors-4.l
@@ -1,27 +1,27 @@
 .*Assembler messages:
-.*:5: Error: Unrecognized opcode `ldx \$4,\$5\(\$6\)'
-.*:6: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
-.*:9: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
-.*:10: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
+.*:5: Error: unrecognized opcode `ldx \$4,\$5\(\$6\)'
+.*:6: Error: opcode not supported.* `absq_s\.qb \$3,\$4'
+.*:9: Error: opcode not supported.* `lbux \$4,\$5\(\$6\)'
+.*:10: Error: opcode not supported.* `absq_s\.qb \$3,\$4'
 # ----------------------------------------------------------------------------
-.*:18: Error: Opcode not supported.* `lbux \$4,\$5\(\$6\)'
-.*:19: Error: Opcode not supported.* `absq_s\.qb \$3,\$4'
+.*:18: Error: opcode not supported.* `lbux \$4,\$5\(\$6\)'
+.*:19: Error: opcode not supported.* `absq_s\.qb \$3,\$4'
 # ----------------------------------------------------------------------------
-.*:26: Error: Opcode not supported.* `aclr 4,100\(\$4\)'
+.*:26: Error: opcode not supported.* `aclr 4,100\(\$4\)'
 # ----------------------------------------------------------------------------
-.*:29: Warning: The 64-bit microMIPS architecture does not support the `mdmx' extension
-.*:30: Error: Unrecognized opcode `add.ob \$f4,\$f6,\$f8'
+.*:29: Warning: the 64-bit microMIPS architecture does not support the `mdmx' extension
+.*:30: Error: unrecognized opcode `add.ob \$f4,\$f6,\$f8'
 # ----------------------------------------------------------------------------
-.*:34: Warning: The 64-bit microMIPS architecture does not support the `mips3d' extension
-.*:35: Error: Unrecognized opcode `addr.ps \$f4,\$f6,\$f8'
+.*:34: Warning: the 64-bit microMIPS architecture does not support the `mips3d' extension
+.*:35: Error: unrecognized opcode `addr.ps \$f4,\$f6,\$f8'
 # ----------------------------------------------------------------------------
-.*:39: Warning: The 64-bit microMIPS architecture does not support the `mt' extension
-.*:40: Error: Unrecognized opcode `dmt *'
+.*:39: Warning: the 64-bit microMIPS architecture does not support the `mt' extension
+.*:40: Error: unrecognized opcode `dmt *'
 # ----------------------------------------------------------------------------
-.*:44: Warning: The 64-bit microMIPS architecture does not support the `smartmips' extension
-.*:45: Error: Unrecognized opcode `maddp \$4,\$5'
+.*:44: Warning: the 64-bit microMIPS architecture does not support the `smartmips' extension
+.*:45: Error: unrecognized opcode `maddp \$4,\$5'
 # ----------------------------------------------------------------------------
-.*:54: Error: Opcode not supported.* `hypcall *'
-.*:55: Error: Opcode not supported.* `dmfgc0 \$3,\$29'
+.*:54: Error: opcode not supported.* `hypcall *'
+.*:55: Error: opcode not supported.* `dmfgc0 \$3,\$29'
 # ----------------------------------------------------------------------------
-.*:63: Error: Opcode not supported.* `lbue \$4,16\(\$5\)'
+.*:63: Error: opcode not supported.* `lbue \$4,16\(\$5\)'

diff --git a/gas/testsuite/gas/mips/at-2.l b/gas/testsuite/gas/mips/at-2.l
index ca6bb6b0459f1e9340babcb0677eb727194c1dd4..6e56d1f7e03e095efb5b02e2cc4029893f2867eb 100644 (file)
--- a/gas/testsuite/gas/mips/at-2.l
+++ b/gas/testsuite/gas/mips/at-2.l
@@ -1,7 +1,7 @@
 .*\.s: Assembler messages:
-.*\.s:4: Error: Macro used \$at after ".set noat"
-.*\.s:5: Error: Macro used \$at after ".set noat"
-.*\.s:6: Error: Macro used \$at after ".set noat"
-.*\.s:8: Warning: Used \$at without ".set noat"
-.*\.s:13: Warning: Used \$26 with ".set at=\$26"
-.*\.s:18: Warning: Used \$27 with ".set at=\$27"
+.*\.s:4: Error: macro used \$at after ".set noat"
+.*\.s:5: Error: macro used \$at after ".set noat"
+.*\.s:6: Error: macro used \$at after ".set noat"
+.*\.s:8: Warning: used \$at without ".set noat"
+.*\.s:13: Warning: used \$26 with ".set at=\$26"
+.*\.s:18: Warning: used \$27 with ".set at=\$27"

diff --git a/gas/testsuite/gas/mips/baddata1.l b/gas/testsuite/gas/mips/baddata1.l
index 6efafcbb919cb1c9334beac9e6ee6ae8bcbd5b78..6d09cca933f4e9e1e15ca4226163c373cc7c4918 100644 (file)
--- a/gas/testsuite/gas/mips/baddata1.l
+++ b/gas/testsuite/gas/mips/baddata1.l
@@ -1,3 +1,3 @@
 .*: Assembler messages:
-.*:8: Error: Can not represent BFD_RELOC_8 relocation in this object file format
-.*:9: Error: Can not represent BFD_RELOC_8 relocation in this object file format
+.*:8: Error: cannot represent BFD_RELOC_8 relocation in this object file format
+.*:9: Error: cannot represent BFD_RELOC_8 relocation in this object file format

diff --git a/gas/testsuite/gas/mips/elf-rel30.l b/gas/testsuite/gas/mips/elf-rel30.l
index 3cbb4f1021ca28d95da760e443822f31266ab020..193a314e80eff18b7813afd69cf100b0cd6be2f8 100644 (file)
--- a/gas/testsuite/gas/mips/elf-rel30.l
+++ b/gas/testsuite/gas/mips/elf-rel30.l
@@ -1,26 +1,26 @@
 .*:
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
-.*: Unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
+.*: unsupported constant in relocation
 .*: TLS relocation against a constant
 .*: TLS relocation against a constant
 .*: TLS relocation against a constant

diff --git a/gas/testsuite/gas/mips/illegal.l b/gas/testsuite/gas/mips/illegal.l
index d6f61a2c21a3eb6477959e43473879c20a081a25..6fbf16a9964634251001a197eb6b6934f4a7538e 100644 (file)
--- a/gas/testsuite/gas/mips/illegal.l
+++ b/gas/testsuite/gas/mips/illegal.l
@@ -1,3 +1,3 @@
 .*: Assembler messages:
-.*:4: Error: Illegal operands `move 1,2'
-.*:5: Error: Illegal operands `c.eq.s 1,2'
+.*:4: Error: invalid operands `move 1,2'
+.*:5: Error: invalid operands `c.eq.s 1,2'

diff --git a/gas/testsuite/gas/mips/jalr.l b/gas/testsuite/gas/mips/jalr.l
index c92980d5d2a126aea3a6e848f53f51dca26a1590..cf1c330a89f4af219279c8c14742b8d65dbe6814 100644 (file)
--- a/gas/testsuite/gas/mips/jalr.l
+++ b/gas/testsuite/gas/mips/jalr.l
@@ -1,7 +1,7 @@
 .*: Assembler messages:
-.*:1: Error: Illegal operands.*
-.*:2: Error: A destination register must be supplied.*
-.*:3: Error: Source and destination must be different.*
-.*:10: Error: Illegal operands.*
-.*:11: Error: A destination register must be supplied.*
-.*:12: Error: Source and destination must be different.*
+.*:1: Error: invalid operands.*
+.*:2: Error: a destination register must be supplied.*
+.*:3: Error: source and destination must be different.*
+.*:10: Error: invalid operands.*
+.*:11: Error: a destination register must be supplied.*
+.*:12: Error: source and destination must be different.*

diff --git a/gas/testsuite/gas/mips/ldstla-32-1.l b/gas/testsuite/gas/mips/ldstla-32-1.l
index 264b616dd18a808351159c3646dd45bacfc4bf38..a8eb1b90de14ed68e84434e24adc2daa0db9851d 100644 (file)
--- a/gas/testsuite/gas/mips/ldstla-32-1.l
+++ b/gas/testsuite/gas/mips/ldstla-32-1.l
@@ -1,81 +1,81 @@
 .*: Assembler messages:
-.*:3: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:4: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:5: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:6: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:7: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:8: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:10: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:11: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:12: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:13: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:14: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:15: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:17: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:18: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:19: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:20: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:21: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:22: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:24: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:25: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:26: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:27: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:28: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:29: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:31: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:32: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:32: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:33: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:33: Error: Number \(0xabcdef0123450000\) larger than 32 bits
-.*:34: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:34: Error: Number \(0x0*123456789ac0000\) larger than 32 bits
-.*:35: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:35: Error: Number \(0x0*200000000\) larger than 32 bits
-.*:36: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:36: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:38: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:39: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:39: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:40: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:40: Error: Number \(0xabcdef0123450000\) larger than 32 bits
-.*:41: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:41: Error: Number \(0x0*123456789ac0000\) larger than 32 bits
-.*:42: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:42: Error: Number \(0x0*200000000\) larger than 32 bits
-.*:43: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:43: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:45: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:46: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:46: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:47: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:47: Error: Number \(0xabcdef0123450000\) larger than 32 bits
-.*:48: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:48: Error: Number \(0x0*123456789ac0000\) larger than 32 bits
-.*:49: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:49: Error: Number \(0x0*200000000\) larger than 32 bits
-.*:50: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:50: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:52: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:53: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:53: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:54: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:54: Error: Number \(0xabcdef0123450000\) larger than 32 bits
-.*:55: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:55: Error: Number \(0x0*123456789ac0000\) larger than 32 bits
-.*:56: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:56: Error: Number \(0x0*200000000\) larger than 32 bits
-.*:57: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:57: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:59: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:60: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:61: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:62: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:63: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:64: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:66: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:67: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:68: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:69: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:70: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:71: Error: Number \(0x0*100000000\) larger than 32 bits
+.*:3: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:4: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:5: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:6: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:7: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:8: Error: number \(0x0*100000000\) larger than 32 bits
+.*:10: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:11: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:12: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:13: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:14: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:15: Error: number \(0x0*100000000\) larger than 32 bits
+.*:17: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:18: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:19: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:20: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:21: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:22: Error: number \(0x0*100000000\) larger than 32 bits
+.*:24: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:25: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:26: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:27: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:28: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:29: Error: number \(0x0*100000000\) larger than 32 bits
+.*:31: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:32: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:32: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:33: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:33: Error: number \(0xabcdef0123450000\) larger than 32 bits
+.*:34: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:34: Error: number \(0x0*123456789ac0000\) larger than 32 bits
+.*:35: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:35: Error: number \(0x0*200000000\) larger than 32 bits
+.*:36: Error: number \(0x0*100000000\) larger than 32 bits
+.*:36: Error: number \(0x0*100000000\) larger than 32 bits
+.*:38: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:39: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:39: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:40: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:40: Error: number \(0xabcdef0123450000\) larger than 32 bits
+.*:41: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:41: Error: number \(0x0*123456789ac0000\) larger than 32 bits
+.*:42: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:42: Error: number \(0x0*200000000\) larger than 32 bits
+.*:43: Error: number \(0x0*100000000\) larger than 32 bits
+.*:43: Error: number \(0x0*100000000\) larger than 32 bits
+.*:45: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:46: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:46: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:47: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:47: Error: number \(0xabcdef0123450000\) larger than 32 bits
+.*:48: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:48: Error: number \(0x0*123456789ac0000\) larger than 32 bits
+.*:49: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:49: Error: number \(0x0*200000000\) larger than 32 bits
+.*:50: Error: number \(0x0*100000000\) larger than 32 bits
+.*:50: Error: number \(0x0*100000000\) larger than 32 bits
+.*:52: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:53: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:53: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:54: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:54: Error: number \(0xabcdef0123450000\) larger than 32 bits
+.*:55: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:55: Error: number \(0x0*123456789ac0000\) larger than 32 bits
+.*:56: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:56: Error: number \(0x0*200000000\) larger than 32 bits
+.*:57: Error: number \(0x0*100000000\) larger than 32 bits
+.*:57: Error: number \(0x0*100000000\) larger than 32 bits
+.*:59: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:60: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:61: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:62: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:63: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:64: Error: number \(0x0*100000000\) larger than 32 bits
+.*:66: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:67: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:68: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:69: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:70: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:71: Error: number \(0x0*100000000\) larger than 32 bits

diff --git a/gas/testsuite/gas/mips/ldstla-32-mips3-1.l b/gas/testsuite/gas/mips/ldstla-32-mips3-1.l
index 3ac34975cce8c587d41c2150809ec55f28914c19..7e3f8130029be95fcbf9386eba522551e3e2efe5 100644 (file)
--- a/gas/testsuite/gas/mips/ldstla-32-mips3-1.l
+++ b/gas/testsuite/gas/mips/ldstla-32-mips3-1.l
@@ -1,101 +1,101 @@
 .*: Assembler messages:
-.*:3: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:4: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:4: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:5: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:5: Error: Number \(0xabcdef0123450000\) larger than 32 bits
-.*:6: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:6: Error: Number \(0x0*123456789ac0000\) larger than 32 bits
-.*:7: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:7: Error: Number \(0x0*200000000\) larger than 32 bits
-.*:8: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:8: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:10: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:11: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:11: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:12: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:12: Error: Number \(0xabcdef0123450000\) larger than 32 bits
-.*:13: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:13: Error: Number \(0x0*123456789ac0000\) larger than 32 bits
-.*:14: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:14: Error: Number \(0x0*200000000\) larger than 32 bits
-.*:15: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:15: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:17: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:18: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:18: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:19: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:19: Error: Number \(0xabcdef0123450000\) larger than 32 bits
-.*:20: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:20: Error: Number \(0x0*123456789ac0000\) larger than 32 bits
-.*:21: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:21: Error: Number \(0x0*200000000\) larger than 32 bits
-.*:22: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:22: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:24: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:25: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:25: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:26: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:26: Error: Number \(0xabcdef0123450000\) larger than 32 bits
-.*:27: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:27: Error: Number \(0x0*123456789ac0000\) larger than 32 bits
-.*:28: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:28: Error: Number \(0x0*200000000\) larger than 32 bits
-.*:29: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:29: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:31: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:32: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:32: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:33: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:33: Error: Number \(0xabcdef0123450000\) larger than 32 bits
-.*:34: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:34: Error: Number \(0x0*123456789ac0000\) larger than 32 bits
-.*:35: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:35: Error: Number \(0x0*200000000\) larger than 32 bits
-.*:36: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:36: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:38: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:39: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:39: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:40: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:40: Error: Number \(0xabcdef0123450000\) larger than 32 bits
-.*:41: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:41: Error: Number \(0x0*123456789ac0000\) larger than 32 bits
-.*:42: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:42: Error: Number \(0x0*200000000\) larger than 32 bits
-.*:43: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:43: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:45: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:46: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:46: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:47: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:47: Error: Number \(0xabcdef0123450000\) larger than 32 bits
-.*:48: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:48: Error: Number \(0x0*123456789ac0000\) larger than 32 bits
-.*:49: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:49: Error: Number \(0x0*200000000\) larger than 32 bits
-.*:50: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:50: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:52: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:53: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:53: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:54: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:54: Error: Number \(0xabcdef0123450000\) larger than 32 bits
-.*:55: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:55: Error: Number \(0x0*123456789ac0000\) larger than 32 bits
-.*:56: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:56: Error: Number \(0x0*200000000\) larger than 32 bits
-.*:57: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:57: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:59: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:60: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:61: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:62: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:63: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:64: Error: Number \(0x0*100000000\) larger than 32 bits
-.*:66: Error: Number \(0xfffffffeffffffff\) larger than 32 bits
-.*:67: Error: Number \(0xfffffffe00000000\) larger than 32 bits
-.*:68: Error: Number \(0xabcdef0123456789\) larger than 32 bits
-.*:69: Error: Number \(0x0*123456789abcdef\) larger than 32 bits
-.*:70: Error: Number \(0x0*1ffffffff\) larger than 32 bits
-.*:71: Error: Number \(0x0*100000000\) larger than 32 bits
+.*:3: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:4: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:4: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:5: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:5: Error: number \(0xabcdef0123450000\) larger than 32 bits
+.*:6: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:6: Error: number \(0x0*123456789ac0000\) larger than 32 bits
+.*:7: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:7: Error: number \(0x0*200000000\) larger than 32 bits
+.*:8: Error: number \(0x0*100000000\) larger than 32 bits
+.*:8: Error: number \(0x0*100000000\) larger than 32 bits
+.*:10: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:11: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:11: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:12: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:12: Error: number \(0xabcdef0123450000\) larger than 32 bits
+.*:13: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:13: Error: number \(0x0*123456789ac0000\) larger than 32 bits
+.*:14: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:14: Error: number \(0x0*200000000\) larger than 32 bits
+.*:15: Error: number \(0x0*100000000\) larger than 32 bits
+.*:15: Error: number \(0x0*100000000\) larger than 32 bits
+.*:17: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:18: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:18: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:19: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:19: Error: number \(0xabcdef0123450000\) larger than 32 bits
+.*:20: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:20: Error: number \(0x0*123456789ac0000\) larger than 32 bits
+.*:21: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:21: Error: number \(0x0*200000000\) larger than 32 bits
+.*:22: Error: number \(0x0*100000000\) larger than 32 bits
+.*:22: Error: number \(0x0*100000000\) larger than 32 bits
+.*:24: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:25: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:25: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:26: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:26: Error: number \(0xabcdef0123450000\) larger than 32 bits
+.*:27: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:27: Error: number \(0x0*123456789ac0000\) larger than 32 bits
+.*:28: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:28: Error: number \(0x0*200000000\) larger than 32 bits
+.*:29: Error: number \(0x0*100000000\) larger than 32 bits
+.*:29: Error: number \(0x0*100000000\) larger than 32 bits
+.*:31: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:32: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:32: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:33: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:33: Error: number \(0xabcdef0123450000\) larger than 32 bits
+.*:34: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:34: Error: number \(0x0*123456789ac0000\) larger than 32 bits
+.*:35: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:35: Error: number \(0x0*200000000\) larger than 32 bits
+.*:36: Error: number \(0x0*100000000\) larger than 32 bits
+.*:36: Error: number \(0x0*100000000\) larger than 32 bits
+.*:38: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:39: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:39: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:40: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:40: Error: number \(0xabcdef0123450000\) larger than 32 bits
+.*:41: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:41: Error: number \(0x0*123456789ac0000\) larger than 32 bits
+.*:42: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:42: Error: number \(0x0*200000000\) larger than 32 bits
+.*:43: Error: number \(0x0*100000000\) larger than 32 bits
+.*:43: Error: number \(0x0*100000000\) larger than 32 bits
+.*:45: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:46: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:46: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:47: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:47: Error: number \(0xabcdef0123450000\) larger than 32 bits
+.*:48: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:48: Error: number \(0x0*123456789ac0000\) larger than 32 bits
+.*:49: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:49: Error: number \(0x0*200000000\) larger than 32 bits
+.*:50: Error: number \(0x0*100000000\) larger than 32 bits
+.*:50: Error: number \(0x0*100000000\) larger than 32 bits
+.*:52: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:53: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:53: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:54: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:54: Error: number \(0xabcdef0123450000\) larger than 32 bits
+.*:55: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:55: Error: number \(0x0*123456789ac0000\) larger than 32 bits
+.*:56: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:56: Error: number \(0x0*200000000\) larger than 32 bits
+.*:57: Error: number \(0x0*100000000\) larger than 32 bits
+.*:57: Error: number \(0x0*100000000\) larger than 32 bits
+.*:59: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:60: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:61: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:62: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:63: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:64: Error: number \(0x0*100000000\) larger than 32 bits
+.*:66: Error: number \(0xfffffffeffffffff\) larger than 32 bits
+.*:67: Error: number \(0xfffffffe00000000\) larger than 32 bits
+.*:68: Error: number \(0xabcdef0123456789\) larger than 32 bits
+.*:69: Error: number \(0x0*123456789abcdef\) larger than 32 bits
+.*:70: Error: number \(0x0*1ffffffff\) larger than 32 bits
+.*:71: Error: number \(0x0*100000000\) larger than 32 bits

diff --git a/gas/testsuite/gas/mips/lui-1.l b/gas/testsuite/gas/mips/lui-1.l
index 2cabcb9b47567def53d46bbe2153466ac7427e5d..8bf621d181fc5ffda69ef65aba7a47ae6fb4e89e 100644 (file)
--- a/gas/testsuite/gas/mips/lui-1.l
+++ b/gas/testsuite/gas/mips/lui-1.l
@@ -3,6 +3,6 @@
 .*\.s:6: Error: operand 2 out of range `lui \$2,65536'
 .*\.s:7: Error: bignum invalid
 .*\.s:8: Error: operand 2 must be an immediate expression `lui \$2,\$3'
-.*\.s:9: Error: Illegal operands `lui \$2,\(\$3\)'
+.*\.s:9: Error: invalid operands `lui \$2,\(\$3\)'
 .*\.s:10: Error: register value used as expression `lui \$2,0\+\$3'
 .*\.s:11: Error: register value used as expression `lui \$2,\(\(\$3\)\)'

diff --git a/gas/testsuite/gas/mips/macro-warn-1-n32.l b/gas/testsuite/gas/mips/macro-warn-1-n32.l
index eaa35eba835f6dbcd8fc15258165e12c1cce2cf4..909070086f03758822ff8a0a7d452ec0fa169224 100644 (file)
--- a/gas/testsuite/gas/mips/macro-warn-1-n32.l
+++ b/gas/testsuite/gas/mips/macro-warn-1-n32.l
@@ -1,6 +1,6 @@
 .*: Assembler messages:
-.*:6: Warning: Macro instruction expanded into multiple instructions
-.*:10: Warning: Macro instruction expanded into multiple instructions
-.*:12: Warning: Macro instruction expanded into multiple instructions
-.*:16: Warning: Macro instruction expanded into multiple instructions.*slot
-.*:20: Warning: Macro instruction expanded into multiple instructions.*slot
+.*:6: Warning: macro instruction expanded into multiple instructions
+.*:10: Warning: macro instruction expanded into multiple instructions
+.*:12: Warning: macro instruction expanded into multiple instructions
+.*:16: Warning: macro instruction expanded into multiple instructions.*slot
+.*:20: Warning: macro instruction expanded into multiple instructions.*slot

diff --git a/gas/testsuite/gas/mips/macro-warn-1.l b/gas/testsuite/gas/mips/macro-warn-1.l
index 3cf69a09da598c953df15fa9d25c1555b6f77a42..dc15dba8dd973d0deb87ccd5b89938f000bfcede 100644 (file)
--- a/gas/testsuite/gas/mips/macro-warn-1.l
+++ b/gas/testsuite/gas/mips/macro-warn-1.l
@@ -1,8 +1,8 @@
 .*: Assembler messages:
-.*:5: Warning: Macro instruction expanded into multiple instructions
-.*:10: Warning: Macro instruction expanded into multiple instructions
-.*:11: Warning: Macro instruction expanded into multiple instructions
-.*:12: Warning: Macro instruction expanded into multiple instructions
-.*:16: Warning: Macro instruction expanded into multiple instructions.*slot
-.*:18: Warning: Macro instruction expanded into multiple instructions.*slot
-.*:20: Warning: Macro instruction expanded into multiple instructions.*slot
+.*:5: Warning: macro instruction expanded into multiple instructions
+.*:10: Warning: macro instruction expanded into multiple instructions
+.*:11: Warning: macro instruction expanded into multiple instructions
+.*:12: Warning: macro instruction expanded into multiple instructions
+.*:16: Warning: macro instruction expanded into multiple instructions.*slot
+.*:18: Warning: macro instruction expanded into multiple instructions.*slot
+.*:20: Warning: macro instruction expanded into multiple instructions.*slot

diff --git a/gas/testsuite/gas/mips/macro-warn-2.l b/gas/testsuite/gas/mips/macro-warn-2.l
index 906de2251d8e337c2d4332b88a03a8fd8fb1737d..af333f3a11556f532cf7b655c69542ef3938f867 100644 (file)
--- a/gas/testsuite/gas/mips/macro-warn-2.l
+++ b/gas/testsuite/gas/mips/macro-warn-2.l
@@ -1,3 +1,3 @@
 .*: Assembler messages:
-.*:5: Warning: Macro instruction expanded into multiple instructions
-.*:9: Warning: Macro instruction expanded into multiple instructions.*slot
+.*:5: Warning: macro instruction expanded into multiple instructions
+.*:9: Warning: macro instruction expanded into multiple instructions.*slot

diff --git a/gas/testsuite/gas/mips/macro-warn-3.l b/gas/testsuite/gas/mips/macro-warn-3.l
index 33ecc74027887ef97ba9b55f8834cc53a526eb20..7b873ff789de3cbe63aa7c2504c336affe69b9c6 100644 (file)
--- a/gas/testsuite/gas/mips/macro-warn-3.l
+++ b/gas/testsuite/gas/mips/macro-warn-3.l
@@ -1,3 +1,3 @@
 .*: Assembler messages:
-.*:4: Warning: Macro instruction expanded into multiple instructions
-.*:7: Warning: Macro instruction expanded into multiple instructions.*slot
+.*:4: Warning: macro instruction expanded into multiple instructions
+.*:7: Warning: macro instruction expanded into multiple instructions.*slot

diff --git a/gas/testsuite/gas/mips/macro-warn-4.l b/gas/testsuite/gas/mips/macro-warn-4.l
index abd23b058818c09a7126e78edf97b807fd8e8741..be603c34411aadb2f489d0f10bd567e0c010f0c9 100644 (file)
--- a/gas/testsuite/gas/mips/macro-warn-4.l
+++ b/gas/testsuite/gas/mips/macro-warn-4.l
@@ -1,3 +1,3 @@
 .*: Assembler messages:
-.*:3: Warning: Macro instruction expanded into multiple instructions
-.*:5: Warning: Macro instruction expanded into multiple instructions.*slot
+.*:3: Warning: macro instruction expanded into multiple instructions
+.*:5: Warning: macro instruction expanded into multiple instructions.*slot

diff --git a/gas/testsuite/gas/mips/micromips-branch-delay.l b/gas/testsuite/gas/mips/micromips-branch-delay.l
index a70eb41b7183376eaa2fde319680e272bc60dc06..ca142703a978a248cdba8ca835a0518e46e6cfab 100644 (file)
--- a/gas/testsuite/gas/mips/micromips-branch-delay.l
+++ b/gas/testsuite/gas/mips/micromips-branch-delay.l
@@ -1,24 +1,24 @@
 .*: Assembler messages:
-.*:17: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:19: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:21: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
-.*:40: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:44: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:46: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:71: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:90: Warning: Macro instruction expanded into multiple instructions in a branch delay slot
-.*:92: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
-.*:94: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
-.*:96: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
-.*:98: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
-.*:100: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
-.*:100: Warning: Macro instruction expanded into multiple instructions in a branch delay slot
-.*:110: Warning: Macro instruction expanded into multiple instructions in a branch delay slot
-.*:121: Warning: Macro instruction expanded into multiple instructions in a branch delay slot
-.*:123: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
-.*:125: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
-.*:127: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
-.*:129: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
-.*:131: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
-.*:131: Warning: Macro instruction expanded into multiple instructions in a branch delay slot
-.*:141: Warning: Macro instruction expanded into multiple instructions in a branch delay slot
+.*:17: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:19: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:21: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
+.*:40: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:44: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:46: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:71: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:90: Warning: macro instruction expanded into multiple instructions in a branch delay slot
+.*:92: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
+.*:94: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
+.*:96: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
+.*:98: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
+.*:100: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
+.*:100: Warning: macro instruction expanded into multiple instructions in a branch delay slot
+.*:110: Warning: macro instruction expanded into multiple instructions in a branch delay slot
+.*:121: Warning: macro instruction expanded into multiple instructions in a branch delay slot
+.*:123: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
+.*:125: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
+.*:127: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
+.*:129: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
+.*:131: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
+.*:131: Warning: macro instruction expanded into multiple instructions in a branch delay slot
+.*:141: Warning: macro instruction expanded into multiple instructions in a branch delay slot

diff --git a/gas/testsuite/gas/mips/micromips-branch-relax-pic.l b/gas/testsuite/gas/mips/micromips-branch-relax-pic.l
index ca3bdce0762c8593c2801ed40914a01b43bf9fa7..7cb5f8d65023e5da596d0be6caecabb68abc5d84 100644 (file)
--- a/gas/testsuite/gas/mips/micromips-branch-relax-pic.l
+++ b/gas/testsuite/gas/mips/micromips-branch-relax-pic.l
@@ -1,50 +1,50 @@
 .*: Assembler messages:
-.*:61: Warning: No .cprestore pseudo-op used in PIC code
-.*:59: Warning: Relaxed out-of-range branch into a jump
-.*:63: Warning: Relaxed out-of-range branch into a jump
-.*:65: Warning: Relaxed out-of-range branch into a jump
-.*:67: Warning: Relaxed out-of-range branch into a jump
-.*:69: Warning: Relaxed out-of-range branch into a jump
-.*:71: Warning: Relaxed out-of-range branch into a jump
-.*:73: Warning: Relaxed out-of-range branch into a jump
-.*:75: Warning: Relaxed out-of-range branch into a jump
-.*:77: Warning: Relaxed out-of-range branch into a jump
-.*:79: Warning: Relaxed out-of-range branch into a jump
-.*:81: Warning: Relaxed out-of-range branch into a jump
-.*:83: Warning: Relaxed out-of-range branch into a jump
-.*:85: Warning: Relaxed out-of-range branch into a jump
-.*:87: Warning: Relaxed out-of-range branch into a jump
-.*:89: Warning: Relaxed out-of-range branch into a jump
-.*:91: Warning: Relaxed out-of-range branch into a jump
-.*:93: Warning: Relaxed out-of-range branch into a jump
-.*:95: Warning: Relaxed out-of-range branch into a jump
-.*:97: Warning: Relaxed out-of-range branch into a jump
-.*:99: Warning: Relaxed out-of-range branch into a jump
-.*:101: Warning: Relaxed out-of-range branch into a jump
-.*:103: Warning: Relaxed out-of-range branch into a jump
-.*:105: Warning: Relaxed out-of-range branch into a jump
-.*:107: Warning: Relaxed out-of-range branch into a jump
-.*:109: Warning: Relaxed out-of-range branch into a jump
-.*:111: Warning: Relaxed out-of-range branch into a jump
-.*:113: Warning: Relaxed out-of-range branch into a jump
-.*:115: Warning: Relaxed out-of-range branch into a jump
-.*:117: Warning: Relaxed out-of-range branch into a jump
-.*:119: Warning: Relaxed out-of-range branch into a jump
-.*:121: Warning: Relaxed out-of-range branch into a jump
-.*:123: Warning: Relaxed out-of-range branch into a jump
-.*:125: Warning: Relaxed out-of-range branch into a jump
-.*:127: Warning: Relaxed out-of-range branch into a jump
-.*:129: Warning: Relaxed out-of-range branch into a jump
-.*:131: Warning: Relaxed out-of-range branch into a jump
-.*:133: Warning: Relaxed out-of-range branch into a jump
-.*:135: Warning: Relaxed out-of-range branch into a jump
-.*:137: Warning: Relaxed out-of-range branch into a jump
-.*:139: Warning: Relaxed out-of-range branch into a jump
-.*:141: Warning: Relaxed out-of-range branch into a jump
-.*:143: Warning: Relaxed out-of-range branch into a jump
-.*:145: Warning: Relaxed out-of-range branch into a jump
-.*:147: Warning: Relaxed out-of-range branch into a jump
-.*:149: Warning: Relaxed out-of-range branch into a jump
-.*:151: Warning: Relaxed out-of-range branch into a jump
-.*:153: Warning: Relaxed out-of-range branch into a jump
-.*:155: Warning: Relaxed out-of-range branch into a jump
+.*:61: Warning: no .cprestore pseudo-op used in PIC code
+.*:59: Warning: relaxed out-of-range branch into a jump
+.*:63: Warning: relaxed out-of-range branch into a jump
+.*:65: Warning: relaxed out-of-range branch into a jump
+.*:67: Warning: relaxed out-of-range branch into a jump
+.*:69: Warning: relaxed out-of-range branch into a jump
+.*:71: Warning: relaxed out-of-range branch into a jump
+.*:73: Warning: relaxed out-of-range branch into a jump
+.*:75: Warning: relaxed out-of-range branch into a jump
+.*:77: Warning: relaxed out-of-range branch into a jump
+.*:79: Warning: relaxed out-of-range branch into a jump
+.*:81: Warning: relaxed out-of-range branch into a jump
+.*:83: Warning: relaxed out-of-range branch into a jump
+.*:85: Warning: relaxed out-of-range branch into a jump
+.*:87: Warning: relaxed out-of-range branch into a jump
+.*:89: Warning: relaxed out-of-range branch into a jump
+.*:91: Warning: relaxed out-of-range branch into a jump
+.*:93: Warning: relaxed out-of-range branch into a jump
+.*:95: Warning: relaxed out-of-range branch into a jump
+.*:97: Warning: relaxed out-of-range branch into a jump
+.*:99: Warning: relaxed out-of-range branch into a jump
+.*:101: Warning: relaxed out-of-range branch into a jump
+.*:103: Warning: relaxed out-of-range branch into a jump
+.*:105: Warning: relaxed out-of-range branch into a jump
+.*:107: Warning: relaxed out-of-range branch into a jump
+.*:109: Warning: relaxed out-of-range branch into a jump
+.*:111: Warning: relaxed out-of-range branch into a jump
+.*:113: Warning: relaxed out-of-range branch into a jump
+.*:115: Warning: relaxed out-of-range branch into a jump
+.*:117: Warning: relaxed out-of-range branch into a jump
+.*:119: Warning: relaxed out-of-range branch into a jump
+.*:121: Warning: relaxed out-of-range branch into a jump
+.*:123: Warning: relaxed out-of-range branch into a jump
+.*:125: Warning: relaxed out-of-range branch into a jump
+.*:127: Warning: relaxed out-of-range branch into a jump
+.*:129: Warning: relaxed out-of-range branch into a jump
+.*:131: Warning: relaxed out-of-range branch into a jump
+.*:133: Warning: relaxed out-of-range branch into a jump
+.*:135: Warning: relaxed out-of-range branch into a jump
+.*:137: Warning: relaxed out-of-range branch into a jump
+.*:139: Warning: relaxed out-of-range branch into a jump
+.*:141: Warning: relaxed out-of-range branch into a jump
+.*:143: Warning: relaxed out-of-range branch into a jump
+.*:145: Warning: relaxed out-of-range branch into a jump
+.*:147: Warning: relaxed out-of-range branch into a jump
+.*:149: Warning: relaxed out-of-range branch into a jump
+.*:151: Warning: relaxed out-of-range branch into a jump
+.*:153: Warning: relaxed out-of-range branch into a jump
+.*:155: Warning: relaxed out-of-range branch into a jump

diff --git a/gas/testsuite/gas/mips/micromips-branch-relax.l b/gas/testsuite/gas/mips/micromips-branch-relax.l
index bb7599e37daedd0dae700865094487c6b65c6262..b8057274916b77836c77aff391c45f6aa97523fb 100644 (file)
--- a/gas/testsuite/gas/mips/micromips-branch-relax.l
+++ b/gas/testsuite/gas/mips/micromips-branch-relax.l
@@ -1,48 +1,48 @@
 .*: Assembler messages:
-.*:63: Warning: Relaxed out-of-range branch into a jump
-.*:65: Warning: Relaxed out-of-range branch into a jump
-.*:67: Warning: Relaxed out-of-range branch into a jump
-.*:69: Warning: Relaxed out-of-range branch into a jump
-.*:71: Warning: Relaxed out-of-range branch into a jump
-.*:73: Warning: Relaxed out-of-range branch into a jump
-.*:75: Warning: Relaxed out-of-range branch into a jump
-.*:77: Warning: Relaxed out-of-range branch into a jump
-.*:79: Warning: Relaxed out-of-range branch into a jump
-.*:81: Warning: Relaxed out-of-range branch into a jump
-.*:83: Warning: Relaxed out-of-range branch into a jump
-.*:85: Warning: Relaxed out-of-range branch into a jump
-.*:87: Warning: Relaxed out-of-range branch into a jump
-.*:89: Warning: Relaxed out-of-range branch into a jump
-.*:91: Warning: Relaxed out-of-range branch into a jump
-.*:93: Warning: Relaxed out-of-range branch into a jump
-.*:95: Warning: Relaxed out-of-range branch into a jump
-.*:97: Warning: Relaxed out-of-range branch into a jump
-.*:99: Warning: Relaxed out-of-range branch into a jump
-.*:101: Warning: Relaxed out-of-range branch into a jump
-.*:103: Warning: Relaxed out-of-range branch into a jump
-.*:105: Warning: Relaxed out-of-range branch into a jump
-.*:107: Warning: Relaxed out-of-range branch into a jump
-.*:109: Warning: Relaxed out-of-range branch into a jump
-.*:111: Warning: Relaxed out-of-range branch into a jump
-.*:113: Warning: Relaxed out-of-range branch into a jump
-.*:115: Warning: Relaxed out-of-range branch into a jump
-.*:117: Warning: Relaxed out-of-range branch into a jump
-.*:119: Warning: Relaxed out-of-range branch into a jump
-.*:121: Warning: Relaxed out-of-range branch into a jump
-.*:123: Warning: Relaxed out-of-range branch into a jump
-.*:125: Warning: Relaxed out-of-range branch into a jump
-.*:127: Warning: Relaxed out-of-range branch into a jump
-.*:129: Warning: Relaxed out-of-range branch into a jump
-.*:131: Warning: Relaxed out-of-range branch into a jump
-.*:133: Warning: Relaxed out-of-range branch into a jump
-.*:135: Warning: Relaxed out-of-range branch into a jump
-.*:137: Warning: Relaxed out-of-range branch into a jump
-.*:139: Warning: Relaxed out-of-range branch into a jump
-.*:141: Warning: Relaxed out-of-range branch into a jump
-.*:143: Warning: Relaxed out-of-range branch into a jump
-.*:145: Warning: Relaxed out-of-range branch into a jump
-.*:147: Warning: Relaxed out-of-range branch into a jump
-.*:149: Warning: Relaxed out-of-range branch into a jump
-.*:151: Warning: Relaxed out-of-range branch into a jump
-.*:153: Warning: Relaxed out-of-range branch into a jump
-.*:155: Warning: Relaxed out-of-range branch into a jump
+.*:63: Warning: relaxed out-of-range branch into a jump
+.*:65: Warning: relaxed out-of-range branch into a jump
+.*:67: Warning: relaxed out-of-range branch into a jump
+.*:69: Warning: relaxed out-of-range branch into a jump
+.*:71: Warning: relaxed out-of-range branch into a jump
+.*:73: Warning: relaxed out-of-range branch into a jump
+.*:75: Warning: relaxed out-of-range branch into a jump
+.*:77: Warning: relaxed out-of-range branch into a jump
+.*:79: Warning: relaxed out-of-range branch into a jump
+.*:81: Warning: relaxed out-of-range branch into a jump
+.*:83: Warning: relaxed out-of-range branch into a jump
+.*:85: Warning: relaxed out-of-range branch into a jump
+.*:87: Warning: relaxed out-of-range branch into a jump
+.*:89: Warning: relaxed out-of-range branch into a jump
+.*:91: Warning: relaxed out-of-range branch into a jump
+.*:93: Warning: relaxed out-of-range branch into a jump
+.*:95: Warning: relaxed out-of-range branch into a jump
+.*:97: Warning: relaxed out-of-range branch into a jump
+.*:99: Warning: relaxed out-of-range branch into a jump
+.*:101: Warning: relaxed out-of-range branch into a jump
+.*:103: Warning: relaxed out-of-range branch into a jump
+.*:105: Warning: relaxed out-of-range branch into a jump
+.*:107: Warning: relaxed out-of-range branch into a jump
+.*:109: Warning: relaxed out-of-range branch into a jump
+.*:111: Warning: relaxed out-of-range branch into a jump
+.*:113: Warning: relaxed out-of-range branch into a jump
+.*:115: Warning: relaxed out-of-range branch into a jump
+.*:117: Warning: relaxed out-of-range branch into a jump
+.*:119: Warning: relaxed out-of-range branch into a jump
+.*:121: Warning: relaxed out-of-range branch into a jump
+.*:123: Warning: relaxed out-of-range branch into a jump
+.*:125: Warning: relaxed out-of-range branch into a jump
+.*:127: Warning: relaxed out-of-range branch into a jump
+.*:129: Warning: relaxed out-of-range branch into a jump
+.*:131: Warning: relaxed out-of-range branch into a jump
+.*:133: Warning: relaxed out-of-range branch into a jump
+.*:135: Warning: relaxed out-of-range branch into a jump
+.*:137: Warning: relaxed out-of-range branch into a jump
+.*:139: Warning: relaxed out-of-range branch into a jump
+.*:141: Warning: relaxed out-of-range branch into a jump
+.*:143: Warning: relaxed out-of-range branch into a jump
+.*:145: Warning: relaxed out-of-range branch into a jump
+.*:147: Warning: relaxed out-of-range branch into a jump
+.*:149: Warning: relaxed out-of-range branch into a jump
+.*:151: Warning: relaxed out-of-range branch into a jump
+.*:153: Warning: relaxed out-of-range branch into a jump
+.*:155: Warning: relaxed out-of-range branch into a jump

diff --git a/gas/testsuite/gas/mips/micromips-ill.l b/gas/testsuite/gas/mips/micromips-ill.l
index 9e7817587c434067cf3f6f50d732e0788446f20b..a3081fa86bddacb9a186ef1c72c83ef4fa8dcc1e 100644 (file)
--- a/gas/testsuite/gas/mips/micromips-ill.l
+++ b/gas/testsuite/gas/mips/micromips-ill.l
@@ -1,9 +1,9 @@
 .*: Assembler messages:
-.*:2: Error: Invalid register range `lwm \$16-17,0\(\$4\)'
-.*:3: Error: Illegal operands `lwm \$17-\$16,0\(\$4\)'
-.*:4: Error: Illegal operands `lwm \$16-\$f17,0\(\$4\)'
-.*:5: Error: Illegal operands `lwm \$f16-\$17,0\(\$4\)'
+.*:2: Error: invalid register range `lwm \$16-17,0\(\$4\)'
+.*:3: Error: invalid operands `lwm \$17-\$16,0\(\$4\)'
+.*:4: Error: invalid operands `lwm \$16-\$f17,0\(\$4\)'
+.*:5: Error: invalid operands `lwm \$f16-\$17,0\(\$4\)'
 .*:6: Error: floating-point expression required `li\.s \$4,foo'
 .*:7: Error: cannot create floating-point number
 .*:8: Error: floating-point expression required `li\.s \$4,\$4'
-.*:9: Error: Illegal operands `li\.s 1.0'
+.*:9: Error: invalid operands `li\.s 1.0'

diff --git a/gas/testsuite/gas/mips/micromips-size-0.l b/gas/testsuite/gas/mips/micromips-size-0.l
index e34d83b42fa644cbab6e2e45dd42c0a8981165e7..f30cb7c20ee9994ba9c97cd3cd587f700deec8a5 100644 (file)
--- a/gas/testsuite/gas/mips/micromips-size-0.l
+++ b/gas/testsuite/gas/mips/micromips-size-0.l
@@ -1,39 +1,39 @@
 .*: Assembler messages:
-.*:15: Error: Illegal operands `addu16 \$12,\$14'
-.*:18: Error: Unrecognized 16-bit version of microMIPS opcode `add16\.ps \$f2,\$f4'
-.*:22: Error: Unrecognized 32-bit version of microMIPS opcode `addiusp32 256'
-.*:25: Error: Unrecognized opcode `jar \$23'
-.*:26: Error: Unrecognized opcode `jar16 \$23'
-.*:27: Error: Unrecognized opcode `jar32 \$23'
-.*:41: Error: Illegal operands `jalr16 \$30,\$26'
-.*:50: Error: Illegal operands `beqz16 \$27,bar'
-.*:58: Warning: Wrong size instruction in a 32-bit branch delay slot
-.*:66: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:70: Error: Unrecognized 16-bit version of microMIPS opcode `add16\.ps \$f2,\$f4'
-.*:74: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:76: Error: Unrecognized 16-bit version of microMIPS opcode `add16\.ps \$f2,\$f4'
-.*:77: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:78: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:80: Warning: Wrong size instruction in a 32-bit branch delay slot
-.*:82: Warning: Wrong size instruction in a 32-bit branch delay slot
-.*:84: Error: Unrecognized 32-bit version of microMIPS opcode `addiusp32 256'
-.*:90: Error: Unrecognized 32-bit version of microMIPS opcode `addiusp32 256'
-.*:95: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
-.*:95: Warning: Macro instruction expanded into multiple instructions in a branch delay slot
-.*:98: Warning: Wrong size instruction in a 32-bit branch delay slot
-.*:104: Error: Unrecognized 16-bit version of microMIPS opcode `add16\.ps \$f2,\$f4'
-.*:105: Warning: Macro instruction expanded into multiple instructions in a branch delay slot
-.*:108: Warning: Wrong size instruction in a 32-bit branch delay slot
-.*:110: Warning: Wrong size instruction in a 32-bit branch delay slot
-.*:112: Error: Unrecognized 32-bit version of microMIPS opcode `addiusp32 256'
+.*:15: Error: invalid operands `addu16 \$12,\$14'
+.*:18: Error: unrecognized 16-bit version of microMIPS opcode `add16\.ps \$f2,\$f4'
+.*:22: Error: unrecognized 32-bit version of microMIPS opcode `addiusp32 256'
+.*:25: Error: unrecognized opcode `jar \$23'
+.*:26: Error: unrecognized opcode `jar16 \$23'
+.*:27: Error: unrecognized opcode `jar32 \$23'
+.*:41: Error: invalid operands `jalr16 \$30,\$26'
+.*:50: Error: invalid operands `beqz16 \$27,bar'
+.*:58: Warning: wrong size instruction in a 32-bit branch delay slot
+.*:66: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:70: Error: unrecognized 16-bit version of microMIPS opcode `add16\.ps \$f2,\$f4'
+.*:74: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:76: Error: unrecognized 16-bit version of microMIPS opcode `add16\.ps \$f2,\$f4'
+.*:77: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:78: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:80: Warning: wrong size instruction in a 32-bit branch delay slot
+.*:82: Warning: wrong size instruction in a 32-bit branch delay slot
+.*:84: Error: unrecognized 32-bit version of microMIPS opcode `addiusp32 256'
+.*:90: Error: unrecognized 32-bit version of microMIPS opcode `addiusp32 256'
+.*:95: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
+.*:95: Warning: macro instruction expanded into multiple instructions in a branch delay slot
+.*:98: Warning: wrong size instruction in a 32-bit branch delay slot
+.*:104: Error: unrecognized 16-bit version of microMIPS opcode `add16\.ps \$f2,\$f4'
+.*:105: Warning: macro instruction expanded into multiple instructions in a branch delay slot
+.*:108: Warning: wrong size instruction in a 32-bit branch delay slot
+.*:110: Warning: wrong size instruction in a 32-bit branch delay slot
+.*:112: Error: unrecognized 32-bit version of microMIPS opcode `addiusp32 256'
 .*:120: Error: operand 3 out of range `sll16 \$2,\$3,13'
-.*:123: Error: Illegal operands `sll16 \$10,\$11,5'
-.*:128: Error: Unrecognized 16-bit version of microMIPS opcode `dsll16 \$2,\$3,5'
-.*:130: Error: Unrecognized 16-bit version of microMIPS opcode `dsll3216 \$2,\$3,5'
-.*:133: Error: Unrecognized 16-bit version of microMIPS opcode `dsll16 \$2,\$3,13'
-.*:135: Error: Unrecognized 16-bit version of microMIPS opcode `dsll3216 \$2,\$3,13'
-.*:138: Error: Unrecognized 16-bit version of microMIPS opcode `dsll16 \$10,\$11,5'
-.*:140: Error: Unrecognized 16-bit version of microMIPS opcode `dsll3216 \$10,\$11,5'
+.*:123: Error: invalid operands `sll16 \$10,\$11,5'
+.*:128: Error: unrecognized 16-bit version of microMIPS opcode `dsll16 \$2,\$3,5'
+.*:130: Error: unrecognized 16-bit version of microMIPS opcode `dsll3216 \$2,\$3,5'
+.*:133: Error: unrecognized 16-bit version of microMIPS opcode `dsll16 \$2,\$3,13'
+.*:135: Error: unrecognized 16-bit version of microMIPS opcode `dsll3216 \$2,\$3,13'
+.*:138: Error: unrecognized 16-bit version of microMIPS opcode `dsll16 \$10,\$11,5'
+.*:140: Error: unrecognized 16-bit version of microMIPS opcode `dsll3216 \$10,\$11,5'
 .*:145: Error: operand 3 out of range `addiu16 \$2,\$4,5'
 .*:146: Error: operand 3 out of range `addiu16 \$2,\$4,7'
 .*:149: Error: operand 3 out of range `andi16 \$2,\$4,5'

diff --git a/gas/testsuite/gas/mips/micromips-size-1.l b/gas/testsuite/gas/mips/micromips-size-1.l
index 1552094743335754174c9361e1f79b21a185d77c..2ff6e309be512ceb4d3e4475e6cadba50beaa469 100644 (file)
--- a/gas/testsuite/gas/mips/micromips-size-1.l
+++ b/gas/testsuite/gas/mips/micromips-size-1.l
@@ -1,10 +1,10 @@
 .*: Assembler messages:
-.*:50: Warning: Wrong size instruction in a 32-bit branch delay slot
-.*:58: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:64: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:66: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:68: Warning: Wrong size instruction in a 32-bit branch delay slot
-.*:70: Warning: Wrong size instruction in a 32-bit branch delay slot
-.*:82: Warning: Wrong size instruction in a 32-bit branch delay slot
-.*:90: Warning: Wrong size instruction in a 32-bit branch delay slot
-.*:92: Warning: Wrong size instruction in a 32-bit branch delay slot
+.*:50: Warning: wrong size instruction in a 32-bit branch delay slot
+.*:58: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:64: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:66: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:68: Warning: wrong size instruction in a 32-bit branch delay slot
+.*:70: Warning: wrong size instruction in a 32-bit branch delay slot
+.*:82: Warning: wrong size instruction in a 32-bit branch delay slot
+.*:90: Warning: wrong size instruction in a 32-bit branch delay slot
+.*:92: Warning: wrong size instruction in a 32-bit branch delay slot

diff --git a/gas/testsuite/gas/mips/micromips-warn-branch-delay.l b/gas/testsuite/gas/mips/micromips-warn-branch-delay.l
index 12a0e9b7abc010d3129fd1e7959d4f6b68a00faa..a578f7dcf41dd197107aa025dbbfb8c81b3e4056 100644 (file)
--- a/gas/testsuite/gas/mips/micromips-warn-branch-delay.l
+++ b/gas/testsuite/gas/mips/micromips-warn-branch-delay.l
@@ -1,8 +1,8 @@
 .*: Assembler messages:
-.*:8: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:10: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:12: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:14: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:16: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:18: Warning: Wrong size instruction in a 16-bit branch delay slot
-.*:20: Warning: Wrong size instruction in a 16-bit branch delay slot
+.*:8: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:10: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:12: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:14: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:16: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:18: Warning: wrong size instruction in a 16-bit branch delay slot
+.*:20: Warning: wrong size instruction in a 16-bit branch delay slot

diff --git a/gas/testsuite/gas/mips/micromips-warn.l b/gas/testsuite/gas/mips/micromips-warn.l
index 1e43462f2424a0588bbb078c557333c41c0104bf..640a4286e539a04a0f689ced11b273c007426abd 100644 (file)
--- a/gas/testsuite/gas/mips/micromips-warn.l
+++ b/gas/testsuite/gas/mips/micromips-warn.l
@@ -1,27 +1,27 @@
 .*: Assembler messages:
-.*:578: Warning: Divide by zero.
-.*:581: Warning: Divide by zero.
-.*:594: Warning: Divide by zero.
-.*:1559: Warning: Divide by zero.
-.*:1562: Warning: Divide by zero.
-.*:1575: Warning: Divide by zero.
-.*:2622: Warning: Branch bge is always true
-.*:2625: Warning: Branch bgeu is always true
-.*:2634: Warning: Branch bgeu is always true
-.*:2709: Warning: Branch ble is always true
-.*:2724: Warning: Branch bleu is always true
-.*:2730: Warning: Branch bleu is always true
-.*:2733: Warning: Branch bleu is always true
-.*:2832: Warning: Branch bgel is always true
-.*:2835: Warning: Branch bgeul is always true
-.*:2844: Warning: Branch bgeul is always true
-.*:2919: Warning: Branch blel is always true
-.*:2934: Warning: Branch bleul is always true
-.*:2940: Warning: Branch bleul is always true
-.*:2943: Warning: Branch bleul is always true
-.*:4759: Warning: Divide by zero.
-.*:4762: Warning: Divide by zero.
-.*:4775: Warning: Divide by zero.
-.*:5180: Warning: Divide by zero.
-.*:5190: Warning: Divide by zero.
-.*:5200: Warning: Divide by zero.
+.*:578: Warning: divide by zero
+.*:581: Warning: divide by zero
+.*:594: Warning: divide by zero
+.*:1559: Warning: divide by zero
+.*:1562: Warning: divide by zero
+.*:1575: Warning: divide by zero
+.*:2622: Warning: branch bge is always true
+.*:2625: Warning: branch bgeu is always true
+.*:2634: Warning: branch bgeu is always true
+.*:2709: Warning: branch ble is always true
+.*:2724: Warning: branch bleu is always true
+.*:2730: Warning: branch bleu is always true
+.*:2733: Warning: branch bleu is always true
+.*:2832: Warning: branch bgel is always true
+.*:2835: Warning: branch bgeul is always true
+.*:2844: Warning: branch bgeul is always true
+.*:2919: Warning: branch blel is always true
+.*:2934: Warning: branch bleul is always true
+.*:2940: Warning: branch bleul is always true
+.*:2943: Warning: branch bleul is always true
+.*:4759: Warning: divide by zero
+.*:4762: Warning: divide by zero
+.*:4775: Warning: divide by zero
+.*:5180: Warning: divide by zero
+.*:5190: Warning: divide by zero
+.*:5200: Warning: divide by zero

diff --git a/gas/testsuite/gas/mips/micromips.l b/gas/testsuite/gas/mips/micromips.l
index 8a533f3991f0db078c897a39a17b19b9413e93ae..a9486566394d5881dd3ae379e59dd306e49ec503 100644 (file)
--- a/gas/testsuite/gas/mips/micromips.l
+++ b/gas/testsuite/gas/mips/micromips.l
@@ -1,107 +1,107 @@
 .*: Assembler messages:
-.*:39: Error: Opcode not supported in the `insn32' mode `nop16'
-.*:98: Error: Opcode not supported in the `insn32' mode `move16 \$2,\$22'
-.*:99: Error: Opcode not supported in the `insn32' mode `move16 \$22,\$2'
-.*:106: Error: Opcode not supported in the `insn32' mode `b16 test'
-.*:111: Error: Opcode not supported in the `insn32' mode `b16 1f'
-.*:117: Error: Opcode not supported in the `insn32' mode `b16 1b'
-.*:277: Error: Opcode not supported in the `insn32' mode `and16 \$2,\$2,\$3'
-.*:315: Error: Opcode not supported in the `insn32' mode `andi16 \$7,65535'
-.*:387: Error: Opcode not supported in the `insn32' mode `beqz16 \$16,test2'
-.*:475: Error: Opcode not supported in the `insn32' mode `bnez16 \$16,test3'
-.*:578: Warning: Divide by zero.
-.*:581: Warning: Divide by zero.
-.*:594: Warning: Divide by zero.
-.*:1559: Warning: Divide by zero.
-.*:1562: Warning: Divide by zero.
-.*:1575: Warning: Divide by zero.
-.*:2622: Warning: Branch bge is always true
-.*:2625: Warning: Branch bgeu is always true
-.*:2634: Warning: Branch bgeu is always true
-.*:2709: Warning: Branch ble is always true
-.*:2724: Warning: Branch bleu is always true
-.*:2730: Warning: Branch bleu is always true
-.*:2733: Warning: Branch bleu is always true
-.*:2832: Warning: Branch bgel is always true
-.*:2835: Warning: Branch bgeul is always true
-.*:2844: Warning: Branch bgeul is always true
-.*:2919: Warning: Branch blel is always true
-.*:2934: Warning: Branch bleul is always true
-.*:2940: Warning: Branch bleul is always true
-.*:2943: Warning: Branch bleul is always true
-.*:3010: Error: Opcode not supported in the `insn32' mode `addiur1sp \$2,0'
-.*:3011: Error: Opcode not supported in the `insn32' mode `addiur1sp \$2,1<<2'
-.*:3012: Error: Opcode not supported in the `insn32' mode `addiur1sp \$2,2<<2'
-.*:3013: Error: Opcode not supported in the `insn32' mode `addiur1sp \$2,3<<2'
-.*:3014: Error: Opcode not supported in the `insn32' mode `addiur1sp \$2,4<<2'
-.*:3015: Error: Opcode not supported in the `insn32' mode `addiur1sp \$2,63<<2'
-.*:3016: Error: Opcode not supported in the `insn32' mode `addiur1sp \$3,63<<2'
-.*:3017: Error: Opcode not supported in the `insn32' mode `addiur1sp \$4,63<<2'
-.*:3018: Error: Opcode not supported in the `insn32' mode `addiur1sp \$5,63<<2'
-.*:3019: Error: Opcode not supported in the `insn32' mode `addiur1sp \$6,63<<2'
-.*:3020: Error: Opcode not supported in the `insn32' mode `addiur1sp \$7,63<<2'
-.*:3021: Error: Opcode not supported in the `insn32' mode `addiur1sp \$16,63<<2'
-.*:3022: Error: Opcode not supported in the `insn32' mode `addiur1sp \$17,63<<2'
-.*:3024: Error: Opcode not supported in the `insn32' mode `addiur2 \$2,\$2,-1'
-.*:3025: Error: Opcode not supported in the `insn32' mode `addiur2 \$2,\$3,-1'
-.*:3026: Error: Opcode not supported in the `insn32' mode `addiur2 \$2,\$4,-1'
-.*:3027: Error: Opcode not supported in the `insn32' mode `addiur2 \$2,\$5,-1'
-.*:3028: Error: Opcode not supported in the `insn32' mode `addiur2 \$2,\$6,-1'
-.*:3029: Error: Opcode not supported in the `insn32' mode `addiur2 \$2,\$7,-1'
-.*:3030: Error: Opcode not supported in the `insn32' mode `addiur2 \$2,\$16,-1'
-.*:3031: Error: Opcode not supported in the `insn32' mode `addiur2 \$2,\$17,-1'
-.*:3032: Error: Opcode not supported in the `insn32' mode `addiur2 \$3,\$17,-1'
-.*:3033: Error: Opcode not supported in the `insn32' mode `addiur2 \$4,\$17,-1'
-.*:3034: Error: Opcode not supported in the `insn32' mode `addiur2 \$5,\$17,-1'
-.*:3035: Error: Opcode not supported in the `insn32' mode `addiur2 \$6,\$17,-1'
-.*:3036: Error: Opcode not supported in the `insn32' mode `addiur2 \$7,\$17,-1'
-.*:3037: Error: Opcode not supported in the `insn32' mode `addiur2 \$16,\$17,-1'
-.*:3038: Error: Opcode not supported in the `insn32' mode `addiur2 \$17,\$17,-1'
-.*:3039: Error: Opcode not supported in the `insn32' mode `addiur2 \$17,\$17,1'
-.*:3040: Error: Opcode not supported in the `insn32' mode `addiur2 \$17,\$17,4'
-.*:3041: Error: Opcode not supported in the `insn32' mode `addiur2 \$17,\$17,8'
-.*:3042: Error: Opcode not supported in the `insn32' mode `addiur2 \$17,\$17,12'
-.*:3043: Error: Opcode not supported in the `insn32' mode `addiur2 \$17,\$17,16'
-.*:3044: Error: Opcode not supported in the `insn32' mode `addiur2 \$17,\$17,20'
-.*:3045: Error: Opcode not supported in the `insn32' mode `addiur2 \$17,\$17,24'
-.*:3047: Error: Opcode not supported in the `insn32' mode `addiusp 2<<2'
-.*:3048: Error: Opcode not supported in the `insn32' mode `addiusp 3<<2'
-.*:3049: Error: Opcode not supported in the `insn32' mode `addiusp 254<<2'
-.*:3050: Error: Opcode not supported in the `insn32' mode `addiusp 255<<2'
-.*:3051: Error: Opcode not supported in the `insn32' mode `addiusp 256<<2'
-.*:3052: Error: Opcode not supported in the `insn32' mode `addiusp 257<<2'
-.*:3053: Error: Opcode not supported in the `insn32' mode `addiusp -3<<2'
-.*:3054: Error: Opcode not supported in the `insn32' mode `addiusp -4<<2'
-.*:3055: Error: Opcode not supported in the `insn32' mode `addiusp -255<<2'
-.*:3056: Error: Opcode not supported in the `insn32' mode `addiusp -256<<2'
-.*:3057: Error: Opcode not supported in the `insn32' mode `addiusp -257<<2'
-.*:3058: Error: Opcode not supported in the `insn32' mode `addiusp -258<<2'
-.*:3060: Error: Opcode not supported in the `insn32' mode `addius5 \$0,0'
-.*:3061: Error: Opcode not supported in the `insn32' mode `addius5 \$2,0'
-.*:3062: Error: Opcode not supported in the `insn32' mode `addius5 \$3,0'
-.*:3063: Error: Opcode not supported in the `insn32' mode `addius5 \$30,0'
-.*:3064: Error: Opcode not supported in the `insn32' mode `addius5 \$31,0'
-.*:3065: Error: Opcode not supported in the `insn32' mode `addius5 \$31,1'
-.*:3066: Error: Opcode not supported in the `insn32' mode `addius5 \$31,2'
-.*:3067: Error: Opcode not supported in the `insn32' mode `addius5 \$31,3'
-.*:3068: Error: Opcode not supported in the `insn32' mode `addius5 \$31,7'
-.*:3069: Error: Opcode not supported in the `insn32' mode `addius5 \$31,-6'
-.*:3070: Error: Opcode not supported in the `insn32' mode `addius5 \$31,-7'
-.*:3071: Error: Opcode not supported in the `insn32' mode `addius5 \$31,-8'
-.*:4759: Warning: Divide by zero.
-.*:4762: Warning: Divide by zero.
-.*:4775: Warning: Divide by zero.
-.*:5180: Warning: Divide by zero.
-.*:5190: Warning: Divide by zero.
-.*:5200: Warning: Divide by zero.
-.*:5568: Error: Opcode not supported in the `insn32' mode `jalr16 \$2'
-.*:5572: Error: Opcode not supported in the `insn32' mode `jr16 \$2'
-.*:5579: Error: Opcode not supported in the `insn32' mode `jals test_delay_slot'
-.*:5580: Error: Opcode not supported in the `insn32' mode `jalrs16 \$2'
-.*:5581: Error: Opcode not supported in the `insn32' mode `jalrs32 \$2'
-.*:5582: Error: Opcode not supported in the `insn32' mode `jrs \$2'
-.*:5583: Error: Opcode not supported in the `insn32' mode `jalrs\.hb \$2'
-.*:5584: Error: Opcode not supported in the `insn32' mode `jrs\.hb \$2'
-.*:5665: Error: Opcode not supported in the `insn32' mode `bals test_spec107'
-.*:5667: Error: Opcode not supported in the `insn32' mode `bgezals \$2,test_spec107'
-.*:5669: Error: Opcode not supported in the `insn32' mode `bltzals \$2,test_spec107'
+.*:39: Error: opcode not supported in the `insn32' mode `nop16'
+.*:98: Error: opcode not supported in the `insn32' mode `move16 \$2,\$22'
+.*:99: Error: opcode not supported in the `insn32' mode `move16 \$22,\$2'
+.*:106: Error: opcode not supported in the `insn32' mode `b16 test'
+.*:111: Error: opcode not supported in the `insn32' mode `b16 1f'
+.*:117: Error: opcode not supported in the `insn32' mode `b16 1b'
+.*:277: Error: opcode not supported in the `insn32' mode `and16 \$2,\$2,\$3'
+.*:315: Error: opcode not supported in the `insn32' mode `andi16 \$7,65535'
+.*:387: Error: opcode not supported in the `insn32' mode `beqz16 \$16,test2'
+.*:475: Error: opcode not supported in the `insn32' mode `bnez16 \$16,test3'
+.*:578: Warning: divide by zero
+.*:581: Warning: divide by zero
+.*:594: Warning: divide by zero
+.*:1559: Warning: divide by zero
+.*:1562: Warning: divide by zero
+.*:1575: Warning: divide by zero
+.*:2622: Warning: branch bge is always true
+.*:2625: Warning: branch bgeu is always true
+.*:2634: Warning: branch bgeu is always true
+.*:2709: Warning: branch ble is always true
+.*:2724: Warning: branch bleu is always true
+.*:2730: Warning: branch bleu is always true
+.*:2733: Warning: branch bleu is always true
+.*:2832: Warning: branch bgel is always true
+.*:2835: Warning: branch bgeul is always true
+.*:2844: Warning: branch bgeul is always true
+.*:2919: Warning: branch blel is always true
+.*:2934: Warning: branch bleul is always true
+.*:2940: Warning: branch bleul is always true
+.*:2943: Warning: branch bleul is always true
+.*:3010: Error: opcode not supported in the `insn32' mode `addiur1sp \$2,0'
+.*:3011: Error: opcode not supported in the `insn32' mode `addiur1sp \$2,1<<2'
+.*:3012: Error: opcode not supported in the `insn32' mode `addiur1sp \$2,2<<2'
+.*:3013: Error: opcode not supported in the `insn32' mode `addiur1sp \$2,3<<2'
+.*:3014: Error: opcode not supported in the `insn32' mode `addiur1sp \$2,4<<2'
+.*:3015: Error: opcode not supported in the `insn32' mode `addiur1sp \$2,63<<2'
+.*:3016: Error: opcode not supported in the `insn32' mode `addiur1sp \$3,63<<2'
+.*:3017: Error: opcode not supported in the `insn32' mode `addiur1sp \$4,63<<2'
+.*:3018: Error: opcode not supported in the `insn32' mode `addiur1sp \$5,63<<2'
+.*:3019: Error: opcode not supported in the `insn32' mode `addiur1sp \$6,63<<2'
+.*:3020: Error: opcode not supported in the `insn32' mode `addiur1sp \$7,63<<2'
+.*:3021: Error: opcode not supported in the `insn32' mode `addiur1sp \$16,63<<2'
+.*:3022: Error: opcode not supported in the `insn32' mode `addiur1sp \$17,63<<2'
+.*:3024: Error: opcode not supported in the `insn32' mode `addiur2 \$2,\$2,-1'
+.*:3025: Error: opcode not supported in the `insn32' mode `addiur2 \$2,\$3,-1'
+.*:3026: Error: opcode not supported in the `insn32' mode `addiur2 \$2,\$4,-1'
+.*:3027: Error: opcode not supported in the `insn32' mode `addiur2 \$2,\$5,-1'
+.*:3028: Error: opcode not supported in the `insn32' mode `addiur2 \$2,\$6,-1'
+.*:3029: Error: opcode not supported in the `insn32' mode `addiur2 \$2,\$7,-1'
+.*:3030: Error: opcode not supported in the `insn32' mode `addiur2 \$2,\$16,-1'
+.*:3031: Error: opcode not supported in the `insn32' mode `addiur2 \$2,\$17,-1'
+.*:3032: Error: opcode not supported in the `insn32' mode `addiur2 \$3,\$17,-1'
+.*:3033: Error: opcode not supported in the `insn32' mode `addiur2 \$4,\$17,-1'
+.*:3034: Error: opcode not supported in the `insn32' mode `addiur2 \$5,\$17,-1'
+.*:3035: Error: opcode not supported in the `insn32' mode `addiur2 \$6,\$17,-1'
+.*:3036: Error: opcode not supported in the `insn32' mode `addiur2 \$7,\$17,-1'
+.*:3037: Error: opcode not supported in the `insn32' mode `addiur2 \$16,\$17,-1'
+.*:3038: Error: opcode not supported in the `insn32' mode `addiur2 \$17,\$17,-1'
+.*:3039: Error: opcode not supported in the `insn32' mode `addiur2 \$17,\$17,1'
+.*:3040: Error: opcode not supported in the `insn32' mode `addiur2 \$17,\$17,4'
+.*:3041: Error: opcode not supported in the `insn32' mode `addiur2 \$17,\$17,8'
+.*:3042: Error: opcode not supported in the `insn32' mode `addiur2 \$17,\$17,12'
+.*:3043: Error: opcode not supported in the `insn32' mode `addiur2 \$17,\$17,16'
+.*:3044: Error: opcode not supported in the `insn32' mode `addiur2 \$17,\$17,20'
+.*:3045: Error: opcode not supported in the `insn32' mode `addiur2 \$17,\$17,24'
+.*:3047: Error: opcode not supported in the `insn32' mode `addiusp 2<<2'
+.*:3048: Error: opcode not supported in the `insn32' mode `addiusp 3<<2'
+.*:3049: Error: opcode not supported in the `insn32' mode `addiusp 254<<2'
+.*:3050: Error: opcode not supported in the `insn32' mode `addiusp 255<<2'
+.*:3051: Error: opcode not supported in the `insn32' mode `addiusp 256<<2'
+.*:3052: Error: opcode not supported in the `insn32' mode `addiusp 257<<2'
+.*:3053: Error: opcode not supported in the `insn32' mode `addiusp -3<<2'
+.*:3054: Error: opcode not supported in the `insn32' mode `addiusp -4<<2'
+.*:3055: Error: opcode not supported in the `insn32' mode `addiusp -255<<2'
+.*:3056: Error: opcode not supported in the `insn32' mode `addiusp -256<<2'
+.*:3057: Error: opcode not supported in the `insn32' mode `addiusp -257<<2'
+.*:3058: Error: opcode not supported in the `insn32' mode `addiusp -258<<2'
+.*:3060: Error: opcode not supported in the `insn32' mode `addius5 \$0,0'
+.*:3061: Error: opcode not supported in the `insn32' mode `addius5 \$2,0'
+.*:3062: Error: opcode not supported in the `insn32' mode `addius5 \$3,0'
+.*:3063: Error: opcode not supported in the `insn32' mode `addius5 \$30,0'
+.*:3064: Error: opcode not supported in the `insn32' mode `addius5 \$31,0'
+.*:3065: Error: opcode not supported in the `insn32' mode `addius5 \$31,1'
+.*:3066: Error: opcode not supported in the `insn32' mode `addius5 \$31,2'
+.*:3067: Error: opcode not supported in the `insn32' mode `addius5 \$31,3'
+.*:3068: Error: opcode not supported in the `insn32' mode `addius5 \$31,7'
+.*:3069: Error: opcode not supported in the `insn32' mode `addius5 \$31,-6'
+.*:3070: Error: opcode not supported in the `insn32' mode `addius5 \$31,-7'
+.*:3071: Error: opcode not supported in the `insn32' mode `addius5 \$31,-8'
+.*:4759: Warning: divide by zero
+.*:4762: Warning: divide by zero
+.*:4775: Warning: divide by zero
+.*:5180: Warning: divide by zero
+.*:5190: Warning: divide by zero
+.*:5200: Warning: divide by zero
+.*:5568: Error: opcode not supported in the `insn32' mode `jalr16 \$2'
+.*:5572: Error: opcode not supported in the `insn32' mode `jr16 \$2'
+.*:5579: Error: opcode not supported in the `insn32' mode `jals test_delay_slot'
+.*:5580: Error: opcode not supported in the `insn32' mode `jalrs16 \$2'
+.*:5581: Error: opcode not supported in the `insn32' mode `jalrs32 \$2'
+.*:5582: Error: opcode not supported in the `insn32' mode `jrs \$2'
+.*:5583: Error: opcode not supported in the `insn32' mode `jalrs\.hb \$2'
+.*:5584: Error: opcode not supported in the `insn32' mode `jrs\.hb \$2'
+.*:5665: Error: opcode not supported in the `insn32' mode `bals test_spec107'
+.*:5667: Error: opcode not supported in the `insn32' mode `bgezals \$2,test_spec107'
+.*:5669: Error: opcode not supported in the `insn32' mode `bltzals \$2,test_spec107'

diff --git a/gas/testsuite/gas/mips/mips-double-float-flag.l b/gas/testsuite/gas/mips/mips-double-float-flag.l
index 572b69d0dfbb161292ed0646c246497a325f7600..d17a00fe98fef245ccf9f9295fc2108bf1b95c5e 100644 (file)
--- a/gas/testsuite/gas/mips/mips-double-float-flag.l
+++ b/gas/testsuite/gas/mips/mips-double-float-flag.l
@@ -1,3 +1,3 @@
 .*: Assembler messages:
-.*:8: Error: Opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'
-.*:17: Error: Opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'
+.*:8: Error: opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'
+.*:17: Error: opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'

diff --git a/gas/testsuite/gas/mips/mips-gp64-fp32.l b/gas/testsuite/gas/mips/mips-gp64-fp32.l
index 3668a25e3b2038ae08fa29a1f3c325374aeb41ca..e72f085da7f127fea3114a327ff5e348c3402be6 100644 (file)
--- a/gas/testsuite/gas/mips/mips-gp64-fp32.l
+++ b/gas/testsuite/gas/mips/mips-gp64-fp32.l
@@ -1,5 +1,5 @@
 Assembler messages:
 Warning: -mfp32 used with a 64-bit ABI
-.*:92: Warning: Macro instruction expanded into multiple instructions in a branch delay slot
-.*:96: Warning: Macro instruction expanded into multiple instructions in a branch delay slot
-.*:100: Warning: Macro instruction expanded into multiple instructions in a branch delay slot
+.*:92: Warning: macro instruction expanded into multiple instructions in a branch delay slot
+.*:96: Warning: macro instruction expanded into multiple instructions in a branch delay slot
+.*:100: Warning: macro instruction expanded into multiple instructions in a branch delay slot

diff --git a/gas/testsuite/gas/mips/mips-gp64-fp64.l b/gas/testsuite/gas/mips/mips-gp64-fp64.l
index 4f26b42dce1a48e15f487e8c9cbf413d377e0370..8727532c24868fa10c3f5b4f3037bc99e9e4e0e9 100644 (file)
--- a/gas/testsuite/gas/mips/mips-gp64-fp64.l
+++ b/gas/testsuite/gas/mips/mips-gp64-fp64.l
@@ -1,4 +1,4 @@
 .*: Assembler messages:
-.*:92: Warning: Macro instruction expanded into multiple instructions in a branch delay slot
-.*:96: Warning: Macro instruction expanded into multiple instructions in a branch delay slot
-.*:100: Warning: Macro instruction expanded into multiple instructions in a branch delay slot
+.*:92: Warning: macro instruction expanded into multiple instructions in a branch delay slot
+.*:96: Warning: macro instruction expanded into multiple instructions in a branch delay slot
+.*:100: Warning: macro instruction expanded into multiple instructions in a branch delay slot

diff --git a/gas/testsuite/gas/mips/mips-hard-float-flag.l b/gas/testsuite/gas/mips/mips-hard-float-flag.l
index cf500851bd8bec46d5ae4565c84668c9ad56d7bd..f1bcaea9a9046f237e74e79a9502e0a8a1752c79 100644 (file)
--- a/gas/testsuite/gas/mips/mips-hard-float-flag.l
+++ b/gas/testsuite/gas/mips/mips-hard-float-flag.l
@@ -1,5 +1,5 @@
 .*: Assembler messages:
-.*:7: Error: Opcode not supported on this processor: .* \(.*\) `add.s \$f2,\$f2,\$f2'
-.*:8: Error: Opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'
-.*:16: Error: Opcode not supported on this processor: .* \(.*\) `add.s \$f2,\$f2,\$f2'
-.*:17: Error: Opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'
+.*:7: Error: opcode not supported on this processor: .* \(.*\) `add.s \$f2,\$f2,\$f2'
+.*:8: Error: opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'
+.*:16: Error: opcode not supported on this processor: .* \(.*\) `add.s \$f2,\$f2,\$f2'
+.*:17: Error: opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'

diff --git a/gas/testsuite/gas/mips/mips-macro-ill-nofp.l b/gas/testsuite/gas/mips/mips-macro-ill-nofp.l
index 21cb0381d24636082943e56f9560ddfb08a8014e..75e7defe656f60a18ff1846b640cf7c556f63047 100644 (file)
--- a/gas/testsuite/gas/mips/mips-macro-ill-nofp.l
+++ b/gas/testsuite/gas/mips/mips-macro-ill-nofp.l
@@ -1,19 +1,19 @@
 .*: Assembler messages:
-.*:5: Error: Opcode not supported on this processor: .* \(.*\) `ldc1 \$f2,d'
-.*:6: Error: Opcode not supported on this processor: .* \(.*\) `ldc1 \$22,d'
-.*:7: Error: Opcode not supported on this processor: .* \(.*\) `l.d \$f2,d'
-.*:8: Error: Opcode not supported on this processor: .* \(.*\) `li.d \$f2,1.2'
-.*:9: Error: Opcode not supported on this processor: .* \(.*\) `li.d \$22,1.2'
-.*:11: Error: Opcode not supported on this processor: .* \(.*\) `sdc1 \$f2,d'
-.*:12: Error: Opcode not supported on this processor: .* \(.*\) `sdc1 \$22,d'
-.*:13: Error: Opcode not supported on this processor: .* \(.*\) `s.d \$f2,d'
-.*:15: Error: Opcode not supported on this processor: .* \(.*\) `trunc.w.d \$f4,\$f6,\$4'
-.*:18: Error: Opcode not supported on this processor: .* \(.*\) `lwc1 \$f2,d'
-.*:19: Error: Opcode not supported on this processor: .* \(.*\) `lwc1 \$22,d'
-.*:20: Error: Opcode not supported on this processor: .* \(.*\) `l.s \$f2,d'
-.*:21: Error: Opcode not supported on this processor: .* \(.*\) `li.s \$f2,1.2'
-.*:22: Error: Opcode not supported on this processor: .* \(.*\) `li.s \$22,1.2'
-.*:24: Error: Opcode not supported on this processor: .* \(.*\) `sdc1 \$f2,d'
-.*:25: Error: Opcode not supported on this processor: .* \(.*\) `sdc1 \$22,d'
-.*:26: Error: Opcode not supported on this processor: .* \(.*\) `s.d \$f2,d'
-.*:28: Error: Opcode not supported on this processor: .* \(.*\) `trunc.w.s \$f4,\$f6,\$4'
+.*:5: Error: opcode not supported on this processor: .* \(.*\) `ldc1 \$f2,d'
+.*:6: Error: opcode not supported on this processor: .* \(.*\) `ldc1 \$22,d'
+.*:7: Error: opcode not supported on this processor: .* \(.*\) `l.d \$f2,d'
+.*:8: Error: opcode not supported on this processor: .* \(.*\) `li.d \$f2,1.2'
+.*:9: Error: opcode not supported on this processor: .* \(.*\) `li.d \$22,1.2'
+.*:11: Error: opcode not supported on this processor: .* \(.*\) `sdc1 \$f2,d'
+.*:12: Error: opcode not supported on this processor: .* \(.*\) `sdc1 \$22,d'
+.*:13: Error: opcode not supported on this processor: .* \(.*\) `s.d \$f2,d'
+.*:15: Error: opcode not supported on this processor: .* \(.*\) `trunc.w.d \$f4,\$f6,\$4'
+.*:18: Error: opcode not supported on this processor: .* \(.*\) `lwc1 \$f2,d'
+.*:19: Error: opcode not supported on this processor: .* \(.*\) `lwc1 \$22,d'
+.*:20: Error: opcode not supported on this processor: .* \(.*\) `l.s \$f2,d'
+.*:21: Error: opcode not supported on this processor: .* \(.*\) `li.s \$f2,1.2'
+.*:22: Error: opcode not supported on this processor: .* \(.*\) `li.s \$22,1.2'
+.*:24: Error: opcode not supported on this processor: .* \(.*\) `sdc1 \$f2,d'
+.*:25: Error: opcode not supported on this processor: .* \(.*\) `sdc1 \$22,d'
+.*:26: Error: opcode not supported on this processor: .* \(.*\) `s.d \$f2,d'
+.*:28: Error: opcode not supported on this processor: .* \(.*\) `trunc.w.s \$f4,\$f6,\$4'

diff --git a/gas/testsuite/gas/mips/mips-macro-ill-sfp.l b/gas/testsuite/gas/mips/mips-macro-ill-sfp.l
index 1e374b2e7ab976e53ffc6e9b08204335aa9c4c0f..9c496db4960b5a71ba02ca53d704c7db7356997d 100644 (file)
--- a/gas/testsuite/gas/mips/mips-macro-ill-sfp.l
+++ b/gas/testsuite/gas/mips/mips-macro-ill-sfp.l
@@ -1,10 +1,10 @@
 .*: Assembler messages:
-.*:5: Error: Opcode not supported on this processor: .* \(.*\) `ldc1 \$f2,d'
-.*:6: Error: Opcode not supported on this processor: .* \(.*\) `ldc1 \$22,d'
-.*:7: Error: Opcode not supported on this processor: .* \(.*\) `l.d \$f2,d'
-.*:8: Error: Opcode not supported on this processor: .* \(.*\) `li.d \$f2,1.2'
-.*:9: Error: Opcode not supported on this processor: .* \(.*\) `li.d \$22,1.2'
-.*:11: Error: Opcode not supported on this processor: .* \(.*\) `sdc1 \$f2,d'
-.*:12: Error: Opcode not supported on this processor: .* \(.*\) `sdc1 \$22,d'
-.*:13: Error: Opcode not supported on this processor: .* \(.*\) `s.d \$f2,d'
-.*:15: Error: Opcode not supported on this processor: .* \(.*\) `trunc.w.d \$f4,\$f6,\$4'
+.*:5: Error: opcode not supported on this processor: .* \(.*\) `ldc1 \$f2,d'
+.*:6: Error: opcode not supported on this processor: .* \(.*\) `ldc1 \$22,d'
+.*:7: Error: opcode not supported on this processor: .* \(.*\) `l.d \$f2,d'
+.*:8: Error: opcode not supported on this processor: .* \(.*\) `li.d \$f2,1.2'
+.*:9: Error: opcode not supported on this processor: .* \(.*\) `li.d \$22,1.2'
+.*:11: Error: opcode not supported on this processor: .* \(.*\) `sdc1 \$f2,d'
+.*:12: Error: opcode not supported on this processor: .* \(.*\) `sdc1 \$22,d'
+.*:13: Error: opcode not supported on this processor: .* \(.*\) `s.d \$f2,d'
+.*:15: Error: opcode not supported on this processor: .* \(.*\) `trunc.w.d \$f4,\$f6,\$4'

diff --git a/gas/testsuite/gas/mips/mips1-fp.l b/gas/testsuite/gas/mips/mips1-fp.l
index b156525d766e1e5e51b91ecbfaabfc9edbd72296..72ed0433712d3344be6b3f72cf1ff56176e5eb9f 100644 (file)
--- a/gas/testsuite/gas/mips/mips1-fp.l
+++ b/gas/testsuite/gas/mips/mips1-fp.l
@@ -1,3 +1,3 @@
 .*: Assembler messages:
-.*:6: Error: Opcode not supported on this processor: .* \(.*\) `add.s \$f0,\$f2,\$f4'
-.*:7: Error: Opcode not supported on this processor: .* \(.*\) `cfc1 \$2,\$0'
+.*:6: Error: opcode not supported on this processor: .* \(.*\) `add.s \$f0,\$f2,\$f4'
+.*:7: Error: opcode not supported on this processor: .* \(.*\) `cfc1 \$2,\$0'

diff --git a/gas/testsuite/gas/mips/mips16e-64.l b/gas/testsuite/gas/mips/mips16e-64.l
index 378959a6f8b8d12c16b7aa9236fb76b2edfa1ca8..a3783acb17a8f44c5e811774c879079a6062387f 100644 (file)
--- a/gas/testsuite/gas/mips/mips16e-64.l
+++ b/gas/testsuite/gas/mips/mips16e-64.l
@@ -1,3 +1,3 @@
 .*: Assembler messages:
-.*: Error: Opcode not supported on this processor: .* (.*) `sew \$4'
-.*: Error: Opcode not supported on this processor: .* (.*) `zew \$4'
+.*: Error: opcode not supported on this processor: .* (.*) `sew \$4'
+.*: Error: opcode not supported on this processor: .* (.*) `zew \$4'

diff --git a/gas/testsuite/gas/mips/mips16e-save-err.l b/gas/testsuite/gas/mips/mips16e-save-err.l
index 3403fc7a0df00a2cc473cf41513b8ba7fe05e393..0af16c27525470261bcff434497505863ef6fdf3 100644 (file)
--- a/gas/testsuite/gas/mips/mips16e-save-err.l
+++ b/gas/testsuite/gas/mips/mips16e-save-err.l
@@ -1,5 +1,5 @@
 .*: Assembler messages:
-.*:2: Error: Illegal operands `save \$3,100'
+.*:2: Error: invalid operands `save \$3,100'
 .*:3: Error: missing frame size `save \$4'
 .*:4: Error: frame size specified twice `save \$4,100,200'
 .*:5: Error: operand 2 must be constant `save \$4,foo'
@@ -8,6 +8,6 @@
 .*:10: Error: invalid frame size `save \$4,12'
 .*:11: Error: invalid frame size `save \$4,2048'
 .*:12: Error: invalid frame size `save \$4,2052'
-.*:14: Error: Illegal operands `save \$4,\$6,0'
-.*:15: Error: Illegal operands `save 0,\$5,\$7'
-.*:18: Error: Illegal operands `save \$16,\$18,\$20,0'
+.*:14: Error: invalid operands `save \$4,\$6,0'
+.*:15: Error: invalid operands `save 0,\$5,\$7'
+.*:18: Error: invalid operands `save \$16,\$18,\$20,0'

diff --git a/gas/testsuite/gas/mips/mips32-sf32.l b/gas/testsuite/gas/mips/mips32-sf32.l
index b2980aed4ad1bce63df85af17e19b0b6bbafe5f1..d55f890c7f43f4e9eac16a67b4f1abe5780283d3 100644 (file)
--- a/gas/testsuite/gas/mips/mips32-sf32.l
+++ b/gas/testsuite/gas/mips/mips32-sf32.l
@@ -1,8 +1,8 @@
 .*: Assembler messages:
-.*:5: Error: Opcode not supported on this processor: .* \(.*\) `li.s \$f1,1.0'
-.*:6: Error: Opcode not supported on this processor: .* \(.*\) `li.s \$f3,1.9'
-.*:7: Error: Opcode not supported on this processor: .* \(.*\) `add.s \$f5,\$f1,\$f3'
-.*:8: Error: Opcode not supported on this processor: .* \(.*\) `cvt.d.s \$f8,\$f7'
-.*:9: Error: Opcode not supported on this processor: .* \(.*\) `cvt.d.w \$f8,\$f7'
-.*:10: Error: Opcode not supported on this processor: .* \(.*\) `cvt.s.d \$f7,\$f8'
-.*:11: Error: Opcode not supported on this processor: .* \(.*\) `trunc.w.d \$f7,\$f8'
+.*:5: Error: opcode not supported on this processor: .* \(.*\) `li.s \$f1,1.0'
+.*:6: Error: opcode not supported on this processor: .* \(.*\) `li.s \$f3,1.9'
+.*:7: Error: opcode not supported on this processor: .* \(.*\) `add.s \$f5,\$f1,\$f3'
+.*:8: Error: opcode not supported on this processor: .* \(.*\) `cvt.d.s \$f8,\$f7'
+.*:9: Error: opcode not supported on this processor: .* \(.*\) `cvt.d.w \$f8,\$f7'
+.*:10: Error: opcode not supported on this processor: .* \(.*\) `cvt.s.d \$f7,\$f8'
+.*:11: Error: opcode not supported on this processor: .* \(.*\) `trunc.w.d \$f7,\$f8'

diff --git a/gas/testsuite/gas/mips/mips32r2-fp32.l b/gas/testsuite/gas/mips/mips32r2-fp32.l
index 261f3e43f0a3378a0c640710f04588e71b5a90bb..c8fd76a14a71ff2385d54438db8ea9c9452e3559 100644 (file)
--- a/gas/testsuite/gas/mips/mips32r2-fp32.l
+++ b/gas/testsuite/gas/mips/mips32r2-fp32.l
@@ -1,3 +1,3 @@
 .*: Assembler messages:
-.*:12: Error: Opcode not supported on this processor: .* \(.*\) `mfhc1 \$17,\$f0'
-.*:13: Error: Opcode not supported on this processor: .* \(.*\) `mthc1 \$17,\$f0'
+.*:12: Error: opcode not supported on this processor: .* \(.*\) `mfhc1 \$17,\$f0'
+.*:13: Error: opcode not supported on this processor: .* \(.*\) `mthc1 \$17,\$f0'

diff --git a/gas/testsuite/gas/mips/mips32r2-ill.l b/gas/testsuite/gas/mips/mips32r2-ill.l
index 48cc783c23772929c8d24ec6979949c2e856991c..9efa771c223e69c45ec304f29a7707d58f4e5602 100644 (file)
--- a/gas/testsuite/gas/mips/mips32r2-ill.l
+++ b/gas/testsuite/gas/mips/mips32r2-ill.l
@@ -11,5 +11,5 @@
 .*:39: Error: operand 4 out of range `ins \$4,\$5,0,33'
 .*:42: Error: operand 4 out of range `ins \$4,\$5,0,0'
 .*:45: Error: operand 4 out of range `ins \$4,\$5,31,2'
-.*:54: Warning: Float register should be even, was 1
-.*:57: Warning: Float register should be even, was 1
+.*:54: Warning: float register should be even, was 1
+.*:57: Warning: float register should be even, was 1

diff --git a/gas/testsuite/gas/mips/mips4-branch-likely.l b/gas/testsuite/gas/mips/mips4-branch-likely.l
index d0da34e70dd1b22104f4dd5cd83c2e3547f4a635..0e0cc587e0574c5f9146136f667239b2c162cf7f 100644 (file)
--- a/gas/testsuite/gas/mips/mips4-branch-likely.l
+++ b/gas/testsuite/gas/mips/mips4-branch-likely.l
@@ -1,3 +1,3 @@
 .*: Assembler messages:
-.*:5: Error: Opcode not supported on this processor: .* \(.*\) `bc1fl \$fcc1,text_label'
-.*:6: Error: Opcode not supported on this processor: .* \(.*\) `bc1tl \$fcc2,text_label'
+.*:5: Error: opcode not supported on this processor: .* \(.*\) `bc1fl \$fcc1,text_label'
+.*:6: Error: opcode not supported on this processor: .* \(.*\) `bc1tl \$fcc2,text_label'

diff --git a/gas/testsuite/gas/mips/mips4-fp.l b/gas/testsuite/gas/mips/mips4-fp.l
index 2d8b1f513f03b6dd1b1494219ec8bbb9190342ed..908e29f77d3ed8e673735eda973696ecdf01460a 100644 (file)
--- a/gas/testsuite/gas/mips/mips4-fp.l
+++ b/gas/testsuite/gas/mips/mips4-fp.l
@@ -1,33 +1,33 @@
 .*: Assembler messages:
-.*:4: Error: Opcode not supported on this processor: .* \(.*\) `bc1f text_label'
-.*:5: Error: Opcode not supported on this processor: .* \(.*\) `bc1f \$fcc1,text_label'
-.*:6: Error: Opcode not supported on this processor: .* \(.*\) `bc1t \$fcc1,text_label'
-.*:7: Error: Opcode not supported on this processor: .* \(.*\) `c.f.d \$f4,\$f6'
-.*:8: Error: Opcode not supported on this processor: .* \(.*\) `c.f.d \$fcc1,\$f4,\$f6'
-.*:9: Error: Opcode not supported on this processor: .* \(.*\) `ldxc1 \$f2,\$4\(\$5\)'
-.*:10: Error: Opcode not supported on this processor: .* \(.*\) `lwxc1 \$f2,\$4\(\$5\)'
-.*:11: Error: Opcode not supported on this processor: .* \(.*\) `madd.d \$f0,\$f2,\$f4,\$f6'
-.*:13: Error: Opcode not supported on this processor: .* \(.*\) `madd.s \$f10,\$f8,\$f2,\$f0'
-.*:14: Error: Opcode not supported on this processor: .* \(.*\) `movf \$4,\$5,\$fcc4'
-.*:15: Error: Opcode not supported on this processor: .* \(.*\) `movf.d \$f4,\$f6,\$fcc0'
-.*:16: Error: Opcode not supported on this processor: .* \(.*\) `movf.s \$f4,\$f6,\$fcc0'
-.*:17: Error: Opcode not supported on this processor: .* \(.*\) `movn.d \$f4,\$f6,\$6'
-.*:18: Error: Opcode not supported on this processor: .* \(.*\) `movn.s \$f4,\$f6,\$6'
-.*:19: Error: Opcode not supported on this processor: .* \(.*\) `movt \$4,\$5,\$fcc4'
-.*:20: Error: Opcode not supported on this processor: .* \(.*\) `movt.d \$f4,\$f6,\$fcc0'
-.*:21: Error: Opcode not supported on this processor: .* \(.*\) `movt.s \$f4,\$f6,\$fcc0'
-.*:22: Error: Opcode not supported on this processor: .* \(.*\) `movz.d \$f4,\$f6,\$6'
-.*:23: Error: Opcode not supported on this processor: .* \(.*\) `movz.s \$f4,\$f6,\$6'
-.*:24: Error: Opcode not supported on this processor: .* \(.*\) `msub.d \$f0,\$f2,\$f4,\$f6'
-.*:25: Error: Opcode not supported on this processor: .* \(.*\) `msub.s \$f0,\$f2,\$f4,\$f6'
-.*:26: Error: Opcode not supported on this processor: .* \(.*\) `nmadd.d \$f0,\$f2,\$f4,\$f6'
-.*:27: Error: Opcode not supported on this processor: .* \(.*\) `nmadd.s \$f0,\$f2,\$f4,\$f6'
-.*:28: Error: Opcode not supported on this processor: .* \(.*\) `nmsub.d \$f0,\$f2,\$f4,\$f6'
-.*:29: Error: Opcode not supported on this processor: .* \(.*\) `nmsub.s \$f0,\$f2,\$f4,\$f6'
-.*:31: Error: Opcode not supported on this processor: .* \(.*\) `prefx 4,\$4\(\$5\)'
-.*:32: Error: Opcode not supported on this processor: .* \(.*\) `recip.d \$f4,\$f6'
-.*:33: Error: Opcode not supported on this processor: .* \(.*\) `recip.s \$f4,\$f6'
-.*:34: Error: Opcode not supported on this processor: .* \(.*\) `rsqrt.d \$f4,\$f6'
-.*:35: Error: Opcode not supported on this processor: .* \(.*\) `rsqrt.s \$f4,\$f6'
-.*:36: Error: Opcode not supported on this processor: .* \(.*\) `sdxc1 \$f4,\$4\(\$5\)'
-.*:37: Error: Opcode not supported on this processor: .* \(.*\) `swxc1 \$f4,\$4\(\$5\)'
+.*:4: Error: opcode not supported on this processor: .* \(.*\) `bc1f text_label'
+.*:5: Error: opcode not supported on this processor: .* \(.*\) `bc1f \$fcc1,text_label'
+.*:6: Error: opcode not supported on this processor: .* \(.*\) `bc1t \$fcc1,text_label'
+.*:7: Error: opcode not supported on this processor: .* \(.*\) `c.f.d \$f4,\$f6'
+.*:8: Error: opcode not supported on this processor: .* \(.*\) `c.f.d \$fcc1,\$f4,\$f6'
+.*:9: Error: opcode not supported on this processor: .* \(.*\) `ldxc1 \$f2,\$4\(\$5\)'
+.*:10: Error: opcode not supported on this processor: .* \(.*\) `lwxc1 \$f2,\$4\(\$5\)'
+.*:11: Error: opcode not supported on this processor: .* \(.*\) `madd.d \$f0,\$f2,\$f4,\$f6'
+.*:13: Error: opcode not supported on this processor: .* \(.*\) `madd.s \$f10,\$f8,\$f2,\$f0'
+.*:14: Error: opcode not supported on this processor: .* \(.*\) `movf \$4,\$5,\$fcc4'
+.*:15: Error: opcode not supported on this processor: .* \(.*\) `movf.d \$f4,\$f6,\$fcc0'
+.*:16: Error: opcode not supported on this processor: .* \(.*\) `movf.s \$f4,\$f6,\$fcc0'
+.*:17: Error: opcode not supported on this processor: .* \(.*\) `movn.d \$f4,\$f6,\$6'
+.*:18: Error: opcode not supported on this processor: .* \(.*\) `movn.s \$f4,\$f6,\$6'
+.*:19: Error: opcode not supported on this processor: .* \(.*\) `movt \$4,\$5,\$fcc4'
+.*:20: Error: opcode not supported on this processor: .* \(.*\) `movt.d \$f4,\$f6,\$fcc0'
+.*:21: Error: opcode not supported on this processor: .* \(.*\) `movt.s \$f4,\$f6,\$fcc0'
+.*:22: Error: opcode not supported on this processor: .* \(.*\) `movz.d \$f4,\$f6,\$6'
+.*:23: Error: opcode not supported on this processor: .* \(.*\) `movz.s \$f4,\$f6,\$6'
+.*:24: Error: opcode not supported on this processor: .* \(.*\) `msub.d \$f0,\$f2,\$f4,\$f6'
+.*:25: Error: opcode not supported on this processor: .* \(.*\) `msub.s \$f0,\$f2,\$f4,\$f6'
+.*:26: Error: opcode not supported on this processor: .* \(.*\) `nmadd.d \$f0,\$f2,\$f4,\$f6'
+.*:27: Error: opcode not supported on this processor: .* \(.*\) `nmadd.s \$f0,\$f2,\$f4,\$f6'
+.*:28: Error: opcode not supported on this processor: .* \(.*\) `nmsub.d \$f0,\$f2,\$f4,\$f6'
+.*:29: Error: opcode not supported on this processor: .* \(.*\) `nmsub.s \$f0,\$f2,\$f4,\$f6'
+.*:31: Error: opcode not supported on this processor: .* \(.*\) `prefx 4,\$4\(\$5\)'
+.*:32: Error: opcode not supported on this processor: .* \(.*\) `recip.d \$f4,\$f6'
+.*:33: Error: opcode not supported on this processor: .* \(.*\) `recip.s \$f4,\$f6'
+.*:34: Error: opcode not supported on this processor: .* \(.*\) `rsqrt.d \$f4,\$f6'
+.*:35: Error: opcode not supported on this processor: .* \(.*\) `rsqrt.s \$f4,\$f6'
+.*:36: Error: opcode not supported on this processor: .* \(.*\) `sdxc1 \$f4,\$4\(\$5\)'
+.*:37: Error: opcode not supported on this processor: .* \(.*\) `swxc1 \$f4,\$4\(\$5\)'

diff --git a/gas/testsuite/gas/mips/mips5-fp.l b/gas/testsuite/gas/mips/mips5-fp.l
index bb6ed49ddf65a72807cb92273b0179f830ba4dd9..05ad48182124bef23ff94918d8daeaaa9f9b0fcd 100644 (file)
--- a/gas/testsuite/gas/mips/mips5-fp.l
+++ b/gas/testsuite/gas/mips/mips5-fp.l
@@ -1,3 +1,3 @@
 .*: Assembler messages:
-.*:61: Warning: Condition code register should be even for c.eq.ps, was 3
-.*:62: Warning: Condition code register should be even for movf.ps, was 3
+.*:61: Warning: condition code register should be even for c.eq.ps, was 3
+.*:62: Warning: condition code register should be even for movf.ps, was 3

diff --git a/gas/testsuite/gas/mips/mips64-mips3d.l b/gas/testsuite/gas/mips/mips64-mips3d.l
index 22c80e9de0617c456a373ebe73425aa21d99a8cf..6f060bac05fc7c1c37dadb86b4d1ff77f7fc80a8 100644 (file)
--- a/gas/testsuite/gas/mips/mips64-mips3d.l
+++ b/gas/testsuite/gas/mips/mips64-mips3d.l
@@ -1,5 +1,5 @@
 .*: Assembler messages:
-.*:150: Warning: Condition code register should be even for bc1any2f, was 1
-.*:152: Warning: Condition code register should be even for bc1any2t, was 3
-.*:154: Warning: Condition code register should be 0 or 4 for bc1any4f, was 1
-.*:156: Warning: Condition code register should be 0 or 4 for bc1any4t, was 2
+.*:150: Warning: condition code register should be even for bc1any2f, was 1
+.*:152: Warning: condition code register should be even for bc1any2t, was 3
+.*:154: Warning: condition code register should be 0 or 4 for bc1any4f, was 1
+.*:156: Warning: condition code register should be 0 or 4 for bc1any4t, was 2

diff --git a/gas/testsuite/gas/mips/nan-error-1.l b/gas/testsuite/gas/mips/nan-error-1.l
index 470bf9ce4f54bb748cddb3403bf32fed70583125..e1873113be8be2a5e8c7ec560c4a22b15f5e626e 100644 (file)
--- a/gas/testsuite/gas/mips/nan-error-1.l
+++ b/gas/testsuite/gas/mips/nan-error-1.l
@@ -1,2 +1,2 @@
 .*\.s: Assembler messages:
-.*\.s:1: Error: Bad .nan directive
+.*\.s:1: Error: bad .nan directive

diff --git a/gas/testsuite/gas/mips/nan-error-2.l b/gas/testsuite/gas/mips/nan-error-2.l
index 2182615685ce5590ee23452fc58018b94b62b80e..e705c48978c7c4030ee457a6b286ba5e26448926 100644 (file)
--- a/gas/testsuite/gas/mips/nan-error-2.l
+++ b/gas/testsuite/gas/mips/nan-error-2.l
@@ -1,2 +1,2 @@
 Assembler messages:
-Fatal error: Invalid NaN setting -mnan=foo
+Fatal error: invalid NaN setting -mnan=foo

diff --git a/gas/testsuite/gas/mips/noat-2.l b/gas/testsuite/gas/mips/noat-2.l
index 33402370e4cc3c6200bf99b08ae7e41d002acfb7..2f888cd05067f4d34f3a0027d56e0ac39990de16 100644 (file)
--- a/gas/testsuite/gas/mips/noat-2.l
+++ b/gas/testsuite/gas/mips/noat-2.l
@@ -1,2 +1,2 @@
 .*\.s: Assembler messages:
-.*\.s:2: Error: Macro used \$at after "\.set noat"
+.*\.s:2: Error: macro used \$at after "\.set noat"

diff --git a/gas/testsuite/gas/mips/noat-3.l b/gas/testsuite/gas/mips/noat-3.l
index 33402370e4cc3c6200bf99b08ae7e41d002acfb7..2f888cd05067f4d34f3a0027d56e0ac39990de16 100644 (file)
--- a/gas/testsuite/gas/mips/noat-3.l
+++ b/gas/testsuite/gas/mips/noat-3.l
@@ -1,2 +1,2 @@
 .*\.s: Assembler messages:
-.*\.s:2: Error: Macro used \$at after "\.set noat"
+.*\.s:2: Error: macro used \$at after "\.set noat"

diff --git a/gas/testsuite/gas/mips/noat-4.l b/gas/testsuite/gas/mips/noat-4.l
index 33402370e4cc3c6200bf99b08ae7e41d002acfb7..2f888cd05067f4d34f3a0027d56e0ac39990de16 100644 (file)
--- a/gas/testsuite/gas/mips/noat-4.l
+++ b/gas/testsuite/gas/mips/noat-4.l
@@ -1,2 +1,2 @@
 .*\.s: Assembler messages:
-.*\.s:2: Error: Macro used \$at after "\.set noat"
+.*\.s:2: Error: macro used \$at after "\.set noat"

diff --git a/gas/testsuite/gas/mips/noat-5.l b/gas/testsuite/gas/mips/noat-5.l
index 33402370e4cc3c6200bf99b08ae7e41d002acfb7..2f888cd05067f4d34f3a0027d56e0ac39990de16 100644 (file)
--- a/gas/testsuite/gas/mips/noat-5.l
+++ b/gas/testsuite/gas/mips/noat-5.l
@@ -1,2 +1,2 @@
 .*\.s: Assembler messages:
-.*\.s:2: Error: Macro used \$at after "\.set noat"
+.*\.s:2: Error: macro used \$at after "\.set noat"

diff --git a/gas/testsuite/gas/mips/noat-6.l b/gas/testsuite/gas/mips/noat-6.l
index 33402370e4cc3c6200bf99b08ae7e41d002acfb7..2f888cd05067f4d34f3a0027d56e0ac39990de16 100644 (file)
--- a/gas/testsuite/gas/mips/noat-6.l
+++ b/gas/testsuite/gas/mips/noat-6.l
@@ -1,2 +1,2 @@
 .*\.s: Assembler messages:
-.*\.s:2: Error: Macro used \$at after "\.set noat"
+.*\.s:2: Error: macro used \$at after "\.set noat"

diff --git a/gas/testsuite/gas/mips/noat-7.l b/gas/testsuite/gas/mips/noat-7.l
index 33402370e4cc3c6200bf99b08ae7e41d002acfb7..2f888cd05067f4d34f3a0027d56e0ac39990de16 100644 (file)
--- a/gas/testsuite/gas/mips/noat-7.l
+++ b/gas/testsuite/gas/mips/noat-7.l
@@ -1,2 +1,2 @@
 .*\.s: Assembler messages:
-.*\.s:2: Error: Macro used \$at after "\.set noat"
+.*\.s:2: Error: macro used \$at after "\.set noat"

diff --git a/gas/testsuite/gas/mips/octeon-ill.l b/gas/testsuite/gas/mips/octeon-ill.l
index ef98b77a47daaf6704ffb463364ca7334d430c3c..93162705e55be473fc71c9da509f98b8187ef961 100644 (file)
--- a/gas/testsuite/gas/mips/octeon-ill.l
+++ b/gas/testsuite/gas/mips/octeon-ill.l
@@ -8,26 +8,26 @@
 .*:18: Error: operand 4 out of range `cins32 \$17,\$20,7,25'
 .*:20: Error: operand 3 out of range `cins \$24,\$10,64,8'
 .*:21: Error: operand 4 out of range `cins \$21,\$30,50,14'
-.*:23: Error: Opcode not supported on this processor.*
-.*:24: Error: Opcode not supported on this processor.*
-.*:25: Error: Opcode not supported on this processor.*
-.*:26: Error: Opcode not supported on this processor.*
-.*:27: Error: Opcode not supported on this processor.*
-.*:28: Error: Opcode not supported on this processor.*
-.*:29: Error: Opcode not supported on this processor.*
-.*:30: Error: Opcode not supported on this processor.*
-.*:31: Error: Opcode not supported on this processor.*
-.*:32: Error: Opcode not supported on this processor.*
-.*:33: Error: Opcode not supported on this processor.*
-.*:34: Error: Opcode not supported on this processor.*
-.*:35: Error: Opcode not supported on this processor.*
-.*:36: Error: Opcode not supported on this processor.*
-.*:37: Error: Opcode not supported on this processor.*
-.*:39: Error: Opcode not supported on this processor.*
-.*:40: Error: Opcode not supported on this processor.*
-.*:41: Error: Opcode not supported on this processor.*
-.*:42: Error: Opcode not supported on this processor.*
-.*:43: Error: Opcode not supported on this processor.*
+.*:23: Error: opcode not supported on this processor.*
+.*:24: Error: opcode not supported on this processor.*
+.*:25: Error: opcode not supported on this processor.*
+.*:26: Error: opcode not supported on this processor.*
+.*:27: Error: opcode not supported on this processor.*
+.*:28: Error: opcode not supported on this processor.*
+.*:29: Error: opcode not supported on this processor.*
+.*:30: Error: opcode not supported on this processor.*
+.*:31: Error: opcode not supported on this processor.*
+.*:32: Error: opcode not supported on this processor.*
+.*:33: Error: opcode not supported on this processor.*
+.*:34: Error: opcode not supported on this processor.*
+.*:35: Error: opcode not supported on this processor.*
+.*:36: Error: opcode not supported on this processor.*
+.*:37: Error: opcode not supported on this processor.*
+.*:39: Error: opcode not supported on this processor.*
+.*:40: Error: opcode not supported on this processor.*
+.*:41: Error: opcode not supported on this processor.*
+.*:42: Error: opcode not supported on this processor.*
+.*:43: Error: opcode not supported on this processor.*
 .*:45: Error: operand 2 out of range `dmfc2 \$2,0x10000'
 .*:46: Error: operand 2 out of range `dmtc2 \$2,0x12345'
 .*:47: Error: operand 2 must be an immediate expression `dmfc2 \$9,\$12'

diff --git a/gas/testsuite/gas/mips/r5900-error-vu0.l b/gas/testsuite/gas/mips/r5900-error-vu0.l
index b462d95ecc0747c12ff6a8f4b44413bf5bbb4798..4be0df617a5f328bae65405e4fb9aeac1d9120c3 100644 (file)
--- a/gas/testsuite/gas/mips/r5900-error-vu0.l
+++ b/gas/testsuite/gas/mips/r5900-error-vu0.l
@@ -1,99 +1,99 @@
 .*: Assembler messages:
-.*: Error: Illegal operands `vabs\.w \$vf0w,\$vf0z'
-.*: Error: Illegal operands `vabs\.w \$vf0z,\$vf31w'
-.*: Error: Illegal operands `vabs\.xw \$vf0xw,\$vf0w'
-.*: Error: Illegal operands `vabs\.xw \$vf0x,\$vf31xw'
-.*: Error: Illegal operands `vabs\.xyzw \$vf0xyz,\$vf0xyzw'
-.*: Error: Illegal operands `vaddai\.w \$ACCw,\$vf0w,\$Q'
-.*: Error: Illegal operands `vaddai\.w \$ACCz,\$vf0w,\$Q'
-.*: Error: Illegal operands `vaddai\.xyzw \$ACCxyw,\$vf0xyzw,\$I'
-.*: Error: Illegal operands `vaddaq\.w \$ACCw,\$vf31z,\$Q'
-.*: Error: Illegal operands `vaddaq\.x \$ACCx,\$vf0w,\$Q'
-.*: Error: Illegal operands `vaddaq\.x \$ACCw,\$vf1x,\$Q'
-.*: Error: Illegal operands `vaddaq\.xw \$ACCxw,\$vf1z,\$Q'
-.*: Error: Illegal operands `vaddaq\.xw \$ACCw,\$vf31xw,\$Q'
-.*: Error: Illegal operands `vaddaq\.xyw \$ACCxw,\$vf0xyw,\$Q'
-.*: Error: Illegal operands `vaddaq\.xyw \$ACCxyw,\$vf1yw,\$Q'
-.*: Error: Illegal operands `vaddaq\.xyzw \$ACCxyzw,\$vf1yzw,\$Q'
-.*: Error: Illegal operands `vaddaq\.z \$ACCxz,\$vf0xz,\$Q'
-.*: Error: Illegal operands `vaddaq\.x \$ACCxz,\$vf1xz,\$Q'
-.*: Error: Illegal operands `vaddaq\.xzw \$ACCxw,\$vf0xzw,\$Q'
-.*: Error: Illegal operands `vaddaq\.y \$ACCy,\$vf0y,\$R'
-.*: Error: Illegal operands `vaddaq\.y \$ACCy,\$vf1y,\$I'
-.*: Error: Illegal operands `vaddaq\.yw \$ACCxyw,\$vf0yw,\$Q'
-.*: Error: Illegal operands `vaddaq\.yw \$ACCwy,\$vf1yw,\$Q'
-.*: Error: Illegal operands `vaddaq\.yw \$ACCyw,\$vf31wy,\$Q'
-.*: Error: Illegal operands `vaddaq\.yz \$ACCy,\$vf0yz,\$Q'
-.*: Error: Illegal operands `vaddaq\.yzw \$ACCxyzw,\$vf0yzw,\$Q'
-.*: Error: Illegal operands `vaddaq\.yzw \$ACCyzw,\$vf1xyzw,\$Q'
-.*: Error: Illegal operands `vaddaq\.yzw \$ACCyzw,\$vf31yzw,\$Qyzw'
-.*: Error: Illegal operands `vadda\.w \$ACCw,\$vf1w,\$vf2z'
-.*: Error: Illegal operands `vadda\.w \$ACCw,\$vf31w,\$vf0x'
-.*: Error: Illegal operands `vaddaw\.xyzw \$ACCxyzw,\$vf0xyzw,\$vf0x'
-.*: Error: Illegal operands `vaddaw\.xyzw \$ACCxyzw,\$vf0xyzw,\$vf31xyzw'
-.*: Error: Illegal operands `vaddaw\.xz \$ACCxyz,\$vf0xz,\$vf0w'
-.*: Error: Illegal operands `vaddaw\.xz \$ACCxzw,\$vf0xz,\$vf31w'
-.*: Error: Illegal operands `vaddaw\.xz \$ACCxz,\$vf1xyz,\$vf2w'
-.*: Error: Illegal operands `vaddaw\.xz \$ACCxz,\$vf31xzw,\$vf0w'
-.*: Error: Illegal operands `vaddaw\.xz \$ACCxz,\$vf31z,\$vf15w'
-.*: Error: Illegal operands `vaddaw\.xzw \$ACCxyzw,\$vf0xzw,\$vf0w'
-.*: Error: Illegal operands `vaddaw\.xzw \$ACC,\$vf0,\$vf31z'
-.*: Error: Illegal operands `vaddaw\.xzw \$ACCxzw,\$vf1xzw,\$vf2z'
-.*: Error: Illegal operands `vaddaw\.xzw \$ACCxzw,\$vf31xzw,\$vf0x'
-.*: Error: Illegal operands `vaddaw\.y \$ACCy,\$vf0y,\$vf0z'
-.*: Error: Illegal operands `vaddax\.w \$ACCw,\$vf0w,\$vf31z'
-.*: Error: Illegal operands `vaddax\.w \$ACC,\$vf1,\$vf2z'
-.*: Error: Illegal operands `vaddax\.w \$ACCw,\$vf31w,\$vf0w'
-.*: Error: Illegal operands `vaddax\.w \$ACCw,\$vf31w,\$vf15y'
-.*: Error: Illegal operands `vadda\.xw \$ACCxw,\$vf0xw,\$vf0xyw'
-.*: Error: Illegal operands `vadda\.xw \$ACCxw,\$vf0xw,\$vf31wx'
-.*: Error: Illegal operands `vaddax\.x \$ACCw,\$vf0x,\$vf0x'
-.*: Error: Illegal operands `vaddax\.x \$ACCx,\$vf0x,\$vf31w'
-.*: Error: Illegal operands `vaddax\.x \$ACCx,\$vf1x,\$vf2y'
-.*: Error: Illegal operands `vaddax\.x \$ACCx,\$vf31x,\$vf0z'
-.*: Error: Illegal operands `vaddax\.xw \$ACCxw,\$vf0xw,\$vf0y'
-.*: Error: Illegal operands `vaddax\.xw \$ACCxw,\$vf0xw,\$vf31z'
-.*: Error: Illegal operands `vaddax\.xw \$ACCxw,\$vf1xw,\$vf2w'
-.*: Error: Illegal operands `vaddax\.xw \$ACCxw,\$vf31wx,\$vf0'
-.*: Error: Illegal operands `vaddax\.xyzw \$ACC,\$vf1,\$vf2y'
-.*: Error: Illegal operands `vaddax\.xyzw \$ACC,\$vf31,\$vf0z'
-.*: Error: Illegal operands `vadda\.zw \$ACCzw,\$vf0zw,\$vf0wz'
-.*: Error: Illegal operands `vadda\.zw \$ACCzw,\$vf0w,\$vf31zw'
-.*: Error: Illegal operands `vadda\.zw \$ACCw,\$vf1zw,\$vf2zw'
-.*: Error: Illegal operands `vadda\.zw \$ACCxzw,\$vf31zw,\$vf0zw'
-.*: Error: Illegal operands `vadda\.zw \$ACCzw,\$vf31xzw,\$vf15zw'
-.*: Error: Illegal operands `vadda\.zw \$ACCzw,\$vf31zw,\$vf31yzw'
-.*: Error: Illegal operands `vaddaz\.x \$ACCx,\$vf0x,\$vf0x'
-.*: Error: Illegal operands `vaddaz\.x \$ACCx,\$vf0x,\$vf31y'
-.*: Error: Illegal operands `vaddaz\.xw \$ACCxw,\$vf31w,\$vf15z'
-.*: Error: Illegal operands `vaddaz\.xw \$ACCx,\$vf31xw,\$vf31z'
-.*: Error: Illegal operands `vaddaz\.xy \$ACCx,\$vf0xy,\$vf0z'
-.*: Error: Illegal operands `vaddaz\.xy \$ACCxyz,\$vf0xy,\$vf31z'
-.*: Error: Illegal operands `vaddaz\.y \$ACCx,\$vf31y,\$vf0z'
-.*: Error: Illegal operands `vaddaz\.yw \$ACCyw,\$vf0yw,\$a0'
-.*: Error: Illegal operands `vaddi\.w \$vf0w,\$vf31w,\$Q'
-.*: Error: Illegal operands `vaddi\.w \$vf1w,\$vf2w,\$R'
-.*: Error: Illegal operands `vaddi\.w \$vf31w,\$vf0w,\$ACC'
-.*: Error: Illegal operands `vaddi\.w \$vf31w,\$vf15w,\$ACCw'
-.*: Error: Illegal operands `vaddi\.xzw \$vf1xyzw,\$vf2xzw,\$I'
-.*: Error: Illegal operands `vaddi\.xzw \$vf31xw,\$vf0xzw,\$I'
-.*: Error: Illegal operands `vaddi\.xzw \$vf31xzw,\$vf15xzw,\$Ixzw'
-.*: Error: Illegal operands `vaddq\.w \$vf1w,\$vf2w,\$Qw'
-.*: Error: Illegal operands `vaddq\.w \$vf31w,\$vf0w,\$R'
-.*: Error: Illegal operands `vaddq\.w \$vf31w,\$vf15w,\$ACCw'
-.*: Error: Illegal operands `vaddq\.w \$vf31w,\$vf31w,\$ACC'
-.*: Error: Illegal operands `vaddq\.xyzw \$vf31xyzw,\$vf32xyzw,\$Q'
-.*: Error: Illegal operands `vaddq\.xyzw \$vf31xyzw,\$32,\$Q'
-.*: Error: Illegal operands `vaddq\.xz \$vf0xz,\$\-1,\$Q'
-.*: Error: Illegal operands `vaddw\.xyzw \$vf31xyzw,\$vf15xyzw,\$vf7z'
-.*: Error: Illegal operands `vaddx\.yw \$vf31yw,\$vf31yw,\$vf31y'
-.*: Error: Illegal operands `vadd\.xyz \$vf0xyz,\$vf0xyz,\$vf0xz'
-.*: Error: Illegal operands `vadd\.xyz \$vf0xyz,\$vf0xyz,\$vf31xyzw'
-.*: Error: Illegal operands `vadd\.xyz \$vf0xyz,\$vf31xyzw,\$vf0xyz'
-.*: Error: Illegal operands `vaddx\.yz \$vf0yz,\$vf0xyz,\$vf0x'
-.*: Error: Illegal operands `vaddz\.xyzw \$vf31xyzw,\$vf0xyzw,\$vf0x'
-.*: Error: Illegal operands `vaddz\.xyzw \$vf31xyzw,\$vf15xyzw,\$vf7y'
-.*: Error: Illegal operands `vaddz\.xyzw \$vf31xyzw,\$vf31xyzw,\$vf31w'
+.*: Error: invalid operands `vabs\.w \$vf0w,\$vf0z'
+.*: Error: invalid operands `vabs\.w \$vf0z,\$vf31w'
+.*: Error: invalid operands `vabs\.xw \$vf0xw,\$vf0w'
+.*: Error: invalid operands `vabs\.xw \$vf0x,\$vf31xw'
+.*: Error: invalid operands `vabs\.xyzw \$vf0xyz,\$vf0xyzw'
+.*: Error: invalid operands `vaddai\.w \$ACCw,\$vf0w,\$Q'
+.*: Error: invalid operands `vaddai\.w \$ACCz,\$vf0w,\$Q'
+.*: Error: invalid operands `vaddai\.xyzw \$ACCxyw,\$vf0xyzw,\$I'
+.*: Error: invalid operands `vaddaq\.w \$ACCw,\$vf31z,\$Q'
+.*: Error: invalid operands `vaddaq\.x \$ACCx,\$vf0w,\$Q'
+.*: Error: invalid operands `vaddaq\.x \$ACCw,\$vf1x,\$Q'
+.*: Error: invalid operands `vaddaq\.xw \$ACCxw,\$vf1z,\$Q'
+.*: Error: invalid operands `vaddaq\.xw \$ACCw,\$vf31xw,\$Q'
+.*: Error: invalid operands `vaddaq\.xyw \$ACCxw,\$vf0xyw,\$Q'
+.*: Error: invalid operands `vaddaq\.xyw \$ACCxyw,\$vf1yw,\$Q'
+.*: Error: invalid operands `vaddaq\.xyzw \$ACCxyzw,\$vf1yzw,\$Q'
+.*: Error: invalid operands `vaddaq\.z \$ACCxz,\$vf0xz,\$Q'
+.*: Error: invalid operands `vaddaq\.x \$ACCxz,\$vf1xz,\$Q'
+.*: Error: invalid operands `vaddaq\.xzw \$ACCxw,\$vf0xzw,\$Q'
+.*: Error: invalid operands `vaddaq\.y \$ACCy,\$vf0y,\$R'
+.*: Error: invalid operands `vaddaq\.y \$ACCy,\$vf1y,\$I'
+.*: Error: invalid operands `vaddaq\.yw \$ACCxyw,\$vf0yw,\$Q'
+.*: Error: invalid operands `vaddaq\.yw \$ACCwy,\$vf1yw,\$Q'
+.*: Error: invalid operands `vaddaq\.yw \$ACCyw,\$vf31wy,\$Q'
+.*: Error: invalid operands `vaddaq\.yz \$ACCy,\$vf0yz,\$Q'
+.*: Error: invalid operands `vaddaq\.yzw \$ACCxyzw,\$vf0yzw,\$Q'
+.*: Error: invalid operands `vaddaq\.yzw \$ACCyzw,\$vf1xyzw,\$Q'
+.*: Error: invalid operands `vaddaq\.yzw \$ACCyzw,\$vf31yzw,\$Qyzw'
+.*: Error: invalid operands `vadda\.w \$ACCw,\$vf1w,\$vf2z'
+.*: Error: invalid operands `vadda\.w \$ACCw,\$vf31w,\$vf0x'
+.*: Error: invalid operands `vaddaw\.xyzw \$ACCxyzw,\$vf0xyzw,\$vf0x'
+.*: Error: invalid operands `vaddaw\.xyzw \$ACCxyzw,\$vf0xyzw,\$vf31xyzw'
+.*: Error: invalid operands `vaddaw\.xz \$ACCxyz,\$vf0xz,\$vf0w'
+.*: Error: invalid operands `vaddaw\.xz \$ACCxzw,\$vf0xz,\$vf31w'
+.*: Error: invalid operands `vaddaw\.xz \$ACCxz,\$vf1xyz,\$vf2w'
+.*: Error: invalid operands `vaddaw\.xz \$ACCxz,\$vf31xzw,\$vf0w'
+.*: Error: invalid operands `vaddaw\.xz \$ACCxz,\$vf31z,\$vf15w'
+.*: Error: invalid operands `vaddaw\.xzw \$ACCxyzw,\$vf0xzw,\$vf0w'
+.*: Error: invalid operands `vaddaw\.xzw \$ACC,\$vf0,\$vf31z'
+.*: Error: invalid operands `vaddaw\.xzw \$ACCxzw,\$vf1xzw,\$vf2z'
+.*: Error: invalid operands `vaddaw\.xzw \$ACCxzw,\$vf31xzw,\$vf0x'
+.*: Error: invalid operands `vaddaw\.y \$ACCy,\$vf0y,\$vf0z'
+.*: Error: invalid operands `vaddax\.w \$ACCw,\$vf0w,\$vf31z'
+.*: Error: invalid operands `vaddax\.w \$ACC,\$vf1,\$vf2z'
+.*: Error: invalid operands `vaddax\.w \$ACCw,\$vf31w,\$vf0w'
+.*: Error: invalid operands `vaddax\.w \$ACCw,\$vf31w,\$vf15y'
+.*: Error: invalid operands `vadda\.xw \$ACCxw,\$vf0xw,\$vf0xyw'
+.*: Error: invalid operands `vadda\.xw \$ACCxw,\$vf0xw,\$vf31wx'
+.*: Error: invalid operands `vaddax\.x \$ACCw,\$vf0x,\$vf0x'
+.*: Error: invalid operands `vaddax\.x \$ACCx,\$vf0x,\$vf31w'
+.*: Error: invalid operands `vaddax\.x \$ACCx,\$vf1x,\$vf2y'
+.*: Error: invalid operands `vaddax\.x \$ACCx,\$vf31x,\$vf0z'
+.*: Error: invalid operands `vaddax\.xw \$ACCxw,\$vf0xw,\$vf0y'
+.*: Error: invalid operands `vaddax\.xw \$ACCxw,\$vf0xw,\$vf31z'
+.*: Error: invalid operands `vaddax\.xw \$ACCxw,\$vf1xw,\$vf2w'
+.*: Error: invalid operands `vaddax\.xw \$ACCxw,\$vf31wx,\$vf0'
+.*: Error: invalid operands `vaddax\.xyzw \$ACC,\$vf1,\$vf2y'
+.*: Error: invalid operands `vaddax\.xyzw \$ACC,\$vf31,\$vf0z'
+.*: Error: invalid operands `vadda\.zw \$ACCzw,\$vf0zw,\$vf0wz'
+.*: Error: invalid operands `vadda\.zw \$ACCzw,\$vf0w,\$vf31zw'
+.*: Error: invalid operands `vadda\.zw \$ACCw,\$vf1zw,\$vf2zw'
+.*: Error: invalid operands `vadda\.zw \$ACCxzw,\$vf31zw,\$vf0zw'
+.*: Error: invalid operands `vadda\.zw \$ACCzw,\$vf31xzw,\$vf15zw'
+.*: Error: invalid operands `vadda\.zw \$ACCzw,\$vf31zw,\$vf31yzw'
+.*: Error: invalid operands `vaddaz\.x \$ACCx,\$vf0x,\$vf0x'
+.*: Error: invalid operands `vaddaz\.x \$ACCx,\$vf0x,\$vf31y'
+.*: Error: invalid operands `vaddaz\.xw \$ACCxw,\$vf31w,\$vf15z'
+.*: Error: invalid operands `vaddaz\.xw \$ACCx,\$vf31xw,\$vf31z'
+.*: Error: invalid operands `vaddaz\.xy \$ACCx,\$vf0xy,\$vf0z'
+.*: Error: invalid operands `vaddaz\.xy \$ACCxyz,\$vf0xy,\$vf31z'
+.*: Error: invalid operands `vaddaz\.y \$ACCx,\$vf31y,\$vf0z'
+.*: Error: invalid operands `vaddaz\.yw \$ACCyw,\$vf0yw,\$a0'
+.*: Error: invalid operands `vaddi\.w \$vf0w,\$vf31w,\$Q'
+.*: Error: invalid operands `vaddi\.w \$vf1w,\$vf2w,\$R'
+.*: Error: invalid operands `vaddi\.w \$vf31w,\$vf0w,\$ACC'
+.*: Error: invalid operands `vaddi\.w \$vf31w,\$vf15w,\$ACCw'
+.*: Error: invalid operands `vaddi\.xzw \$vf1xyzw,\$vf2xzw,\$I'
+.*: Error: invalid operands `vaddi\.xzw \$vf31xw,\$vf0xzw,\$I'
+.*: Error: invalid operands `vaddi\.xzw \$vf31xzw,\$vf15xzw,\$Ixzw'
+.*: Error: invalid operands `vaddq\.w \$vf1w,\$vf2w,\$Qw'
+.*: Error: invalid operands `vaddq\.w \$vf31w,\$vf0w,\$R'
+.*: Error: invalid operands `vaddq\.w \$vf31w,\$vf15w,\$ACCw'
+.*: Error: invalid operands `vaddq\.w \$vf31w,\$vf31w,\$ACC'
+.*: Error: invalid operands `vaddq\.xyzw \$vf31xyzw,\$vf32xyzw,\$Q'
+.*: Error: invalid operands `vaddq\.xyzw \$vf31xyzw,\$32,\$Q'
+.*: Error: invalid operands `vaddq\.xz \$vf0xz,\$\-1,\$Q'
+.*: Error: invalid operands `vaddw\.xyzw \$vf31xyzw,\$vf15xyzw,\$vf7z'
+.*: Error: invalid operands `vaddx\.yw \$vf31yw,\$vf31yw,\$vf31y'
+.*: Error: invalid operands `vadd\.xyz \$vf0xyz,\$vf0xyz,\$vf0xz'
+.*: Error: invalid operands `vadd\.xyz \$vf0xyz,\$vf0xyz,\$vf31xyzw'
+.*: Error: invalid operands `vadd\.xyz \$vf0xyz,\$vf31xyzw,\$vf0xyz'
+.*: Error: invalid operands `vaddx\.yz \$vf0yz,\$vf0xyz,\$vf0x'
+.*: Error: invalid operands `vaddz\.xyzw \$vf31xyzw,\$vf0xyzw,\$vf0x'
+.*: Error: invalid operands `vaddz\.xyzw \$vf31xyzw,\$vf15xyzw,\$vf7y'
+.*: Error: invalid operands `vaddz\.xyzw \$vf31xyzw,\$vf31xyzw,\$vf31w'
 .*: Error: operand 1 out of range `vcallms -1'
 .*: Error: operand 1 out of range `vcallms -0x0080'
 .*: Error: operand 1 out of range `vcallms 0x1'
@@ -102,574 +102,574 @@
 .*: Error: operand 1 out of range `vcallms 0x2'
 .*: Error: operand 1 out of range `vcallms 0x40000'
 .*: Error: operand 1 out of range `vcallms 0x40008'
-.*: Error: Illegal operands `vclipw\.xyz \$vf0xyz,\$vf0x'
-.*: Error: Illegal operands `vclipw\.xyz \$vf0xyz,\$vf31y'
-.*: Error: Illegal operands `vclipw\.xyz \$vf1xyz,\$vf2z'
-.*: Error: Illegal operands `vdiv \$Q,\$vf0x,\$vf0xy'
-.*: Error: Illegal operands `vdiv \$Q,\$vf0xyzw,\$vf31y'
-.*: Error: Illegal operands `vdiv \$Q,\$vf1,\$vf2z'
-.*: Error: Illegal operands `vdiv \$Q,\$vf31x,\$vf15'
-.*: Error: Illegal operands `vdiv \$0,\$vf31w,\$vf31y'
-.*: Error: Illegal operands `vdiv \$Q,\$vf32y,\$vf0w'
-.*: Error: Illegal operands `vftoi0\.w \$vf0w,\$vf0x'
-.*: Error: Illegal operands `vftoi0\.w \$vf0x,\$vf31w'
-.*: Error: Illegal operands `vftoi0\.w \$vf1xw,\$vf2w'
-.*: Error: Illegal operands `vftoi0\.w \$vf31wx,\$vf0w'
-.*: Error: Illegal operands `vftoi0\.w \$vf31w,\$vf15wz'
-.*: Error: Illegal operands `vftoi12\.xw \$vf0xw,\$vf0w'
-.*: Error: Illegal operands `vftoi12\.xw \$vf0x,\$vf31xw'
-.*: Error: Illegal operands `vftoi15\.xyz \$vf31xyzw,\$vf15xyz'
-.*: Error: Illegal operands `vftoi15\.xyz \$vf31xyz,\$vf31xyzw'
-.*: Error: Illegal operands `vftoi15\.xyzw \$vf0xyzw,\$vf0xyz'
-.*: Error: Illegal operands `vftoi15\.y \$vf1y,\$vf2x'
-.*: Error: Illegal operands `vftoi15\.y \$vf31y,\$vf0w'
+.*: Error: invalid operands `vclipw\.xyz \$vf0xyz,\$vf0x'
+.*: Error: invalid operands `vclipw\.xyz \$vf0xyz,\$vf31y'
+.*: Error: invalid operands `vclipw\.xyz \$vf1xyz,\$vf2z'
+.*: Error: invalid operands `vdiv \$Q,\$vf0x,\$vf0xy'
+.*: Error: invalid operands `vdiv \$Q,\$vf0xyzw,\$vf31y'
+.*: Error: invalid operands `vdiv \$Q,\$vf1,\$vf2z'
+.*: Error: invalid operands `vdiv \$Q,\$vf31x,\$vf15'
+.*: Error: invalid operands `vdiv \$0,\$vf31w,\$vf31y'
+.*: Error: invalid operands `vdiv \$Q,\$vf32y,\$vf0w'
+.*: Error: invalid operands `vftoi0\.w \$vf0w,\$vf0x'
+.*: Error: invalid operands `vftoi0\.w \$vf0x,\$vf31w'
+.*: Error: invalid operands `vftoi0\.w \$vf1xw,\$vf2w'
+.*: Error: invalid operands `vftoi0\.w \$vf31wx,\$vf0w'
+.*: Error: invalid operands `vftoi0\.w \$vf31w,\$vf15wz'
+.*: Error: invalid operands `vftoi12\.xw \$vf0xw,\$vf0w'
+.*: Error: invalid operands `vftoi12\.xw \$vf0x,\$vf31xw'
+.*: Error: invalid operands `vftoi15\.xyz \$vf31xyzw,\$vf15xyz'
+.*: Error: invalid operands `vftoi15\.xyz \$vf31xyz,\$vf31xyzw'
+.*: Error: invalid operands `vftoi15\.xyzw \$vf0xyzw,\$vf0xyz'
+.*: Error: invalid operands `vftoi15\.y \$vf1y,\$vf2x'
+.*: Error: invalid operands `vftoi15\.y \$vf31y,\$vf0w'
 .*: Error: operand 3 out of range `viaddi \$vi0,\$vi0,-17'
 .*: Error: operand 3 out of range `viaddi \$vi1,\$vi2,16'
 .*: Error: operand 3 out of range `viaddi \$vi31,\$vi0,17'
 .*: Error: operand 3 out of range `viaddi \$vi31,\$vi15,32'
 .*: Error: operand 3 out of range `viaddi \$vi31,\$vi31,31'
-.*: Error: Illegal operands `viand \$vi0xyzw,\$vi0,\$vi0'
-.*: Error: Illegal operands `viand \$vi0,\$vi0xyzw,\$vi31'
-.*: Error: Illegal operands `viand \$vi0,\$vi31,\$vi0xyzw'
-.*: Error: Illegal operands `viand \$vi1,\$vi2,\$vi3x'
-.*: Error: Illegal operands `viand \$vi31,\$vi0y,\$vi0'
-.*: Error: Illegal operands `viand \$vi31w,\$vi15,\$vi7'
-.*: Error: Illegal operands `viand \$vi31,\$vi31,\$vi31x'
-.*: Error: Illegal operands `vilwr\.w \$vi0,\(\$vi0x\)'
-.*: Error: Illegal operands `vilwr\.w \$vi0,\(\$vi31y\)'
-.*: Error: Illegal operands `vilwr\.w \$vi1,\(\$vi2z\)'
-.*: Error: Illegal operands `vilwr\.w \$vi31,\(\$vi0w\)'
-.*: Error: Illegal operands `vilwr\.w \$vi31,\(\$vi15xyzw\)'
-.*: Error: Illegal operands `vilwr\.w \$vi31x,\(\$vi31\)'
-.*: Error: Illegal operands `vilwr\.x \$vi0y,\(\$vi0\)'
-.*: Error: Illegal operands `vilwr\.x \$vi0z,\(\$vi31\)'
-.*: Error: Illegal operands `vilwr\.x \$vi1w,\(\$vi2\)'
-.*: Error: Illegal operands `vilwr\.x \$vi31xyzw,\(\$vi0\)'
-.*: Error: Illegal operands `vilwr\.x \$vi31xy,\(\$vi15\)'
-.*: Error: Illegal operands `vilwr\.x \$vi31zw,\(\$vi31\)'
-.*: Error: Illegal operands `vilwr\.y \$vi0wx,\(\$vi0\)'
-.*: Error: Illegal operands `vilwr\.y \$vi0xyzw,\(\$vi31\)'
-.*: Error: Illegal operands `vilwr\.y \$vi1y,\(\$vi2\)'
-.*: Error: Illegal operands `vilwr\.y \$vi31,\(\$vi0y\)'
-.*: Error: Illegal operands `vilwr\.z \$vi0z,\(\$vi0\)'
-.*: Error: Illegal operands `vilwr\.z \$vi0,\(\$vi31z\)'
-.*: Error: Illegal operands `vior \$vi0x,\$vi0,\$vi0'
-.*: Error: Illegal operands `vior \$vi0,\$vi0x,\$vi31'
-.*: Error: Illegal operands `vior \$vi0,\$vi31,\$vi0x'
-.*: Error: Illegal operands `vior \$vi1y,\$vi2,\$vi3'
-.*: Error: Illegal operands `vior \$vi31,\$vi0y,\$vi0'
-.*: Error: Illegal operands `vior \$vi31,\$vi15,\$vi7y'
-.*: Error: Illegal operands `vior \$vi31xyzw,\$vi31,\$vi31'
-.*: Error: Illegal operands `visub \$vi0x,\$vi0,\$vi0'
-.*: Error: Illegal operands `visub \$vi0,\$vi0y,\$vi31'
-.*: Error: Illegal operands `visub \$vi0,\$vi31,\$vi0z'
-.*: Error: Illegal operands `visub \$vi1w,\$vi2,\$vi3'
-.*: Error: Illegal operands `visub \$vi31,\$vi0xy,\$vi0'
-.*: Error: Illegal operands `visub \$vi31,\$vi15,\$vi7zw'
-.*: Error: Illegal operands `visub \$vi31,\$vi31,\$vi31w'
-.*: Error: Illegal operands `viswr\.w \$vi0,\(\$vi0w\)'
-.*: Error: Illegal operands `viswr\.w \$vi0w,\(\$vi31\)'
-.*: Error: Illegal operands `viswr\.x \$vi0x,\(\$vi31\)'
-.*: Error: Illegal operands `viswr\.x \$vi1,\(\$vi2x\)'
-.*: Error: Illegal operands `viswr\.x \$vi31x,\(\$vi0x\)'
-.*: Error: Illegal operands `viswr\.y \$vi31y,\(\$vi15\)'
-.*: Error: Illegal operands `viswr\.y \$vi31,\(\$vi31y\)'
-.*: Error: Illegal operands `viswr\.z \$vi0,\(\$vi0z\)'
-.*: Error: Illegal operands `viswr\.z \$vi0z,\(\$vi31\)'
-.*: Error: Illegal operands `viswr\.z \$vi1z,\(\$vi2z\)'
-.*: Error: Illegal operands `vitof0\.w \$vf1w,\$vf2x'
-.*: Error: Illegal operands `vitof0\.w \$vf31z,\$vf0w'
-.*: Error: Illegal operands `vitof0\.xw \$vf0xw,\$vf0xyw'
-.*: Error: Illegal operands `vitof0\.xw \$vf0xw,\$vf31w'
-.*: Error: Illegal operands `vitof12\.xw \$vf31xw,\$vf0x'
-.*: Error: Illegal operands `vitof12\.xzw \$vf0xzw,\$vf31xz'
-.*: Error: Illegal operands `vitof12\.xzw \$vf1xzw,\$vf2xw'
-.*: Error: Illegal operands `vitof12\.xzw \$vf31xzw,\$vf0xyzw'
-.*: Error: Illegal operands `vitof12\.xzw \$vf31xyzw,\$vf15xzw'
-.*: Error: Illegal operands `vitof12\.xzw \$vf31xw,\$vf31xzw'
-.*: Error: Illegal operands `vitof12\.y \$vf0y,\$vf0w'
-.*: Error: Illegal operands `vitof12\.y \$vf0x,\$vf31y'
-.*: Error: Illegal operands `vitof15\.xyw \$vf0xyw,\$vf31xw'
-.*: Error: Illegal operands `vitof15\.xyw \$vf1xyw,\$vf2yxw'
-.*: Error: Illegal operands `vitof15\.xyw \$vf31xwy,\$vf15xyw'
-.*: Error: Illegal operands `vitof15\.xyzw \$vf1\.xyzw,\$vf2xyzw'
-.*: Error: Illegal operands `vitof15\.xyzw \$vf31xyzw,\$vf0\.xyzw'
-.*: Error: Illegal operands `vitof4\.xw \$vf31xw,\$31xw'
-.*: Error: Illegal operands `vitof4\.xy \$0xy,\$vf0xy'
-.*: Error: Illegal operands `vitof4\.xyzw \$vf0yzw,\$vf0xyzw'
-.*: Error: Illegal operands `vitof4\.yzw \$vf1yzw,\$vf2yw'
-.*: Error: Illegal operands `vlqd\.w \$vf0,\(\-\-\$vi0w\)'
-.*: Error: Illegal operands `vlqd\.w \$vf0,\(\-\-\$vi31w\)'
-.*: Error: Illegal operands `vlqd\.w \$vf0x,\(\-\-\$vi0\)'
-.*: Error: Illegal operands `vlqd\.x \$vf0w,\(\-\-\$vi0x\)'
-.*: Error: Illegal operands `vlqd\.x \$vf0x,\(\-\-\$vi31x\)'
-.*: Error: Illegal operands `vlqd\.x \$vf0w,\(\-\-\$vi0\)'
-.*: Error: Illegal operands `vlqd\.xw \$vf0,\(\-\-\$vi0xw\)'
-.*: Error: Illegal operands `vlqd\.xy \$vf0,\(\-\-\$vi0xy\)'
-.*: Error: Illegal operands `vlqd\.xyw \$vf0,\(\-\-\$vi0xyw\)'
-.*: Error: Illegal operands `vlqd\.xyz \$vf0,\(\-\-\$vi0xyz\)'
-.*: Error: Illegal operands `vlqd\.xyzw \$vf0,\(\-\-\$vi0xyzw\)'
-.*: Error: Illegal operands `vlqd\.xz \$vf0,\(\-\-\$vi0xz\)'
-.*: Error: Illegal operands `vlqd\.xzw \$vf0,\(\-\-\$vi0xzw\)'
-.*: Error: Illegal operands `vlqd\.y \$vf0,\(\-\-\$vi0y\)'
-.*: Error: Illegal operands `vlqd\.yw \$vf0,\(\-\-\$vi0yw\)'
-.*: Error: Illegal operands `vlqd\.yz \$vf0,\(\-\-\$vi0yz\)'
-.*: Error: Illegal operands `vlqd\.yzw \$vf0,\(\-\-\$vi0yzw\)'
-.*: Error: Illegal operands `vlqd\.z \$vf0,\(\-\-\$vi0z\)'
-.*: Error: Illegal operands `vlqd\.zw \$vf0,\(\-\-\$vi0zw\)'
-.*: Error: Illegal operands `vlqi\.w \$vf0,\(\$vi0w\+\+\)'
-.*: Error: Illegal operands `vlqi\.x \$vf31,\(\$vi15x\+\+\)'
-.*: Error: Illegal operands `vlqi\.xw \$vf0x,\(\$vi0\+\+\)'
-.*: Error: Illegal operands `vlqi\.xw \$vf0,\(\$vi31xw\+\+\)'
-.*: Error: Illegal operands `vlqi\.xy \$vf0,\(\$vi0xy\+\+\)'
+.*: Error: invalid operands `viand \$vi0xyzw,\$vi0,\$vi0'
+.*: Error: invalid operands `viand \$vi0,\$vi0xyzw,\$vi31'
+.*: Error: invalid operands `viand \$vi0,\$vi31,\$vi0xyzw'
+.*: Error: invalid operands `viand \$vi1,\$vi2,\$vi3x'
+.*: Error: invalid operands `viand \$vi31,\$vi0y,\$vi0'
+.*: Error: invalid operands `viand \$vi31w,\$vi15,\$vi7'
+.*: Error: invalid operands `viand \$vi31,\$vi31,\$vi31x'
+.*: Error: invalid operands `vilwr\.w \$vi0,\(\$vi0x\)'
+.*: Error: invalid operands `vilwr\.w \$vi0,\(\$vi31y\)'
+.*: Error: invalid operands `vilwr\.w \$vi1,\(\$vi2z\)'
+.*: Error: invalid operands `vilwr\.w \$vi31,\(\$vi0w\)'
+.*: Error: invalid operands `vilwr\.w \$vi31,\(\$vi15xyzw\)'
+.*: Error: invalid operands `vilwr\.w \$vi31x,\(\$vi31\)'
+.*: Error: invalid operands `vilwr\.x \$vi0y,\(\$vi0\)'
+.*: Error: invalid operands `vilwr\.x \$vi0z,\(\$vi31\)'
+.*: Error: invalid operands `vilwr\.x \$vi1w,\(\$vi2\)'
+.*: Error: invalid operands `vilwr\.x \$vi31xyzw,\(\$vi0\)'
+.*: Error: invalid operands `vilwr\.x \$vi31xy,\(\$vi15\)'
+.*: Error: invalid operands `vilwr\.x \$vi31zw,\(\$vi31\)'
+.*: Error: invalid operands `vilwr\.y \$vi0wx,\(\$vi0\)'
+.*: Error: invalid operands `vilwr\.y \$vi0xyzw,\(\$vi31\)'
+.*: Error: invalid operands `vilwr\.y \$vi1y,\(\$vi2\)'
+.*: Error: invalid operands `vilwr\.y \$vi31,\(\$vi0y\)'
+.*: Error: invalid operands `vilwr\.z \$vi0z,\(\$vi0\)'
+.*: Error: invalid operands `vilwr\.z \$vi0,\(\$vi31z\)'
+.*: Error: invalid operands `vior \$vi0x,\$vi0,\$vi0'
+.*: Error: invalid operands `vior \$vi0,\$vi0x,\$vi31'
+.*: Error: invalid operands `vior \$vi0,\$vi31,\$vi0x'
+.*: Error: invalid operands `vior \$vi1y,\$vi2,\$vi3'
+.*: Error: invalid operands `vior \$vi31,\$vi0y,\$vi0'
+.*: Error: invalid operands `vior \$vi31,\$vi15,\$vi7y'
+.*: Error: invalid operands `vior \$vi31xyzw,\$vi31,\$vi31'
+.*: Error: invalid operands `visub \$vi0x,\$vi0,\$vi0'
+.*: Error: invalid operands `visub \$vi0,\$vi0y,\$vi31'
+.*: Error: invalid operands `visub \$vi0,\$vi31,\$vi0z'
+.*: Error: invalid operands `visub \$vi1w,\$vi2,\$vi3'
+.*: Error: invalid operands `visub \$vi31,\$vi0xy,\$vi0'
+.*: Error: invalid operands `visub \$vi31,\$vi15,\$vi7zw'
+.*: Error: invalid operands `visub \$vi31,\$vi31,\$vi31w'
+.*: Error: invalid operands `viswr\.w \$vi0,\(\$vi0w\)'
+.*: Error: invalid operands `viswr\.w \$vi0w,\(\$vi31\)'
+.*: Error: invalid operands `viswr\.x \$vi0x,\(\$vi31\)'
+.*: Error: invalid operands `viswr\.x \$vi1,\(\$vi2x\)'
+.*: Error: invalid operands `viswr\.x \$vi31x,\(\$vi0x\)'
+.*: Error: invalid operands `viswr\.y \$vi31y,\(\$vi15\)'
+.*: Error: invalid operands `viswr\.y \$vi31,\(\$vi31y\)'
+.*: Error: invalid operands `viswr\.z \$vi0,\(\$vi0z\)'
+.*: Error: invalid operands `viswr\.z \$vi0z,\(\$vi31\)'
+.*: Error: invalid operands `viswr\.z \$vi1z,\(\$vi2z\)'
+.*: Error: invalid operands `vitof0\.w \$vf1w,\$vf2x'
+.*: Error: invalid operands `vitof0\.w \$vf31z,\$vf0w'
+.*: Error: invalid operands `vitof0\.xw \$vf0xw,\$vf0xyw'
+.*: Error: invalid operands `vitof0\.xw \$vf0xw,\$vf31w'
+.*: Error: invalid operands `vitof12\.xw \$vf31xw,\$vf0x'
+.*: Error: invalid operands `vitof12\.xzw \$vf0xzw,\$vf31xz'
+.*: Error: invalid operands `vitof12\.xzw \$vf1xzw,\$vf2xw'
+.*: Error: invalid operands `vitof12\.xzw \$vf31xzw,\$vf0xyzw'
+.*: Error: invalid operands `vitof12\.xzw \$vf31xyzw,\$vf15xzw'
+.*: Error: invalid operands `vitof12\.xzw \$vf31xw,\$vf31xzw'
+.*: Error: invalid operands `vitof12\.y \$vf0y,\$vf0w'
+.*: Error: invalid operands `vitof12\.y \$vf0x,\$vf31y'
+.*: Error: invalid operands `vitof15\.xyw \$vf0xyw,\$vf31xw'
+.*: Error: invalid operands `vitof15\.xyw \$vf1xyw,\$vf2yxw'
+.*: Error: invalid operands `vitof15\.xyw \$vf31xwy,\$vf15xyw'
+.*: Error: invalid operands `vitof15\.xyzw \$vf1\.xyzw,\$vf2xyzw'
+.*: Error: invalid operands `vitof15\.xyzw \$vf31xyzw,\$vf0\.xyzw'
+.*: Error: invalid operands `vitof4\.xw \$vf31xw,\$31xw'
+.*: Error: invalid operands `vitof4\.xy \$0xy,\$vf0xy'
+.*: Error: invalid operands `vitof4\.xyzw \$vf0yzw,\$vf0xyzw'
+.*: Error: invalid operands `vitof4\.yzw \$vf1yzw,\$vf2yw'
+.*: Error: invalid operands `vlqd\.w \$vf0,\(\-\-\$vi0w\)'
+.*: Error: invalid operands `vlqd\.w \$vf0,\(\-\-\$vi31w\)'
+.*: Error: invalid operands `vlqd\.w \$vf0x,\(\-\-\$vi0\)'
+.*: Error: invalid operands `vlqd\.x \$vf0w,\(\-\-\$vi0x\)'
+.*: Error: invalid operands `vlqd\.x \$vf0x,\(\-\-\$vi31x\)'
+.*: Error: invalid operands `vlqd\.x \$vf0w,\(\-\-\$vi0\)'
+.*: Error: invalid operands `vlqd\.xw \$vf0,\(\-\-\$vi0xw\)'
+.*: Error: invalid operands `vlqd\.xy \$vf0,\(\-\-\$vi0xy\)'
+.*: Error: invalid operands `vlqd\.xyw \$vf0,\(\-\-\$vi0xyw\)'
+.*: Error: invalid operands `vlqd\.xyz \$vf0,\(\-\-\$vi0xyz\)'
+.*: Error: invalid operands `vlqd\.xyzw \$vf0,\(\-\-\$vi0xyzw\)'
+.*: Error: invalid operands `vlqd\.xz \$vf0,\(\-\-\$vi0xz\)'
+.*: Error: invalid operands `vlqd\.xzw \$vf0,\(\-\-\$vi0xzw\)'
+.*: Error: invalid operands `vlqd\.y \$vf0,\(\-\-\$vi0y\)'
+.*: Error: invalid operands `vlqd\.yw \$vf0,\(\-\-\$vi0yw\)'
+.*: Error: invalid operands `vlqd\.yz \$vf0,\(\-\-\$vi0yz\)'
+.*: Error: invalid operands `vlqd\.yzw \$vf0,\(\-\-\$vi0yzw\)'
+.*: Error: invalid operands `vlqd\.z \$vf0,\(\-\-\$vi0z\)'
+.*: Error: invalid operands `vlqd\.zw \$vf0,\(\-\-\$vi0zw\)'
+.*: Error: invalid operands `vlqi\.w \$vf0,\(\$vi0w\+\+\)'
+.*: Error: invalid operands `vlqi\.x \$vf31,\(\$vi15x\+\+\)'
+.*: Error: invalid operands `vlqi\.xw \$vf0x,\(\$vi0\+\+\)'
+.*: Error: invalid operands `vlqi\.xw \$vf0,\(\$vi31xw\+\+\)'
+.*: Error: invalid operands `vlqi\.xy \$vf0,\(\$vi0xy\+\+\)'
 .*: Error: bad expression
 .*: Error: missing '\)'
-.*: Error: Illegal operands `vlqi\.xy \$vf1,\(\$2xy\+\+\)'
-.*: Error: Illegal operands `vlqi\.xyw \$vf0,\(\$vi0xyw\+\+\)'
-.*: Error: Illegal operands `vlqi\.xyz \$vf0,\(\$vi0xyz\+\+\)'
-.*: Error: Illegal operands `vlqi\.xyzw \$vf0,\(\$vi0xyzw\+\+\)'
-.*: Error: Illegal operands `vlqi\.xz \$vf0,\(\$vi0xz\+\+\)'
-.*: Error: Illegal operands `vlqi\.xzw \$vf0,\(\$vi0xzw\+\+\)'
-.*: Error: Illegal operands `vlqi\.y \$vf0,\(\$vi0y\+\+\)'
-.*: Error: Illegal operands `vlqi\.yw \$vf0,\(\$vi0yw\+\+\)'
-.*: Error: Illegal operands `vlqi\.yz \$vf0yz,\(\$vi0yz\+\+\)'
-.*: Error: Illegal operands `vlqi\.yzw \$vf0,\(\$vi0yzw\+\+\)'
-.*: Error: Illegal operands `vlqi\.z \$vf0,\(\$vi0z\+\+\)'
-.*: Error: Illegal operands `vlqi\.zw \$vf0,\(\$vi0zw\+\+\)'
-.*: Error: Illegal operands `vmaddai\.w \$ACCw,\$vf0w,\$R'
-.*: Error: Illegal operands `vmaddai\.w \$ACCw,\$vf1w,\$Iw'
-.*: Error: Illegal operands `vmaddai\.w \$ACCw,\$vf31w,\$Q'
-.*: Error: Illegal operands `vmaddai\.x \$ACCx,\$vf0x,\$ACC'
-.*: Error: Illegal operands `vmaddai\.x \$ACCy,\$vf1w,\$I'
-.*: Error: Illegal operands `vmaddai\.x \$ACCxy,\$vf31x,\$I'
-.*: Error: Illegal operands `vmaddai\.xw \$ACCxw,\$vf0xyw,\$I'
-.*: Error: Illegal operands `vmaddai\.xy \$ACCxy,\$vf0xyw,\$I'
-.*: Error: Illegal operands `vmaddai\.xy \$ACCxy,\$vf1xyz,\$I'
-.*: Error: Illegal operands `vmaddai\.xy \$ACCxyz,\$vf31xy,\$I'
-.*: Error: Illegal operands `vmaddai\.xyw \$ACCxy,\$vf0xyw,\$I'
-.*: Error: Illegal operands `vmaddai\.yw \$ACCyw,\$vf1w,\$I'
-.*: Error: Illegal operands `vmaddai\.yw \$ACCyw,\$vf31y,\$I'
-.*: Error: Illegal operands `vmaddai\.yz \$ACCyz,\$vf0yz,\$R'
-.*: Error: Illegal operands `vmaddaq\.xyz \$ACCxyz,\$vf0xyz,\$R'
-.*: Error: Illegal operands `vmaddaq\.xyz \$ACCxyz,\$vf1xyz,\$Qxyz'
-.*: Error: Illegal operands `vmaddaq\.xzw \$ACCxzw,\$vf31xzw,\$Qxzw'
-.*: Error: Illegal operands `vmaddaq\.y \$ACCy,\$vf0y,\$R'
-.*: Error: Illegal operands `vmaddaq\.y \$ACCy,\$vf1y,\$ACCy'
-.*: Error: Illegal operands `vmaddaq\.y \$ACCy,\$vf31y,\$ACC'
-.*: Error: Illegal operands `vmaddaw\.z \$ACCz,\$vf31z,\$vf0x'
-.*: Error: Illegal operands `vmaddaw\.zw \$ACCzw,\$vf31zw,\$vf15y'
-.*: Error: Illegal operands `vmaddax\.w \$ACCw,\$vf1w,\$vf2w'
-.*: Error: Illegal operands `vmadda\.xw \$ACCxw,\$vf31xw,\$vf31wx'
-.*: Error: Illegal operands `vmaddax\.xyz \$ACCxyz,\$vf0xyz,\$vf0xyz'
-.*: Error: Illegal operands `vmaddax\.xyzw \$ACCxyzw,\$vf0xyzw,\$vf0xyzw'
-.*: Error: Illegal operands `vmaddax\.xz \$ACCxz,\$vf0xz,\$vf31xz'
-.*: Error: Illegal operands `vmaddax\.xzw \$ACCxzw,\$vf0xzw,\$vf0xzw'
-.*: Error: Illegal operands `vmaddax\.z \$ACCz,\$vf31z,\$vf15z'
-.*: Error: Illegal operands `vmaddax\.zw \$ACCzw,\$vf1zw,\$vf2zw'
-.*: Error: Illegal operands `vmadday\.w \$ACCw,\$vf1w,\$vf2w'
-.*: Error: Illegal operands `vmadday\.w \$ACCw,\$vf31y,\$vf0y'
-.*: Error: Illegal operands `vmadday\.w \$ACCy,\$vf31w,\$vf15y'
-.*: Error: Illegal operands `vmadday\.w \$ACCy,\$vf31y,\$vf31y'
-.*: Error: Illegal operands `vmadday\.xyzw \$ACCxyzw,\$vf0xyzw,\$vf0xyzw'
-.*: Error: Illegal operands `vmadday\.xyzw \$ACCxyzw,\$vf0y,\$vf31y'
-.*: Error: Illegal operands `vmadday\.xyzw \$ACCy,\$vf1xyzw,\$vf2y'
-.*: Error: Illegal operands `vmadday\.xyzw \$ACCy,\$vf31y,\$vf0y'
-.*: Error: Illegal operands `vmaddi\.x \$vf0x,\$vf31x,\$Ix'
-.*: Error: Illegal operands `vmaddi\.xw \$vf1xw,\$vf2xw,\$Ixw'
-.*: Error: Illegal operands `vmaddi\.xy \$vf31xy,\$vf0xy,\$Ixy'
-.*: Error: Illegal operands `vmaddi\.xyw \$vf0xyw,\$vf0xyw,\$Ixyw'
-.*: Error: Illegal operands `vmaddi\.xyzw \$vf1xyzw,\$vf2xyzw,\$Ixyzw'
-.*: Error: Illegal operands `vmaddi\.y \$vf0y,\$vf0y,\$Iy'
-.*: Error: Illegal operands `vmaddi\.yw \$vf0yw,\$vf0yw,\$Iyw'
-.*: Error: Illegal operands `vmaddi\.zw \$vf0zw,\$vf31zw,\$0'
-.*: Error: Illegal operands `vmaddq\.w \$vf0w,\$vf0w,\$0'
-.*: Error: Illegal operands `vmadd\.w \$vf0w,\$vf0w,\$vf0y'
-.*: Error: Illegal operands `vmaddw\.xyz \$vf31xyz,\$vf15xyz'
-.*: Error: Illegal operands `vmaddw\.xyzw \$vf0xyzw,\$vf31xyzw,\$vf0xyzw'
-.*: Error: Illegal operands `vmaddx\.yw \$vf1yw,\$vf2yw,\$vf3yw'
-.*: Error: Illegal operands `vmaddy\.xy \$vf31xy,\$vf15xy,\$vf7xy'
-.*: Error: Illegal operands `vmadd\.z \$vf1z,\$vf2z,\$vf3x'
-.*: Error: Illegal operands `vmadd\.z \$vf31z,\$vf0z,\$vf0w'
-.*: Error: Illegal operands `vmaddz\.xyw \$vf0xyw,\$vf0xyw,\$vf31x'
-.*: Error: Illegal operands `vmaddz\.xz \$vf0xz,\$vf31xz,\$vf0xz'
-.*: Error: Illegal operands `vmaddz\.y \$vf31y,\$vf0y,\$vf0y'
-.*: Error: Illegal operands `vmaxi\.w \$vf31w,\$vf15w,\$Q'
-.*: Error: Illegal operands `vmaxi\.w \$vf31w,\$vf31w,\$0'
-.*: Error: Illegal operands `vmax\.w \$vf31w,\$vf31w,\$vf31x'
-.*: Error: Illegal operands `vmaxw\.w \$vf0w,\$vf0w,\$vf0x'
-.*: Error: Illegal operands `vmaxw\.x \$vf0x,\$vf0x,\$vf0x'
-.*: Error: Illegal operands `vmaxw\.x \$vf0w,\$vf0w,\$vf31w'
-.*: Error: Illegal operands `vmaxw\.xw \$vf0xw,\$vf0xw,\$vf0xw'
-.*: Error: Illegal operands `vmaxw\.xw \$vf0w,\$vf0w,\$vf31w'
-.*: Error: Illegal operands `vmaxw\.xy \$vf0xy,\$vf31xy,\$vf0xy'
-.*: Error: Illegal operands `vmaxw\.xy \$vf1xy,\$vf2w,\$vf3w'
-.*: Error: Illegal operands `vmaxw\.xy \$vf31w,\$vf0xy,\$vf0w'
-.*: Error: Illegal operands `vmax\.x \$vf0x,\$vf0x,\$vf31w'
-.*: Error: Illegal operands `vmaxx\.w \$vf0w,\$vf0w,\$vf31w'
-.*: Error: Illegal operands `vmaxx\.w \$vf0x,\$vf31x,\$vf0x'
-.*: Error: Illegal operands `vmaxx\.w \$vf31w,\$vf0w,\$vf0w'
-.*: Error: Illegal operands `vmaxx\.w \$vf31x,\$vf15x,\$vf7x'
-.*: Error: Illegal operands `vmax\.xw \$vf31xw,\$vf15xw,\$vf7w'
-.*: Error: Illegal operands `vmaxx\.x \$vf0x,\$vf0x,\$vf0w'
-.*: Error: Illegal operands `vmaxx\.x \$vf31w,\$vf15x,\$vf7x'
-.*: Error: Illegal operands `vmaxx\.x \$vf31x,\$vf31w,\$vf31x'
-.*: Error: Illegal operands `vmaxx\.xw \$vf31xw,\$vf15xw,\$vf7xw'
-.*: Error: Illegal operands `vmaxx\.xy \$vf0xy,\$vf31xy,\$vf0xy'
-.*: Error: Illegal operands `vmaxx\.xyw \$vf0xyw,\$vf0xyw,\$vf0xyw'
-.*: Error: Illegal operands `vmaxx\.xyz \$vf0xyz,\$vf0xyz,\$vf0xyz'
-.*: Error: Illegal operands `vmaxx\.xyzw \$vf0xyzw,\$vf0xyzw,\$vf0xyzw'
-.*: Error: Illegal operands `vmaxx\.xyzw \$vf0xyzw,\$vf0x,\$vf31x'
-.*: Error: Illegal operands `vmaxx\.xyzw \$vf0x,\$vf31xyzw,\$vf0x'
-.*: Error: Illegal operands `vmaxx\.xyzw \$vf1x,\$vf2x,\$vf3x'
-.*: Error: Illegal operands `vmaxx\.xzw \$vf31xzw,\$vf15xzw,\$vf7xzw'
-.*: Error: Illegal operands `vmaxx\.y \$vf0y,\$vf0y,\$vf0y'
-.*: Error: Illegal operands `vmaxx\.y \$vf0y,\$vf0x,\$vf31x'
-.*: Error: Illegal operands `vmaxx\.y \$vf0x,\$vf31y,\$vf0x'
-.*: Error: Illegal operands `vmaxx\.yw \$vf1yw,\$vf2yw,\$vf3yw'
-.*: Error: Illegal operands `vmaxx\.yz \$vf0yz,\$vf0yz,\$vf0yz'
-.*: Error: Illegal operands `vmaxx\.yz \$vf0x,\$vf0x,\$vf31x'
-.*: Error: Illegal operands `vmaxx\.z \$vf31z,\$vf0z,\$vf0z'
-.*: Error: Illegal operands `vmaxx\.z \$vf31z,\$vf15x,\$vf7x'
-.*: Error: Illegal operands `vmaxx\.z \$vf31x,\$vf31z,\$vf31x'
-.*: Error: Illegal operands `vmaxx\.zw \$vf1zw,\$vf2zw,\$vf3zw'
-.*: Error: Illegal operands `vmax\.y \$vf0y,\$vf0y,\$vf31x'
-.*: Error: Illegal operands `vmax\.yw \$vf0yw,\$vf0yw,\$vf31w'
-.*: Error: Illegal operands `vmax\.yw \$vf0yw,\$vf31yw,\$vf0y'
-.*: Error: Illegal operands `vmaxy\.xz \$vf31xz,\$vf15xz,\$vf7xz'
-.*: Error: Illegal operands `vmaxy\.xzw \$vf1xzw,\$vf2xzw,\$vf3xzw'
-.*: Error: Illegal operands `vmaxy\.y \$vf1y,\$vf2y'
-.*: Error: Illegal operands `vmaxy\.yz \$vf0yz,\$vf31yz,\$vf0yz'
-.*: Error: Illegal operands `vmaxy\.yzw \$vf0yzw,\$vf0yzw,\$vf0yzw'
-.*: Error: Illegal operands `vmaxy\.yzw \$vf31y,\$vf15y,\$vf7y'
-.*: Error: Illegal operands `vmaxy\.yzw \$vf31yzw,\$vf31yw,\$vf31y'
-.*: Error: Illegal operands `vmaxy\.z \$vf0z,\$vf0z,\$vf0z'
-.*: Error: Illegal operands `vmaxy\.z \$vf0z,\$vf0y,\$vf31y'
-.*: Error: Illegal operands `vmaxy\.z \$vf0y,\$vf31z,\$vf0y'
-.*: Error: Illegal operands `vmaxz\.xw \$vf31xw,\$vf31xw,\$vf31xw'
-.*: Error: Illegal operands `vmaxz\.xy \$vf0xy,\$vf0xy,\$vf0xy'
-.*: Error: Illegal operands `vmaxz\.xyw \$vf0xyw,\$vf0xyw,\$vf0xyw'
-.*: Error: Illegal operands `vmaxz\.xyz \$vf1xyz,\$vf2xyz,\$vf3xyz'
-.*: Error: Illegal operands `vmaxz\.xyz \$vf31xyz,\$vf0z,\$vf0z'
-.*: Error: Illegal operands `vmaxz\.xyz \$vf31z,\$vf15xyz,\$vf7z'
-.*: Error: Illegal operands `vmaxz\.xyz \$vf31z,\$vf31z,\$vf31z'
-.*: Error: Illegal operands `vmaxz\.xyzw \$vf0xyzw,\$vf0xyzw,\$vf0xyzw'
-.*: Error: Illegal operands `vmaxz\.xyzw \$vf0xyzw,\$vf0z,\$vf31z'
-.*: Error: Illegal operands `vmaxz\.xyzw \$vf0z,\$vf31z,\$vf0z'
-.*: Error: Illegal operands `vmaxz\.xyzw \$vf1xyzw,\$vf2xyzw,\$vfz'
-.*: Error: Illegal operands `vmaxz\.xyzw \$vf31xyzw,\$vf0xyzw,\$vf0xyzw'
-.*: Error: Illegal operands `vmaxz\.xz \$vf0xz,\$vf0xz,\$vf0xz'
-.*: Error: Illegal operands `vmaxz\.y \$vf31y,\$vf15z,\$vf7z'
-.*: Error: Illegal operands `vmaxz\.y \$vf31y,\$vf31y,\$vf31y'
-.*: Error: Illegal operands `vmaxz\.yw \$vf0yw,\$vf0yw,\$vf0yw'
-.*: Error: Illegal operands `vmaxz\.yzw \$vf0yzw,\$vf0yzw,\$vf31yzw'
-.*: Error: Illegal operands `vmaxz\.yzw \$vf0yzw,\$vf31z,\$vf0z'
-.*: Error: Illegal operands `vmaxz\.yzw \$vf1z,\$vf2yzw,\$vf3z'
-.*: Error: Illegal operands `vmaxz\.yzw \$vf31z,\$vf0z,\$vf0z'
-.*: Error: Illegal operands `vmaxz\.z \$vf31z,\$vf31z,\$vf31x'
-.*: Error: Illegal operands `vmfir\.w \$vf0w,\$vi0w'
-.*: Error: Illegal operands `vmfir\.w \$vf0,\$vi31w'
-.*: Error: Illegal operands `vmfir\.x \$vf0x,\$vi0x'
-.*: Error: Illegal operands `vmfir\.x \$vf0,\$vi31x'
-.*: Error: Illegal operands `vmfir\.xw \$vf0xw,\$vi31xw'
-.*: Error: Illegal operands `vmfir\.xy \$vf1xy,\$vi2xy'
-.*: Error: Illegal operands `vmfir\.xy \$vf31,\$vi0xy'
-.*: Error: Illegal operands `vmfir\.xyw \$vf0xyw,\$vi31xyw'
-.*: Error: Illegal operands `vmfir\.xyw \$vf31xyw,\$vi0x'
-.*: Error: Illegal operands `vmfir\.xyz \$vf0xyz,\$vi0xyz'
-.*: Error: Illegal operands `vmfir\.xyzw \$vf1xyzw,\$vi2xyzw'
-.*: Error: Illegal operands `vmfir\.xz \$vf0xz,\$vi31xz'
-.*: Error: Illegal operands `vmfir\.xzw \$vf0xzw,\$vi31xzw'
-.*: Error: Illegal operands `vmfir\.y \$vf0y,\$vi0y'
-.*: Error: Illegal operands `vmfir\.yw \$vf0yw,\$vi0yw'
-.*: Error: Illegal operands `vmfir\.yz \$vf0yz,\$vi31yz'
-.*: Error: Illegal operands `vmfir\.yzw \$vf0yzw,\$vi0yzw'
-.*: Error: Illegal operands `vmfir\.z \$vf0z,\$vi0z'
-.*: Error: Illegal operands `vmfir\.z \$0z,\$vi31'
-.*: Error: Illegal operands `vmfir\.zw \$vf0zw,\$vi0zw'
-.*: Error: Illegal operands `vminii\.w \$vf0w,\$vf0w,\$Iw'
-.*: Error: Illegal operands `vminii\.w \$vf0w,\$vf31x,\$I'
-.*: Error: Illegal operands `vminii\.w \$vf1x,\$vf2w,\$I'
-.*: Error: Illegal operands `vminii\.xw \$vf0xw,\$vf31xw,\$Ixw'
-.*: Error: Illegal operands `vminii\.xw \$vf1xw,\$vf2w,\$I'
-.*: Error: Illegal operands `vminii\.xw \$vf31x,\$vf0xw,\$I'
-.*: Error: Illegal operands `vminii\.xyw \$vf31xw,\$vf0xyw,\$I'
-.*: Error: Illegal operands `vminii\.xyz \$vf0xy,\$vf0xyz,\$I'
-.*: Error: Unrecognized opcode `minii\.xz \$vf31z,\$vf15xz,\$I'
-.*: Error: Illegal operands `vminii\.xz \$vf31xz,\$vf31x,\$I'
-.*: Error: Illegal operands `vminii\.xzw \$vf0xzw,\$vf0xw,\$I'
-.*: Error: Illegal operands `vminii\.xzw \$vf0zw,\$vf31xzw,\$I'
-.*: Error: Illegal operands `vminii\.xzw \$vf1xyzw,\$vf2xzw,\$I'
-.*: Error: Illegal operands `vminii\.xzw \$vf31xzw,\$vf0xyzw,\$I'
-.*: Error: Illegal operands `vminii\.yw \$vf31yw,\$vf31yw,\$R'
-.*: Error: Illegal operands `vminii\.yz \$vf0yz,\$vf0yz,\$Q'
-.*: Error: Illegal operands `vminii\.yz \$vf0yz,\$vf31yz,\$ACC'
-.*: Error: Illegal operands `vminii\.yzw \$vf31yzw,\$vf0yzw,\$R'
-.*: Error: Illegal operands `vminii\.yzw \$vf31yzw,\$vf15yzw,\$ACC'
-.*: Error: Illegal operands `vminii\.yzw \$vf31yzw,\$vf31yzw,\$Q'
-.*: Error: Illegal operands `vmini\.w \$vf0w,\$vf0w,\$vf0x'
-.*: Error: Illegal operands `vminiw\.w \$vf31w,\$vf31w,\$vf31x'
-.*: Error: Illegal operands `vminiw\.x \$vf0x,\$vf0x,\$vf0x'
-.*: Error: Illegal operands `vminiw\.x \$vf0x,\$vf0w,\$vf31w'
-.*: Error: Illegal operands `vminiw\.x \$vf0w,\$vf31x,\$vf0w'
-.*: Error: Illegal operands `vminiw\.x \$vf1w,\$vf2w,\$vf3w'
-.*: Error: Illegal operands `vminiw\.xw \$vf0xw,\$vf31xw,\$vf0xw'
-.*: Error: Illegal operands `vminiw\.xw \$vf1w,\$vf2w,\$vf3w'
-.*: Error: Illegal operands `vminiw\.xyzw \$vf0xyzw,\$vf0xyzw,\$vf0xyzw'
-.*: Error: Illegal operands `vminiw\.xyzw \$vf0xyzw,\$vf0xxyzw,\$vf31w'
-.*: Error: Illegal operands `vminiw\.xyzw \$vf0xyzw,\$vf31xyzw,\$vf0xyzw'
-.*: Error: Illegal operands `vminiw\.xyzw \$vf1xyzw,\$vf2xyzw,\$vf3ww'
-.*: Error: Illegal operands `vminiw\.xz \$vf31xz,\$vf0xz,\$vf0xz'
-.*: Error: Illegal operands `vminiw\.yw \$vf0yw,\$vf0yw,\$vf0yw'
-.*: Error: Illegal operands `vminiw\.yz \$vf31yz,\$vf0yz,\$vf0yz'
-.*: Error: Illegal operands `vminiw\.z \$vf31z,\$vf0z,\$vf0z'
-.*: Error: Illegal operands `vminiw\.z \$vf31z,\$vf15w,\$vf7w'
-.*: Error: Illegal operands `vminiw\.z \$vf31w,\$vf31z,\$vf31w'
-.*: Error: Illegal operands `vminix\.xw \$vf0xw,\$vf31xw,\$vf0xw'
-.*: Error: Illegal operands `vminix\.xyw \$vf0xyw,\$vf0xyw,\$vf0xyw'
-.*: Error: Illegal operands `vminix\.xyzw \$vf0xyzw,\$vf31xyzw,\$vf0xyzw'
-.*: Error: Illegal operands `vminix\.yw \$vf31yw,\$vf31yw,\$vf31yw'
-.*: Error: Illegal operands `vminix\.zw \$vf31zw,\$vf31zw,\$vf31zw'
-.*: Error: Illegal operands `vmini\.y \$vf0y,\$vf0x,\$vf0y'
-.*: Error: Illegal operands `vminiy\.w \$vf0w,\$vf31w,\$vf0w'
-.*: Error: Illegal operands `vminiy\.x \$vf31x,\$vf15x,\$vf7x'
-.*: Error: Illegal operands `vminiy\.x \$vf31x,\$vf31y,\$vf31y'
-.*: Error: Illegal operands `vminiy\.xw \$vf0y,\$vf0xw,\$vf0y'
-.*: Error: Illegal operands `vminiy\.xw \$vf0xw,\$vf0y,\$vf31y'
-.*: Error: Illegal operands `vminiy\.xw \$vf0xw,\$vf31xw,\$vf0xw'
-.*: Error: Illegal operands `vminiy\.xyz \$vf31xyz,\$vf31xyz,\$vf31xyz'
-.*: Error: Illegal operands `vminiy\.xyzw \$vf0xyzw,\$vf0y,\$vf0y'
-.*: Error: Illegal operands `vminiy\.xyzw \$vf0y,\$vf0xyzw,\$vf31y'
-.*: Error: Illegal operands `vminiy\.xyzw \$vf0xyzw,\$vf31xyzw,\$vf0xyzw'
-.*: Error: Illegal operands `vminiy\.yw \$vf1yw,\$vf2yw,\$vf3yw'
-.*: Error: Illegal operands `vminiy\.zw \$vf1zw,\$vf2zw,\$vf3zw'
-.*: Error: Illegal operands `vmini\.z \$vf0z,\$vf0z,\$vf0x'
-.*: Error: Illegal operands `vminiz\.x \$vf0x,\$vf31x,\$vf0x'
-.*: Error: Illegal operands `vminiz\.xw \$vf0xw,\$vf31xw,\$vf0xw'
-.*: Error: Illegal operands `vminiz\.xyw \$vf31xyw,\$vf0xyw,\$vf0xyw'
-.*: Error: Illegal operands `vminiz\.xyw \$vf31xyw,\$vf15z,\$vf7z'
-.*: Error: Illegal operands `vmove\.xyw \$vf0xyw,\$vf0xw'
-.*: Error: Illegal operands `vmove\.y \$vf0y,\$vf31x'
-.*: Error: Illegal operands `vmr32\.xw \$vf0xw,\$vf0w'
-.*: Error: Illegal operands `vmr32\.xw \$vf0w,\$vf31xw'
-.*: Error: Illegal operands `vmsubai\.xy \$ACCxy,\$vf31xy,\$Q'
-.*: Error: Illegal operands `vmsubai\.xyw \$ACCxyw,\$vf0xyw,\$0'
-.*: Error: Illegal operands `vmsubai\.xyw \$ACCxyw,\$vf1xyw,\$ACC'
-.*: Error: Illegal operands `vmsubai\.xyw \$ACCxyw,\$vf31xw,\$I'
-.*: Error: Illegal operands `vmsubaq\.y \$ACCy,\$vf31y,\$Qy'
-.*: Error: Illegal operands `vmsubaq\.yw \$ACCw,\$vf0yw,\$Q'
-.*: Error: Illegal operands `vmsubaq\.yw \$ACCwy,\$vf1yw,\$Q'
-.*: Error: Illegal operands `vmsubaw\.x \$ACCx,\$vf31x,\$vf0x'
-.*: Error: Illegal operands `vmsubaw\.x \$ACCx,\$vf31w,\$vf15w'
-.*: Error: Illegal operands `vmsubaw\.x \$ACCw,\$vf31x,\$vf31w'
-.*: Error: Illegal operands `vmsubaw\.xw \$ACCw,\$vf0xw,\$vf0w'
-.*: Error: Illegal operands `vmsubaw\.xw \$ACCxw,\$vf0w,\$vf31w'
-.*: Error: Illegal operands `vmsubaw\.xw \$ACCxw,\$vf1xw,\$vf2xw'
-.*: Error: Illegal operands `vmsubax\.yzw \$ACCyzw,\$vf0yzw,\$vf31yzw'
-.*: Error: Illegal operands `vmsubax\.z \$ACCz,\$vf31z,\$vf0z'
-.*: Error: Illegal operands `vmsuba\.y \$ACCy,\$vf31y,\$vf15a'
-.*: Error: Illegal operands `vmsuba\.yw \$ACCyw,\$vf31yw,\$vf0w'
-.*: Error: Illegal operands `vmsubay\.x \$ACCx,\$vf31x,\$vf15x'
-.*: Error: Illegal operands `vmsubay\.x \$ACCx,\$vf31y,\$vf31y'
-.*: Error: Illegal operands `vmsubay\.xw \$ACCxw,\$vf0xw,\$vf0xw'
-.*: Error: Illegal operands `vmsubaz\.xy \$ACCxy,\$vf0xy,\$vf31xy'
-.*: Error: Illegal operands `vmsubaz\.yw \$ACCyw,\$vf31yw,\$vf0yw'
-.*: Error: Illegal operands `vmsubi\.xyzw \$vf31xyzw,\$vf0xyzw,\$R'
-.*: Error: Illegal operands `vmsubw\.xyw \$vf0xyw,\$vf0xyw,\$vf0xyw'
-.*: Error: Illegal operands `vmsubw\.xzw \$vf0xzw,\$vf0xzw,\$vf31xzw'
-.*: Error: Illegal operands `vmsubw\.y \$vf31y,\$vf31y,\$vf31y'
-.*: Error: Illegal operands `vmsubw\.yw \$vf0yw,\$vf0y,\$vf0w'
-.*: Error: Illegal operands `vmsubw\.yw \$vf0w,\$vf0yw,\$vf31w'
-.*: Error: Illegal operands `vmsubw\.zw \$vf0zw,\$vf0zw,\$vf31zw'
-.*: Error: Illegal operands `vmsubx\.w \$vf0w,\$vf0w,\$vf0w'
-.*: Error: Illegal operands `vmsub\.y \$vf31y,\$vf15y,\$vf7w'
-.*: Error: Illegal operands `vmsuby\.x \$vf0x,\$vf0x,\$vf31x'
-.*: Error: Illegal operands `vmsuby\.x \$vf0x,\$vf31y,\$vf0y'
-.*: Error: Illegal operands `vmsubz\.x \$vf0x,\$vf31x,\$vf0x'
-.*: Error: Illegal operands `vmulai\.xyz \$ACCxyz,\$vf1xz,\$I'
-.*: Error: Illegal operands `vmulaq\.zw \$ACCzw,\$vf31zw,\$I'
-.*: Error: Illegal operands `vmula\.w \$ACCw,\$vf31w,\$vf0x'
-.*: Error: Illegal operands `vmulax\.xz \$ACCxz,\$vf0xz,\$vf31xz'
-.*: Error: Illegal operands `vmulax\.xz \$ACCxz,\$vf1x,\$vf2x'
-.*: Error: Illegal operands `vmulax\.xz \$ACCx,\$vf31xz,\$vf0x'
-.*: Error: Illegal operands `vmulay\.yzw \$ACCyzw,\$vf0yzw,\$vf31yzw'
-.*: Error: Illegal operands `vmulaz\.w \$ACCw,\$vf0w,\$vf31w'
-.*: Error: Unrecognized opcode `mulaz\.xy \$ACCz,\$vf31xy,\$vf0z'
-.*: Error: Illegal operands `vmulaz\.xy \$ACCxy,\$vf31z,\$vf15z'
-.*: Error: Illegal operands `vmulaz\.z \$ACCz,\$vf1z,\$vf2x'
-.*: Error: Illegal operands `vmuli\.x \$vf31x,\$vf15x,\$ACC'
-.*: Error: Illegal operands `vmulq\.x \$vf0x,\$vf31x,\$0'
-.*: Error: Illegal operands `vmulq\.x \$vf1x,\$vf2x,\$ACC'
-.*: Error: Illegal operands `vmulq\.x \$vf31x,\$vf0x,\$R'
-.*: Error: Illegal operands `vmulq\.x \$vf31x,\$vf15x,\$I'
-.*: Error: Illegal operands `vmulw\.z \$vf31z,\$vf15z,\$vf7z'
-.*: Error: Illegal operands `vmulw\.z \$vf31z,\$vf31w,\$vf31w'
-.*: Error: Illegal operands `vmulw\.zw \$vf0zw,\$vf0zw,\$vf0zw'
-.*: Error: Illegal operands `vmuly\.xyzw \$vf0xyzw,\$vf0y,\$vf31y'
-.*: Error: Illegal operands `vmuly\.xyzw \$vf0xyzw,\$vf31xyzw,\$vf0xyzw'
-.*: Error: Illegal operands `vmuly\.xyzw \$vf1xyzw,\$vf2y,\$vf3y'
-.*: Error: Illegal operands `vmuly\.xyzw \$vf31y,\$vf0xyzw,\$vf0y'
-.*: Error: Illegal operands `vmulz\.y \$vf0y,\$vf31y,\$vf0y'
-.*: Error: Illegal operands `vmulz\.y \$vf1y,\$vf2z,\$vf3z'
-.*: Error: Illegal operands `vmulz\.y \$vf31z,\$vf0y,\$vf0z'
-.*: Error: Illegal operands `vmulz\.y \$vf31z,\$vf15z,\$vf7z'
-.*: Error: Illegal operands `vopmsub \$vf0x,\$vf0,\$vf31'
-.*: Error: Illegal operands `vopmsub \$vf0,\$vf31x,\$vf0'
-.*: Error: Illegal operands `vopmsub \$vf1,\$vf2,\$vf3x'
-.*: Error: Illegal operands `vopmsub \$ACC,\$vf0,\$vf0'
-.*: Error: Illegal operands `vopmsub \$vf31,\$R,\$vf7'
-.*: Error: Illegal operands `vopmsub \$vf31,\$vf31,\$I'
-.*: Error: Illegal operands `vopmsub\.xyz \$vf0xyz,\$vf0xyz,\$vf0xy'
-.*: Error: Illegal operands `vopmula \$0,\$vf0,\$vf0'
-.*: Error: Illegal operands `vopmula \$Q,\$vf0,\$vf31'
-.*: Error: Illegal operands `vopmula \$R,\$vf1,\$vf2'
-.*: Error: Illegal operands `vopmula \$I,\$vf31,\$vf0'
-.*: Error: Illegal operands `vopmula \$ACCx,\$vf31,\$vf15'
-.*: Error: Illegal operands `vopmula \$ACCxyzw,\$vf31,\$vf31'
-.*: Error: Illegal operands `vopmula\.xyz \$ACCxyzw,\$vf0xyz,\$vf0xyz'
-.*: Error: Unrecognized opcode `vopmula\.xyzw \$ACCxyzw,\$vf0xyzw,\$vf31xyzw'
-.*: Error: Illegal operands `vrget\.w \$vf0w,\$0'
-.*: Error: Illegal operands `vrget\.w \$vf1w,\$I'
-.*: Error: Illegal operands `vrget\.w \$vf31w,\$Q'
-.*: Error: Illegal operands `vrget\.x \$vf0x,\$ACC'
-.*: Error: Illegal operands `vrget\.x \$vf1y,\$R'
-.*: Error: Illegal operands `vrget\.xy \$vf31x,\$R'
-.*: Error: Illegal operands `vrget\.xyw \$vf0xw,\$R'
-.*: Error: Illegal operands `vrget\.xyw \$vf1yw,\$R'
-.*: Error: Illegal operands `vrget\.xyw \$vf31xy,\$R'
-.*: Error: Illegal operands `vrget\.xyz \$vf0xy,\$R'
-.*: Error: Illegal operands `vrget\.xyz \$vf1xyzw,\$R'
-.*: Error: Illegal operands `vrget\.xyz \$vf31xyzw,\$R'
-.*: Error: Illegal operands `vrget\.xyzw \$vf0xyz,\$R'
-.*: Error: Illegal operands `vrget\.xyzw \$vf1xzw,\$R'
-.*: Error: Illegal operands `vrget\.xyzw \$vf31yzw,\$R'
-.*: Error: Illegal operands `vrget\.xz \$vf0xz,\$0'
-.*: Error: Illegal operands `vrget\.xz \$vf1z,\$R'
-.*: Error: Illegal operands `vrget\.xzw \$vf0xw,\$R'
-.*: Error: Illegal operands `vrget\.y \$vf0z,\$R'
-.*: Error: Illegal operands `vrget\.y \$vf1y,\$I'
-.*: Error: Illegal operands `vrget\.z \$vf31z,\$Q'
-.*: Error: Illegal operands `vrget\.zw \$vf0zw,\$ACC'
-.*: Error: Illegal operands `vrnext\.xyzw \$vf0xyz,\$R'
-.*: Error: Illegal operands `vrnext\.xyzw \$vf1xyzw,\$0'
-.*: Error: Illegal operands `vrnext\.xyzw \$vf31xyzw,\$Rxyzw'
-.*: Error: Illegal operands `vrnext\.yz \$vf31yz,\$Ryz'
-.*: Error: Illegal operands `vrnext\.z \$vf0z,\$Rz'
-.*: Error: Illegal operands `vrsqrt \$Q,\$vf0xz,\$vf31y'
-.*: Error: Illegal operands `vrsqrt \$Q,\$vf1z,\$vf2xz'
-.*: Error: Illegal operands `vrsqrt \$Q,\$vf31yx,\$vf15w'
-.*: Error: Illegal operands `vrsqrt \$Qx,\$vf31x,\$vf31y'
-.*: Error: Illegal operands `vrsqrt \$0,\$vf31y,\$vf0w'
-.*: Error: Illegal operands `vrxor \$0,\$vf0w'
-.*: Error: Illegal operands `vrxor \$R,\$vf0xy'
-.*: Error: Illegal operands `vrxor \$R,\$vf0zw'
-.*: Error: Illegal operands `vrxor \$R,\$vf1yz'
-.*: Error: Illegal operands `vrxor \$ACC,\$vf31x'
-.*: Error: Illegal operands `vrxor \$Q,\$vf31y'
-.*: Error: Illegal operands `vsqd\.w \$vf0,\(\-\-\$vi0w\)'
-.*: Error: Illegal operands `vsqd\.w \$vf0,\(\-\-\$vi31w\)'
-.*: Error: Illegal operands `vsqd\.x \$vf1,\(\-\-\$vi2x\)'
-.*: Error: Illegal operands `vsqd\.xw \$vf0,\(\-\-\$vi0xw\)'
-.*: Error: Illegal operands `vsqd\.xy \$vf0,\(\-\-\$vi0xy\)'
-.*: Error: Illegal operands `vsqd\.xyw \$vf0,\(\-\-\$vi0xyw\)'
-.*: Error: Illegal operands `vsqd\.xyz \$vf0,\(\-\-\$vi31xyz\)'
-.*: Error: Illegal operands `vsqd\.xyzw \$vf0,\(\-\-\$vi0xyzw\)'
-.*: Error: Illegal operands `vsqd\.xz \$vf0,\(\-\-\$vi31xz\)'
-.*: Error: Illegal operands `vsqd\.xzw \$vf0,\(\-\-\$vi0xzw\)'
-.*: Error: Illegal operands `vsqd\.y \$vf0,\(\-\-\$vi0y\)'
-.*: Error: Illegal operands `vsqd\.yw \$vf0,\(\-\-\$vi31yw\)'
-.*: Error: Illegal operands `vsqd\.yz \$vf0,\(\-\-\$vi31yz\)'
-.*: Error: Illegal operands `vsqd\.yzw \$vf0,\(\-\-\$vi31yzw\)'
-.*: Error: Illegal operands `vsqd\.yzw \$vf0yzw,\(\-\-\$vi0x\)'
-.*: Error: Illegal operands `vsqd\.z \$vf1,\(\-\-\$vi2z\)'
-.*: Error: Illegal operands `vsqd\.zw \$vf1,\(\-\-\$vi2zw\)'
-.*: Error: Illegal operands `vsqi\.w \$vf0,\(\$vi0w\+\+\)'
-.*: Error: Illegal operands `vsqi\.x \$vf0x,\(\$vi0x\+\+\)'
-.*: Error: Illegal operands `vsqi\.xw \$vf0xw,\(\$vi0xw\+\+\)'
-.*: Error: Illegal operands `vsqi\.xw \$vf1x,\(\$vi2\+\+\)'
-.*: Error: Illegal operands `vsqi\.xw \$vf31w,\(\$vi0\+\+\)'
-.*: Error: Illegal operands `vsqi\.xy \$vf0,\(\$vi31xy\+\+\)'
-.*: Error: Illegal operands `vsqi\.xyw \$vf0x,\(\$vi0\+\+\)'
-.*: Error: Illegal operands `vsqi\.xyw \$vf0,\(\$vi31xyw\+\+\)'
-.*: Error: Illegal operands `vsqi\.xyz \$vf0xyz,\(\$vi0xyz\+\+\)'
-.*: Error: Illegal operands `vsqi\.xyzw \$vf0,\(\$vi31xyzw\+\+\)'
-.*: Error: Illegal operands `vsqi\.xz \$vf0xz,\(\$vi0xz\+\+\)'
-.*: Error: Illegal operands `vsqi\.xzw \$vf0xzw,\(\$vi0xzw\+\+\)'
-.*: Error: Illegal operands `vsqi\.y \$vf1,\(\$vi2y\+\+\)'
-.*: Error: Illegal operands `vsqi\.yw \$vf0yw,\(\$vi0yw\+\+\)'
-.*: Error: Illegal operands `vsqi\.yz \$vf1,\(\$vi2yz\+\+\)'
-.*: Error: Illegal operands `vsqi\.yzw \$vf0yzw,\(\$vi0yzw\+\+\)'
-.*: Error: Illegal operands `vsqi\.z \$vf0,\(\$vi31z\+\+\)'
-.*: Error: Illegal operands `vsqi\.zw \$vf0zw,\(\$vi0zw\+\+\)'
-.*: Error: Illegal operands `vsqrt \$Q,\$vf1zw'
-.*: Error: Illegal operands `vsqrt \$Q,\$vf31xw'
-.*: Error: Illegal operands `vsqrt \$Q,\$vf31xy'
-.*: Error: Illegal operands `vsubai\.w \$ACCw,\$vf0w,\$0'
-.*: Error: Illegal operands `vsubai\.w \$ACCw,\$vf1x,\$I'
-.*: Error: Illegal operands `vsubai\.w \$ACCx,\$vf31w,\$I'
-.*: Error: Illegal operands `vsubai\.x \$ACCw,\$vf31x,\$I'
-.*: Error: Illegal operands `vsubai\.xw \$ACCw,\$vf0xw,\$I'
-.*: Error: Illegal operands `vsubai\.xw \$ACCxw,\$vf1x,\$I'
-.*: Error: Illegal operands `vsubai\.xw \$ACCxw,\$vf31xw,\$0'
-.*: Error: Illegal operands `vsubai\.xy \$ACCxy,\$vf0y,\$I'
-.*: Error: Illegal operands `vsubai\.xy \$ACCxy,\$vf1x,\$I'
-.*: Error: Illegal operands `vsubai\.xy \$ACCxy,\$vf311xy,\$I'
-.*: Error: Illegal operands `vsubai\.xyz \$ACCxyz,\$vf1yz,\$I'
-.*: Error: Illegal operands `vsubai\.xyz \$ACCxyz,\$vf31xyz,\$ACC'
-.*: Error: Illegal operands `vsubai\.xyzw \$ACCxyzw,\$vf0xyzw,\$R'
-.*: Error: Illegal operands `vsubai\.xyzw \$ACCxyzw,\$vf1xyzw,\$Q'
-.*: Error: Illegal operands `vsubai\.xz \$ACCxz,\$vf1z,\$I'
-.*: Error: Illegal operands `vsubai\.y \$ACCy,\$vf31,\$3'
-.*: Error: Illegal operands `vsubai\.yw \$ACCyw,\$vf0yw,\$Iyw'
-.*: Error: Illegal operands `vsubai\.zw \$ACCzw,\$vf1zw,\$Izw'
-.*: Error: Illegal operands `vsubai\.zw \$ACCzw,\$vf31w,\$I'
-.*: Error: Illegal operands `vsubaq\.w \$ACCw,\$Q,\$Q'
-.*: Error: Illegal operands `vsubaq\.w \$ACCw,\$I,\$Q'
-.*: Error: Illegal operands `vsubaq\.xyw \$ACCxyw,\$vf0xw,\$Q'
-.*: Error: Illegal operands `vsubaq\.xyzw \$ACCxyzw,\$vf0xyz,\$Q'
-.*: Error: Illegal operands `vsubaq\.xzw \$ACCxzw,\$vf1xw,\$Q'
-.*: Error: Illegal operands `vsubaq\.yw \$ACCyw,\$vf31y,\$Q'
-.*: Error: Illegal operands `vsubaq\.yz \$ACCyz,\$vf0yz,\$ACC'
-.*: Error: Illegal operands `vsubaq\.yz \$ACCyz,\$vf1yz,\$I'
-.*: Error: Illegal operands `vsubax\.w \$ACCw,\$vf0w,\$vf0w'
-.*: Error: Illegal operands `vsubax\.w \$ACCw,\$vf0x,\$vf31x'
-.*: Error: Illegal operands `vsubax\.w \$ACCx,\$vf1w,\$vf2x'
-.*: Error: Illegal operands `vsubax\.w \$ACCx,\$vf31x,\$vf0x'
-.*: Error: Illegal operands `vsubax\.xyzw \$ACCxyzw,\$vf31xyzw,\$vf0xyzw'
-.*: Error: Illegal operands `vsubax\.xzw \$ACCxzw,\$vf1xzw,\$vf2xzw'
-.*: Error: Illegal operands `vsubax\.y \$ACCy,\$vf31y,\$vf0y'
-.*: Error: Illegal operands `vsubax\.yw \$ACCyw,\$vf0yw,\$vf0yw'
-.*: Error: Illegal operands `vsubay\.yw \$ACCyw,\$vf0yw,\$vf31yw'
-.*: Error: Illegal operands `vsubay\.yzw \$ACCyzw,\$vf0yzw,\$vf31yzw'
-.*: Error: Illegal operands `vsubay\.z \$ACCz,\$vf0z,\$vf31z'
-.*: Error: Illegal operands `vsubay\.zw \$ACCzw,\$vf0zw,\$vf0zw'
-.*: Error: Illegal operands `vsubaz\.w \$ACCw,\$vf31w,\$vf15w'
-.*: Error: Illegal operands `vsubaz\.x \$ACCx,\$vf0x,\$vf31x'
-.*: Error: Illegal operands `vsubaz\.xy \$ACCxy,\$vf0xy,\$vf0xy'
-.*: Error: Illegal operands `vsubaz\.xz \$ACCxz,\$vf31xz,\$vf15xz'
-.*: Error: Illegal operands `vsubaz\.xz \$ACCxz,\$vf31z,\$vf31z'
-.*: Error: Illegal operands `vsubaz\.xzw \$ACCxw,\$vf0xzw,\$vf0z'
-.*: Error: Illegal operands `vsubaz\.xzw \$ACCz,\$vf0xzw,\$vf31z'
-.*: Error: Illegal operands `vsubaz\.xzw \$ACCxzw,\$vf1z,\$vf2z'
-.*: Error: Illegal operands `vsubaz\.yw \$ACCyw,\$vf1yw,\$vf2yw'
-.*: Error: Illegal operands `vsubi\.w \$vf31w,\$vf15w,\$0'
-.*: Error: Illegal operands `vsubi\.w \$vf31w,\$vf31w,\$R'
-.*: Error: Illegal operands `vsubi\.x \$vf0x,\$vf0y,\$I'
-.*: Error: Illegal operands `vsubi\.x \$vf0x,\$vf31x,\$Ix'
-.*: Error: Illegal operands `vsubi\.xy \$vf0xy,\$vf31y,\$I'
-.*: Error: Illegal operands `vsubi\.xy \$vf1x,\$vf2xy,\$I'
-.*: Error: Illegal operands `vsubq\.x \$vf31x,\$vf15x,\$Qx'
-.*: Error: Illegal operands `vsubq\.x \$vf31x,\$vf31y,\$Q'
-.*: Error: Illegal operands `vsubq\.xw \$vf0xw,\$vf0xw,\$0'
-.*: Error: Illegal operands `vsubq\.xw \$vf0xw,\$vf31xw,\$2'
-.*: Error: Illegal operands `vsubq\.xyzw \$vf1yzw,\$vf2xyzw,\$Q'
-.*: Error: Illegal operands `vsubq\.yw \$vf31w,\$vf15yw,\$Q'
-.*: Error: Illegal operands `vsubq\.yw \$vf31yw,\$vf31y,\$Q'
-.*: Error: Illegal operands `vsubx\.xyw \$vf0xyw,\$vf31xyw,\$vf0xyw'
-.*: Error: Illegal operands `vsubx\.xzw \$vf1xzw,\$vf2xzw,\$vf3xzw'
-.*: Error: Illegal operands `vsuby\.xw \$vf0xw,\$vf0xw,\$vf0xw'
-.*: Error: Illegal operands `vsuby\.zw \$vf0zw,\$vf0zw,\$vf0zw'
-.*: Error: Illegal operands `vsub\.z \$vf0z,\$vf31z,\$vf0x'
-.*: Error: Illegal operands `vsubz\.xyw \$vf31yw,\$vf15xyw,\$vf7z'
-.*: Error: Illegal operands `vsubz\.xyw \$vf31xyw,\$vf31yw,\$vf31z'
-.*: Error: Illegal operands `vsubz\.xyz \$vf0xyz,\$vf0xyz,\$vf0x'
-.*: Error: Illegal operands `vwaitq \$vf0x'
+.*: Error: invalid operands `vlqi\.xy \$vf1,\(\$2xy\+\+\)'
+.*: Error: invalid operands `vlqi\.xyw \$vf0,\(\$vi0xyw\+\+\)'
+.*: Error: invalid operands `vlqi\.xyz \$vf0,\(\$vi0xyz\+\+\)'
+.*: Error: invalid operands `vlqi\.xyzw \$vf0,\(\$vi0xyzw\+\+\)'
+.*: Error: invalid operands `vlqi\.xz \$vf0,\(\$vi0xz\+\+\)'
+.*: Error: invalid operands `vlqi\.xzw \$vf0,\(\$vi0xzw\+\+\)'
+.*: Error: invalid operands `vlqi\.y \$vf0,\(\$vi0y\+\+\)'
+.*: Error: invalid operands `vlqi\.yw \$vf0,\(\$vi0yw\+\+\)'
+.*: Error: invalid operands `vlqi\.yz \$vf0yz,\(\$vi0yz\+\+\)'
+.*: Error: invalid operands `vlqi\.yzw \$vf0,\(\$vi0yzw\+\+\)'
+.*: Error: invalid operands `vlqi\.z \$vf0,\(\$vi0z\+\+\)'
+.*: Error: invalid operands `vlqi\.zw \$vf0,\(\$vi0zw\+\+\)'
+.*: Error: invalid operands `vmaddai\.w \$ACCw,\$vf0w,\$R'
+.*: Error: invalid operands `vmaddai\.w \$ACCw,\$vf1w,\$Iw'
+.*: Error: invalid operands `vmaddai\.w \$ACCw,\$vf31w,\$Q'
+.*: Error: invalid operands `vmaddai\.x \$ACCx,\$vf0x,\$ACC'
+.*: Error: invalid operands `vmaddai\.x \$ACCy,\$vf1w,\$I'
+.*: Error: invalid operands `vmaddai\.x \$ACCxy,\$vf31x,\$I'
+.*: Error: invalid operands `vmaddai\.xw \$ACCxw,\$vf0xyw,\$I'
+.*: Error: invalid operands `vmaddai\.xy \$ACCxy,\$vf0xyw,\$I'
+.*: Error: invalid operands `vmaddai\.xy \$ACCxy,\$vf1xyz,\$I'
+.*: Error: invalid operands `vmaddai\.xy \$ACCxyz,\$vf31xy,\$I'
+.*: Error: invalid operands `vmaddai\.xyw \$ACCxy,\$vf0xyw,\$I'
+.*: Error: invalid operands `vmaddai\.yw \$ACCyw,\$vf1w,\$I'
+.*: Error: invalid operands `vmaddai\.yw \$ACCyw,\$vf31y,\$I'
+.*: Error: invalid operands `vmaddai\.yz \$ACCyz,\$vf0yz,\$R'
+.*: Error: invalid operands `vmaddaq\.xyz \$ACCxyz,\$vf0xyz,\$R'
+.*: Error: invalid operands `vmaddaq\.xyz \$ACCxyz,\$vf1xyz,\$Qxyz'
+.*: Error: invalid operands `vmaddaq\.xzw \$ACCxzw,\$vf31xzw,\$Qxzw'
+.*: Error: invalid operands `vmaddaq\.y \$ACCy,\$vf0y,\$R'
+.*: Error: invalid operands `vmaddaq\.y \$ACCy,\$vf1y,\$ACCy'
+.*: Error: invalid operands `vmaddaq\.y \$ACCy,\$vf31y,\$ACC'
+.*: Error: invalid operands `vmaddaw\.z \$ACCz,\$vf31z,\$vf0x'
+.*: Error: invalid operands `vmaddaw\.zw \$ACCzw,\$vf31zw,\$vf15y'
+.*: Error: invalid operands `vmaddax\.w \$ACCw,\$vf1w,\$vf2w'
+.*: Error: invalid operands `vmadda\.xw \$ACCxw,\$vf31xw,\$vf31wx'
+.*: Error: invalid operands `vmaddax\.xyz \$ACCxyz,\$vf0xyz,\$vf0xyz'
+.*: Error: invalid operands `vmaddax\.xyzw \$ACCxyzw,\$vf0xyzw,\$vf0xyzw'
+.*: Error: invalid operands `vmaddax\.xz \$ACCxz,\$vf0xz,\$vf31xz'
+.*: Error: invalid operands `vmaddax\.xzw \$ACCxzw,\$vf0xzw,\$vf0xzw'
+.*: Error: invalid operands `vmaddax\.z \$ACCz,\$vf31z,\$vf15z'
+.*: Error: invalid operands `vmaddax\.zw \$ACCzw,\$vf1zw,\$vf2zw'
+.*: Error: invalid operands `vmadday\.w \$ACCw,\$vf1w,\$vf2w'
+.*: Error: invalid operands `vmadday\.w \$ACCw,\$vf31y,\$vf0y'
+.*: Error: invalid operands `vmadday\.w \$ACCy,\$vf31w,\$vf15y'
+.*: Error: invalid operands `vmadday\.w \$ACCy,\$vf31y,\$vf31y'
+.*: Error: invalid operands `vmadday\.xyzw \$ACCxyzw,\$vf0xyzw,\$vf0xyzw'
+.*: Error: invalid operands `vmadday\.xyzw \$ACCxyzw,\$vf0y,\$vf31y'
+.*: Error: invalid operands `vmadday\.xyzw \$ACCy,\$vf1xyzw,\$vf2y'
+.*: Error: invalid operands `vmadday\.xyzw \$ACCy,\$vf31y,\$vf0y'
+.*: Error: invalid operands `vmaddi\.x \$vf0x,\$vf31x,\$Ix'
+.*: Error: invalid operands `vmaddi\.xw \$vf1xw,\$vf2xw,\$Ixw'
+.*: Error: invalid operands `vmaddi\.xy \$vf31xy,\$vf0xy,\$Ixy'
+.*: Error: invalid operands `vmaddi\.xyw \$vf0xyw,\$vf0xyw,\$Ixyw'
+.*: Error: invalid operands `vmaddi\.xyzw \$vf1xyzw,\$vf2xyzw,\$Ixyzw'
+.*: Error: invalid operands `vmaddi\.y \$vf0y,\$vf0y,\$Iy'
+.*: Error: invalid operands `vmaddi\.yw \$vf0yw,\$vf0yw,\$Iyw'
+.*: Error: invalid operands `vmaddi\.zw \$vf0zw,\$vf31zw,\$0'
+.*: Error: invalid operands `vmaddq\.w \$vf0w,\$vf0w,\$0'
+.*: Error: invalid operands `vmadd\.w \$vf0w,\$vf0w,\$vf0y'
+.*: Error: invalid operands `vmaddw\.xyz \$vf31xyz,\$vf15xyz'
+.*: Error: invalid operands `vmaddw\.xyzw \$vf0xyzw,\$vf31xyzw,\$vf0xyzw'
+.*: Error: invalid operands `vmaddx\.yw \$vf1yw,\$vf2yw,\$vf3yw'
+.*: Error: invalid operands `vmaddy\.xy \$vf31xy,\$vf15xy,\$vf7xy'
+.*: Error: invalid operands `vmadd\.z \$vf1z,\$vf2z,\$vf3x'
+.*: Error: invalid operands `vmadd\.z \$vf31z,\$vf0z,\$vf0w'
+.*: Error: invalid operands `vmaddz\.xyw \$vf0xyw,\$vf0xyw,\$vf31x'
+.*: Error: invalid operands `vmaddz\.xz \$vf0xz,\$vf31xz,\$vf0xz'
+.*: Error: invalid operands `vmaddz\.y \$vf31y,\$vf0y,\$vf0y'
+.*: Error: invalid operands `vmaxi\.w \$vf31w,\$vf15w,\$Q'
+.*: Error: invalid operands `vmaxi\.w \$vf31w,\$vf31w,\$0'
+.*: Error: invalid operands `vmax\.w \$vf31w,\$vf31w,\$vf31x'
+.*: Error: invalid operands `vmaxw\.w \$vf0w,\$vf0w,\$vf0x'
+.*: Error: invalid operands `vmaxw\.x \$vf0x,\$vf0x,\$vf0x'
+.*: Error: invalid operands `vmaxw\.x \$vf0w,\$vf0w,\$vf31w'
+.*: Error: invalid operands `vmaxw\.xw \$vf0xw,\$vf0xw,\$vf0xw'
+.*: Error: invalid operands `vmaxw\.xw \$vf0w,\$vf0w,\$vf31w'
+.*: Error: invalid operands `vmaxw\.xy \$vf0xy,\$vf31xy,\$vf0xy'
+.*: Error: invalid operands `vmaxw\.xy \$vf1xy,\$vf2w,\$vf3w'
+.*: Error: invalid operands `vmaxw\.xy \$vf31w,\$vf0xy,\$vf0w'
+.*: Error: invalid operands `vmax\.x \$vf0x,\$vf0x,\$vf31w'
+.*: Error: invalid operands `vmaxx\.w \$vf0w,\$vf0w,\$vf31w'
+.*: Error: invalid operands `vmaxx\.w \$vf0x,\$vf31x,\$vf0x'
+.*: Error: invalid operands `vmaxx\.w \$vf31w,\$vf0w,\$vf0w'
+.*: Error: invalid operands `vmaxx\.w \$vf31x,\$vf15x,\$vf7x'
+.*: Error: invalid operands `vmax\.xw \$vf31xw,\$vf15xw,\$vf7w'
+.*: Error: invalid operands `vmaxx\.x \$vf0x,\$vf0x,\$vf0w'
+.*: Error: invalid operands `vmaxx\.x \$vf31w,\$vf15x,\$vf7x'
+.*: Error: invalid operands `vmaxx\.x \$vf31x,\$vf31w,\$vf31x'
+.*: Error: invalid operands `vmaxx\.xw \$vf31xw,\$vf15xw,\$vf7xw'
+.*: Error: invalid operands `vmaxx\.xy \$vf0xy,\$vf31xy,\$vf0xy'
+.*: Error: invalid operands `vmaxx\.xyw \$vf0xyw,\$vf0xyw,\$vf0xyw'
+.*: Error: invalid operands `vmaxx\.xyz \$vf0xyz,\$vf0xyz,\$vf0xyz'
+.*: Error: invalid operands `vmaxx\.xyzw \$vf0xyzw,\$vf0xyzw,\$vf0xyzw'
+.*: Error: invalid operands `vmaxx\.xyzw \$vf0xyzw,\$vf0x,\$vf31x'
+.*: Error: invalid operands `vmaxx\.xyzw \$vf0x,\$vf31xyzw,\$vf0x'
+.*: Error: invalid operands `vmaxx\.xyzw \$vf1x,\$vf2x,\$vf3x'
+.*: Error: invalid operands `vmaxx\.xzw \$vf31xzw,\$vf15xzw,\$vf7xzw'
+.*: Error: invalid operands `vmaxx\.y \$vf0y,\$vf0y,\$vf0y'
+.*: Error: invalid operands `vmaxx\.y \$vf0y,\$vf0x,\$vf31x'
+.*: Error: invalid operands `vmaxx\.y \$vf0x,\$vf31y,\$vf0x'
+.*: Error: invalid operands `vmaxx\.yw \$vf1yw,\$vf2yw,\$vf3yw'
+.*: Error: invalid operands `vmaxx\.yz \$vf0yz,\$vf0yz,\$vf0yz'
+.*: Error: invalid operands `vmaxx\.yz \$vf0x,\$vf0x,\$vf31x'
+.*: Error: invalid operands `vmaxx\.z \$vf31z,\$vf0z,\$vf0z'
+.*: Error: invalid operands `vmaxx\.z \$vf31z,\$vf15x,\$vf7x'
+.*: Error: invalid operands `vmaxx\.z \$vf31x,\$vf31z,\$vf31x'
+.*: Error: invalid operands `vmaxx\.zw \$vf1zw,\$vf2zw,\$vf3zw'
+.*: Error: invalid operands `vmax\.y \$vf0y,\$vf0y,\$vf31x'
+.*: Error: invalid operands `vmax\.yw \$vf0yw,\$vf0yw,\$vf31w'
+.*: Error: invalid operands `vmax\.yw \$vf0yw,\$vf31yw,\$vf0y'
+.*: Error: invalid operands `vmaxy\.xz \$vf31xz,\$vf15xz,\$vf7xz'
+.*: Error: invalid operands `vmaxy\.xzw \$vf1xzw,\$vf2xzw,\$vf3xzw'
+.*: Error: invalid operands `vmaxy\.y \$vf1y,\$vf2y'
+.*: Error: invalid operands `vmaxy\.yz \$vf0yz,\$vf31yz,\$vf0yz'
+.*: Error: invalid operands `vmaxy\.yzw \$vf0yzw,\$vf0yzw,\$vf0yzw'
+.*: Error: invalid operands `vmaxy\.yzw \$vf31y,\$vf15y,\$vf7y'
+.*: Error: invalid operands `vmaxy\.yzw \$vf31yzw,\$vf31yw,\$vf31y'
+.*: Error: invalid operands `vmaxy\.z \$vf0z,\$vf0z,\$vf0z'
+.*: Error: invalid operands `vmaxy\.z \$vf0z,\$vf0y,\$vf31y'
+.*: Error: invalid operands `vmaxy\.z \$vf0y,\$vf31z,\$vf0y'
+.*: Error: invalid operands `vmaxz\.xw \$vf31xw,\$vf31xw,\$vf31xw'
+.*: Error: invalid operands `vmaxz\.xy \$vf0xy,\$vf0xy,\$vf0xy'
+.*: Error: invalid operands `vmaxz\.xyw \$vf0xyw,\$vf0xyw,\$vf0xyw'
+.*: Error: invalid operands `vmaxz\.xyz \$vf1xyz,\$vf2xyz,\$vf3xyz'
+.*: Error: invalid operands `vmaxz\.xyz \$vf31xyz,\$vf0z,\$vf0z'
+.*: Error: invalid operands `vmaxz\.xyz \$vf31z,\$vf15xyz,\$vf7z'
+.*: Error: invalid operands `vmaxz\.xyz \$vf31z,\$vf31z,\$vf31z'
+.*: Error: invalid operands `vmaxz\.xyzw \$vf0xyzw,\$vf0xyzw,\$vf0xyzw'
+.*: Error: invalid operands `vmaxz\.xyzw \$vf0xyzw,\$vf0z,\$vf31z'
+.*: Error: invalid operands `vmaxz\.xyzw \$vf0z,\$vf31z,\$vf0z'
+.*: Error: invalid operands `vmaxz\.xyzw \$vf1xyzw,\$vf2xyzw,\$vfz'
+.*: Error: invalid operands `vmaxz\.xyzw \$vf31xyzw,\$vf0xyzw,\$vf0xyzw'
+.*: Error: invalid operands `vmaxz\.xz \$vf0xz,\$vf0xz,\$vf0xz'
+.*: Error: invalid operands `vmaxz\.y \$vf31y,\$vf15z,\$vf7z'
+.*: Error: invalid operands `vmaxz\.y \$vf31y,\$vf31y,\$vf31y'
+.*: Error: invalid operands `vmaxz\.yw \$vf0yw,\$vf0yw,\$vf0yw'
+.*: Error: invalid operands `vmaxz\.yzw \$vf0yzw,\$vf0yzw,\$vf31yzw'
+.*: Error: invalid operands `vmaxz\.yzw \$vf0yzw,\$vf31z,\$vf0z'
+.*: Error: invalid operands `vmaxz\.yzw \$vf1z,\$vf2yzw,\$vf3z'
+.*: Error: invalid operands `vmaxz\.yzw \$vf31z,\$vf0z,\$vf0z'
+.*: Error: invalid operands `vmaxz\.z \$vf31z,\$vf31z,\$vf31x'
+.*: Error: invalid operands `vmfir\.w \$vf0w,\$vi0w'
+.*: Error: invalid operands `vmfir\.w \$vf0,\$vi31w'
+.*: Error: invalid operands `vmfir\.x \$vf0x,\$vi0x'
+.*: Error: invalid operands `vmfir\.x \$vf0,\$vi31x'
+.*: Error: invalid operands `vmfir\.xw \$vf0xw,\$vi31xw'
+.*: Error: invalid operands `vmfir\.xy \$vf1xy,\$vi2xy'
+.*: Error: invalid operands `vmfir\.xy \$vf31,\$vi0xy'
+.*: Error: invalid operands `vmfir\.xyw \$vf0xyw,\$vi31xyw'
+.*: Error: invalid operands `vmfir\.xyw \$vf31xyw,\$vi0x'
+.*: Error: invalid operands `vmfir\.xyz \$vf0xyz,\$vi0xyz'
+.*: Error: invalid operands `vmfir\.xyzw \$vf1xyzw,\$vi2xyzw'
+.*: Error: invalid operands `vmfir\.xz \$vf0xz,\$vi31xz'
+.*: Error: invalid operands `vmfir\.xzw \$vf0xzw,\$vi31xzw'
+.*: Error: invalid operands `vmfir\.y \$vf0y,\$vi0y'
+.*: Error: invalid operands `vmfir\.yw \$vf0yw,\$vi0yw'
+.*: Error: invalid operands `vmfir\.yz \$vf0yz,\$vi31yz'
+.*: Error: invalid operands `vmfir\.yzw \$vf0yzw,\$vi0yzw'
+.*: Error: invalid operands `vmfir\.z \$vf0z,\$vi0z'
+.*: Error: invalid operands `vmfir\.z \$0z,\$vi31'
+.*: Error: invalid operands `vmfir\.zw \$vf0zw,\$vi0zw'
+.*: Error: invalid operands `vminii\.w \$vf0w,\$vf0w,\$Iw'
+.*: Error: invalid operands `vminii\.w \$vf0w,\$vf31x,\$I'
+.*: Error: invalid operands `vminii\.w \$vf1x,\$vf2w,\$I'
+.*: Error: invalid operands `vminii\.xw \$vf0xw,\$vf31xw,\$Ixw'
+.*: Error: invalid operands `vminii\.xw \$vf1xw,\$vf2w,\$I'
+.*: Error: invalid operands `vminii\.xw \$vf31x,\$vf0xw,\$I'
+.*: Error: invalid operands `vminii\.xyw \$vf31xw,\$vf0xyw,\$I'
+.*: Error: invalid operands `vminii\.xyz \$vf0xy,\$vf0xyz,\$I'
+.*: Error: unrecognized opcode `minii\.xz \$vf31z,\$vf15xz,\$I'
+.*: Error: invalid operands `vminii\.xz \$vf31xz,\$vf31x,\$I'
+.*: Error: invalid operands `vminii\.xzw \$vf0xzw,\$vf0xw,\$I'
+.*: Error: invalid operands `vminii\.xzw \$vf0zw,\$vf31xzw,\$I'
+.*: Error: invalid operands `vminii\.xzw \$vf1xyzw,\$vf2xzw,\$I'
+.*: Error: invalid operands `vminii\.xzw \$vf31xzw,\$vf0xyzw,\$I'
+.*: Error: invalid operands `vminii\.yw \$vf31yw,\$vf31yw,\$R'
+.*: Error: invalid operands `vminii\.yz \$vf0yz,\$vf0yz,\$Q'
+.*: Error: invalid operands `vminii\.yz \$vf0yz,\$vf31yz,\$ACC'
+.*: Error: invalid operands `vminii\.yzw \$vf31yzw,\$vf0yzw,\$R'
+.*: Error: invalid operands `vminii\.yzw \$vf31yzw,\$vf15yzw,\$ACC'
+.*: Error: invalid operands `vminii\.yzw \$vf31yzw,\$vf31yzw,\$Q'
+.*: Error: invalid operands `vmini\.w \$vf0w,\$vf0w,\$vf0x'
+.*: Error: invalid operands `vminiw\.w \$vf31w,\$vf31w,\$vf31x'
+.*: Error: invalid operands `vminiw\.x \$vf0x,\$vf0x,\$vf0x'
+.*: Error: invalid operands `vminiw\.x \$vf0x,\$vf0w,\$vf31w'
+.*: Error: invalid operands `vminiw\.x \$vf0w,\$vf31x,\$vf0w'
+.*: Error: invalid operands `vminiw\.x \$vf1w,\$vf2w,\$vf3w'
+.*: Error: invalid operands `vminiw\.xw \$vf0xw,\$vf31xw,\$vf0xw'
+.*: Error: invalid operands `vminiw\.xw \$vf1w,\$vf2w,\$vf3w'
+.*: Error: invalid operands `vminiw\.xyzw \$vf0xyzw,\$vf0xyzw,\$vf0xyzw'
+.*: Error: invalid operands `vminiw\.xyzw \$vf0xyzw,\$vf0xxyzw,\$vf31w'
+.*: Error: invalid operands `vminiw\.xyzw \$vf0xyzw,\$vf31xyzw,\$vf0xyzw'
+.*: Error: invalid operands `vminiw\.xyzw \$vf1xyzw,\$vf2xyzw,\$vf3ww'
+.*: Error: invalid operands `vminiw\.xz \$vf31xz,\$vf0xz,\$vf0xz'
+.*: Error: invalid operands `vminiw\.yw \$vf0yw,\$vf0yw,\$vf0yw'
+.*: Error: invalid operands `vminiw\.yz \$vf31yz,\$vf0yz,\$vf0yz'
+.*: Error: invalid operands `vminiw\.z \$vf31z,\$vf0z,\$vf0z'
+.*: Error: invalid operands `vminiw\.z \$vf31z,\$vf15w,\$vf7w'
+.*: Error: invalid operands `vminiw\.z \$vf31w,\$vf31z,\$vf31w'
+.*: Error: invalid operands `vminix\.xw \$vf0xw,\$vf31xw,\$vf0xw'
+.*: Error: invalid operands `vminix\.xyw \$vf0xyw,\$vf0xyw,\$vf0xyw'
+.*: Error: invalid operands `vminix\.xyzw \$vf0xyzw,\$vf31xyzw,\$vf0xyzw'
+.*: Error: invalid operands `vminix\.yw \$vf31yw,\$vf31yw,\$vf31yw'
+.*: Error: invalid operands `vminix\.zw \$vf31zw,\$vf31zw,\$vf31zw'
+.*: Error: invalid operands `vmini\.y \$vf0y,\$vf0x,\$vf0y'
+.*: Error: invalid operands `vminiy\.w \$vf0w,\$vf31w,\$vf0w'
+.*: Error: invalid operands `vminiy\.x \$vf31x,\$vf15x,\$vf7x'
+.*: Error: invalid operands `vminiy\.x \$vf31x,\$vf31y,\$vf31y'
+.*: Error: invalid operands `vminiy\.xw \$vf0y,\$vf0xw,\$vf0y'
+.*: Error: invalid operands `vminiy\.xw \$vf0xw,\$vf0y,\$vf31y'
+.*: Error: invalid operands `vminiy\.xw \$vf0xw,\$vf31xw,\$vf0xw'
+.*: Error: invalid operands `vminiy\.xyz \$vf31xyz,\$vf31xyz,\$vf31xyz'
+.*: Error: invalid operands `vminiy\.xyzw \$vf0xyzw,\$vf0y,\$vf0y'
+.*: Error: invalid operands `vminiy\.xyzw \$vf0y,\$vf0xyzw,\$vf31y'
+.*: Error: invalid operands `vminiy\.xyzw \$vf0xyzw,\$vf31xyzw,\$vf0xyzw'
+.*: Error: invalid operands `vminiy\.yw \$vf1yw,\$vf2yw,\$vf3yw'
+.*: Error: invalid operands `vminiy\.zw \$vf1zw,\$vf2zw,\$vf3zw'
+.*: Error: invalid operands `vmini\.z \$vf0z,\$vf0z,\$vf0x'
+.*: Error: invalid operands `vminiz\.x \$vf0x,\$vf31x,\$vf0x'
+.*: Error: invalid operands `vminiz\.xw \$vf0xw,\$vf31xw,\$vf0xw'
+.*: Error: invalid operands `vminiz\.xyw \$vf31xyw,\$vf0xyw,\$vf0xyw'
+.*: Error: invalid operands `vminiz\.xyw \$vf31xyw,\$vf15z,\$vf7z'
+.*: Error: invalid operands `vmove\.xyw \$vf0xyw,\$vf0xw'
+.*: Error: invalid operands `vmove\.y \$vf0y,\$vf31x'
+.*: Error: invalid operands `vmr32\.xw \$vf0xw,\$vf0w'
+.*: Error: invalid operands `vmr32\.xw \$vf0w,\$vf31xw'
+.*: Error: invalid operands `vmsubai\.xy \$ACCxy,\$vf31xy,\$Q'
+.*: Error: invalid operands `vmsubai\.xyw \$ACCxyw,\$vf0xyw,\$0'
+.*: Error: invalid operands `vmsubai\.xyw \$ACCxyw,\$vf1xyw,\$ACC'
+.*: Error: invalid operands `vmsubai\.xyw \$ACCxyw,\$vf31xw,\$I'
+.*: Error: invalid operands `vmsubaq\.y \$ACCy,\$vf31y,\$Qy'
+.*: Error: invalid operands `vmsubaq\.yw \$ACCw,\$vf0yw,\$Q'
+.*: Error: invalid operands `vmsubaq\.yw \$ACCwy,\$vf1yw,\$Q'
+.*: Error: invalid operands `vmsubaw\.x \$ACCx,\$vf31x,\$vf0x'
+.*: Error: invalid operands `vmsubaw\.x \$ACCx,\$vf31w,\$vf15w'
+.*: Error: invalid operands `vmsubaw\.x \$ACCw,\$vf31x,\$vf31w'
+.*: Error: invalid operands `vmsubaw\.xw \$ACCw,\$vf0xw,\$vf0w'
+.*: Error: invalid operands `vmsubaw\.xw \$ACCxw,\$vf0w,\$vf31w'
+.*: Error: invalid operands `vmsubaw\.xw \$ACCxw,\$vf1xw,\$vf2xw'
+.*: Error: invalid operands `vmsubax\.yzw \$ACCyzw,\$vf0yzw,\$vf31yzw'
+.*: Error: invalid operands `vmsubax\.z \$ACCz,\$vf31z,\$vf0z'
+.*: Error: invalid operands `vmsuba\.y \$ACCy,\$vf31y,\$vf15a'
+.*: Error: invalid operands `vmsuba\.yw \$ACCyw,\$vf31yw,\$vf0w'
+.*: Error: invalid operands `vmsubay\.x \$ACCx,\$vf31x,\$vf15x'
+.*: Error: invalid operands `vmsubay\.x \$ACCx,\$vf31y,\$vf31y'
+.*: Error: invalid operands `vmsubay\.xw \$ACCxw,\$vf0xw,\$vf0xw'
+.*: Error: invalid operands `vmsubaz\.xy \$ACCxy,\$vf0xy,\$vf31xy'
+.*: Error: invalid operands `vmsubaz\.yw \$ACCyw,\$vf31yw,\$vf0yw'
+.*: Error: invalid operands `vmsubi\.xyzw \$vf31xyzw,\$vf0xyzw,\$R'
+.*: Error: invalid operands `vmsubw\.xyw \$vf0xyw,\$vf0xyw,\$vf0xyw'
+.*: Error: invalid operands `vmsubw\.xzw \$vf0xzw,\$vf0xzw,\$vf31xzw'
+.*: Error: invalid operands `vmsubw\.y \$vf31y,\$vf31y,\$vf31y'
+.*: Error: invalid operands `vmsubw\.yw \$vf0yw,\$vf0y,\$vf0w'
+.*: Error: invalid operands `vmsubw\.yw \$vf0w,\$vf0yw,\$vf31w'
+.*: Error: invalid operands `vmsubw\.zw \$vf0zw,\$vf0zw,\$vf31zw'
+.*: Error: invalid operands `vmsubx\.w \$vf0w,\$vf0w,\$vf0w'
+.*: Error: invalid operands `vmsub\.y \$vf31y,\$vf15y,\$vf7w'
+.*: Error: invalid operands `vmsuby\.x \$vf0x,\$vf0x,\$vf31x'
+.*: Error: invalid operands `vmsuby\.x \$vf0x,\$vf31y,\$vf0y'
+.*: Error: invalid operands `vmsubz\.x \$vf0x,\$vf31x,\$vf0x'
+.*: Error: invalid operands `vmulai\.xyz \$ACCxyz,\$vf1xz,\$I'
+.*: Error: invalid operands `vmulaq\.zw \$ACCzw,\$vf31zw,\$I'
+.*: Error: invalid operands `vmula\.w \$ACCw,\$vf31w,\$vf0x'
+.*: Error: invalid operands `vmulax\.xz \$ACCxz,\$vf0xz,\$vf31xz'
+.*: Error: invalid operands `vmulax\.xz \$ACCxz,\$vf1x,\$vf2x'
+.*: Error: invalid operands `vmulax\.xz \$ACCx,\$vf31xz,\$vf0x'
+.*: Error: invalid operands `vmulay\.yzw \$ACCyzw,\$vf0yzw,\$vf31yzw'
+.*: Error: invalid operands `vmulaz\.w \$ACCw,\$vf0w,\$vf31w'
+.*: Error: unrecognized opcode `mulaz\.xy \$ACCz,\$vf31xy,\$vf0z'
+.*: Error: invalid operands `vmulaz\.xy \$ACCxy,\$vf31z,\$vf15z'
+.*: Error: invalid operands `vmulaz\.z \$ACCz,\$vf1z,\$vf2x'
+.*: Error: invalid operands `vmuli\.x \$vf31x,\$vf15x,\$ACC'
+.*: Error: invalid operands `vmulq\.x \$vf0x,\$vf31x,\$0'
+.*: Error: invalid operands `vmulq\.x \$vf1x,\$vf2x,\$ACC'
+.*: Error: invalid operands `vmulq\.x \$vf31x,\$vf0x,\$R'
+.*: Error: invalid operands `vmulq\.x \$vf31x,\$vf15x,\$I'
+.*: Error: invalid operands `vmulw\.z \$vf31z,\$vf15z,\$vf7z'
+.*: Error: invalid operands `vmulw\.z \$vf31z,\$vf31w,\$vf31w'
+.*: Error: invalid operands `vmulw\.zw \$vf0zw,\$vf0zw,\$vf0zw'
+.*: Error: invalid operands `vmuly\.xyzw \$vf0xyzw,\$vf0y,\$vf31y'
+.*: Error: invalid operands `vmuly\.xyzw \$vf0xyzw,\$vf31xyzw,\$vf0xyzw'
+.*: Error: invalid operands `vmuly\.xyzw \$vf1xyzw,\$vf2y,\$vf3y'
+.*: Error: invalid operands `vmuly\.xyzw \$vf31y,\$vf0xyzw,\$vf0y'
+.*: Error: invalid operands `vmulz\.y \$vf0y,\$vf31y,\$vf0y'
+.*: Error: invalid operands `vmulz\.y \$vf1y,\$vf2z,\$vf3z'
+.*: Error: invalid operands `vmulz\.y \$vf31z,\$vf0y,\$vf0z'
+.*: Error: invalid operands `vmulz\.y \$vf31z,\$vf15z,\$vf7z'
+.*: Error: invalid operands `vopmsub \$vf0x,\$vf0,\$vf31'
+.*: Error: invalid operands `vopmsub \$vf0,\$vf31x,\$vf0'
+.*: Error: invalid operands `vopmsub \$vf1,\$vf2,\$vf3x'
+.*: Error: invalid operands `vopmsub \$ACC,\$vf0,\$vf0'
+.*: Error: invalid operands `vopmsub \$vf31,\$R,\$vf7'
+.*: Error: invalid operands `vopmsub \$vf31,\$vf31,\$I'
+.*: Error: invalid operands `vopmsub\.xyz \$vf0xyz,\$vf0xyz,\$vf0xy'
+.*: Error: invalid operands `vopmula \$0,\$vf0,\$vf0'
+.*: Error: invalid operands `vopmula \$Q,\$vf0,\$vf31'
+.*: Error: invalid operands `vopmula \$R,\$vf1,\$vf2'
+.*: Error: invalid operands `vopmula \$I,\$vf31,\$vf0'
+.*: Error: invalid operands `vopmula \$ACCx,\$vf31,\$vf15'
+.*: Error: invalid operands `vopmula \$ACCxyzw,\$vf31,\$vf31'
+.*: Error: invalid operands `vopmula\.xyz \$ACCxyzw,\$vf0xyz,\$vf0xyz'
+.*: Error: unrecognized opcode `vopmula\.xyzw \$ACCxyzw,\$vf0xyzw,\$vf31xyzw'
+.*: Error: invalid operands `vrget\.w \$vf0w,\$0'
+.*: Error: invalid operands `vrget\.w \$vf1w,\$I'
+.*: Error: invalid operands `vrget\.w \$vf31w,\$Q'
+.*: Error: invalid operands `vrget\.x \$vf0x,\$ACC'
+.*: Error: invalid operands `vrget\.x \$vf1y,\$R'
+.*: Error: invalid operands `vrget\.xy \$vf31x,\$R'
+.*: Error: invalid operands `vrget\.xyw \$vf0xw,\$R'
+.*: Error: invalid operands `vrget\.xyw \$vf1yw,\$R'
+.*: Error: invalid operands `vrget\.xyw \$vf31xy,\$R'
+.*: Error: invalid operands `vrget\.xyz \$vf0xy,\$R'
+.*: Error: invalid operands `vrget\.xyz \$vf1xyzw,\$R'
+.*: Error: invalid operands `vrget\.xyz \$vf31xyzw,\$R'
+.*: Error: invalid operands `vrget\.xyzw \$vf0xyz,\$R'
+.*: Error: invalid operands `vrget\.xyzw \$vf1xzw,\$R'
+.*: Error: invalid operands `vrget\.xyzw \$vf31yzw,\$R'
+.*: Error: invalid operands `vrget\.xz \$vf0xz,\$0'
+.*: Error: invalid operands `vrget\.xz \$vf1z,\$R'
+.*: Error: invalid operands `vrget\.xzw \$vf0xw,\$R'
+.*: Error: invalid operands `vrget\.y \$vf0z,\$R'
+.*: Error: invalid operands `vrget\.y \$vf1y,\$I'
+.*: Error: invalid operands `vrget\.z \$vf31z,\$Q'
+.*: Error: invalid operands `vrget\.zw \$vf0zw,\$ACC'
+.*: Error: invalid operands `vrnext\.xyzw \$vf0xyz,\$R'
+.*: Error: invalid operands `vrnext\.xyzw \$vf1xyzw,\$0'
+.*: Error: invalid operands `vrnext\.xyzw \$vf31xyzw,\$Rxyzw'
+.*: Error: invalid operands `vrnext\.yz \$vf31yz,\$Ryz'
+.*: Error: invalid operands `vrnext\.z \$vf0z,\$Rz'
+.*: Error: invalid operands `vrsqrt \$Q,\$vf0xz,\$vf31y'
+.*: Error: invalid operands `vrsqrt \$Q,\$vf1z,\$vf2xz'
+.*: Error: invalid operands `vrsqrt \$Q,\$vf31yx,\$vf15w'
+.*: Error: invalid operands `vrsqrt \$Qx,\$vf31x,\$vf31y'
+.*: Error: invalid operands `vrsqrt \$0,\$vf31y,\$vf0w'
+.*: Error: invalid operands `vrxor \$0,\$vf0w'
+.*: Error: invalid operands `vrxor \$R,\$vf0xy'
+.*: Error: invalid operands `vrxor \$R,\$vf0zw'
+.*: Error: invalid operands `vrxor \$R,\$vf1yz'
+.*: Error: invalid operands `vrxor \$ACC,\$vf31x'
+.*: Error: invalid operands `vrxor \$Q,\$vf31y'
+.*: Error: invalid operands `vsqd\.w \$vf0,\(\-\-\$vi0w\)'
+.*: Error: invalid operands `vsqd\.w \$vf0,\(\-\-\$vi31w\)'
+.*: Error: invalid operands `vsqd\.x \$vf1,\(\-\-\$vi2x\)'
+.*: Error: invalid operands `vsqd\.xw \$vf0,\(\-\-\$vi0xw\)'
+.*: Error: invalid operands `vsqd\.xy \$vf0,\(\-\-\$vi0xy\)'
+.*: Error: invalid operands `vsqd\.xyw \$vf0,\(\-\-\$vi0xyw\)'
+.*: Error: invalid operands `vsqd\.xyz \$vf0,\(\-\-\$vi31xyz\)'
+.*: Error: invalid operands `vsqd\.xyzw \$vf0,\(\-\-\$vi0xyzw\)'
+.*: Error: invalid operands `vsqd\.xz \$vf0,\(\-\-\$vi31xz\)'
+.*: Error: invalid operands `vsqd\.xzw \$vf0,\(\-\-\$vi0xzw\)'
+.*: Error: invalid operands `vsqd\.y \$vf0,\(\-\-\$vi0y\)'
+.*: Error: invalid operands `vsqd\.yw \$vf0,\(\-\-\$vi31yw\)'
+.*: Error: invalid operands `vsqd\.yz \$vf0,\(\-\-\$vi31yz\)'
+.*: Error: invalid operands `vsqd\.yzw \$vf0,\(\-\-\$vi31yzw\)'
+.*: Error: invalid operands `vsqd\.yzw \$vf0yzw,\(\-\-\$vi0x\)'
+.*: Error: invalid operands `vsqd\.z \$vf1,\(\-\-\$vi2z\)'
+.*: Error: invalid operands `vsqd\.zw \$vf1,\(\-\-\$vi2zw\)'
+.*: Error: invalid operands `vsqi\.w \$vf0,\(\$vi0w\+\+\)'
+.*: Error: invalid operands `vsqi\.x \$vf0x,\(\$vi0x\+\+\)'
+.*: Error: invalid operands `vsqi\.xw \$vf0xw,\(\$vi0xw\+\+\)'
+.*: Error: invalid operands `vsqi\.xw \$vf1x,\(\$vi2\+\+\)'
+.*: Error: invalid operands `vsqi\.xw \$vf31w,\(\$vi0\+\+\)'
+.*: Error: invalid operands `vsqi\.xy \$vf0,\(\$vi31xy\+\+\)'
+.*: Error: invalid operands `vsqi\.xyw \$vf0x,\(\$vi0\+\+\)'
+.*: Error: invalid operands `vsqi\.xyw \$vf0,\(\$vi31xyw\+\+\)'
+.*: Error: invalid operands `vsqi\.xyz \$vf0xyz,\(\$vi0xyz\+\+\)'
+.*: Error: invalid operands `vsqi\.xyzw \$vf0,\(\$vi31xyzw\+\+\)'
+.*: Error: invalid operands `vsqi\.xz \$vf0xz,\(\$vi0xz\+\+\)'
+.*: Error: invalid operands `vsqi\.xzw \$vf0xzw,\(\$vi0xzw\+\+\)'
+.*: Error: invalid operands `vsqi\.y \$vf1,\(\$vi2y\+\+\)'
+.*: Error: invalid operands `vsqi\.yw \$vf0yw,\(\$vi0yw\+\+\)'
+.*: Error: invalid operands `vsqi\.yz \$vf1,\(\$vi2yz\+\+\)'
+.*: Error: invalid operands `vsqi\.yzw \$vf0yzw,\(\$vi0yzw\+\+\)'
+.*: Error: invalid operands `vsqi\.z \$vf0,\(\$vi31z\+\+\)'
+.*: Error: invalid operands `vsqi\.zw \$vf0zw,\(\$vi0zw\+\+\)'
+.*: Error: invalid operands `vsqrt \$Q,\$vf1zw'
+.*: Error: invalid operands `vsqrt \$Q,\$vf31xw'
+.*: Error: invalid operands `vsqrt \$Q,\$vf31xy'
+.*: Error: invalid operands `vsubai\.w \$ACCw,\$vf0w,\$0'
+.*: Error: invalid operands `vsubai\.w \$ACCw,\$vf1x,\$I'
+.*: Error: invalid operands `vsubai\.w \$ACCx,\$vf31w,\$I'
+.*: Error: invalid operands `vsubai\.x \$ACCw,\$vf31x,\$I'
+.*: Error: invalid operands `vsubai\.xw \$ACCw,\$vf0xw,\$I'
+.*: Error: invalid operands `vsubai\.xw \$ACCxw,\$vf1x,\$I'
+.*: Error: invalid operands `vsubai\.xw \$ACCxw,\$vf31xw,\$0'
+.*: Error: invalid operands `vsubai\.xy \$ACCxy,\$vf0y,\$I'
+.*: Error: invalid operands `vsubai\.xy \$ACCxy,\$vf1x,\$I'
+.*: Error: invalid operands `vsubai\.xy \$ACCxy,\$vf311xy,\$I'
+.*: Error: invalid operands `vsubai\.xyz \$ACCxyz,\$vf1yz,\$I'
+.*: Error: invalid operands `vsubai\.xyz \$ACCxyz,\$vf31xyz,\$ACC'
+.*: Error: invalid operands `vsubai\.xyzw \$ACCxyzw,\$vf0xyzw,\$R'
+.*: Error: invalid operands `vsubai\.xyzw \$ACCxyzw,\$vf1xyzw,\$Q'
+.*: Error: invalid operands `vsubai\.xz \$ACCxz,\$vf1z,\$I'
+.*: Error: invalid operands `vsubai\.y \$ACCy,\$vf31,\$3'
+.*: Error: invalid operands `vsubai\.yw \$ACCyw,\$vf0yw,\$Iyw'
+.*: Error: invalid operands `vsubai\.zw \$ACCzw,\$vf1zw,\$Izw'
+.*: Error: invalid operands `vsubai\.zw \$ACCzw,\$vf31w,\$I'
+.*: Error: invalid operands `vsubaq\.w \$ACCw,\$Q,\$Q'
+.*: Error: invalid operands `vsubaq\.w \$ACCw,\$I,\$Q'
+.*: Error: invalid operands `vsubaq\.xyw \$ACCxyw,\$vf0xw,\$Q'
+.*: Error: invalid operands `vsubaq\.xyzw \$ACCxyzw,\$vf0xyz,\$Q'
+.*: Error: invalid operands `vsubaq\.xzw \$ACCxzw,\$vf1xw,\$Q'
+.*: Error: invalid operands `vsubaq\.yw \$ACCyw,\$vf31y,\$Q'
+.*: Error: invalid operands `vsubaq\.yz \$ACCyz,\$vf0yz,\$ACC'
+.*: Error: invalid operands `vsubaq\.yz \$ACCyz,\$vf1yz,\$I'
+.*: Error: invalid operands `vsubax\.w \$ACCw,\$vf0w,\$vf0w'
+.*: Error: invalid operands `vsubax\.w \$ACCw,\$vf0x,\$vf31x'
+.*: Error: invalid operands `vsubax\.w \$ACCx,\$vf1w,\$vf2x'
+.*: Error: invalid operands `vsubax\.w \$ACCx,\$vf31x,\$vf0x'
+.*: Error: invalid operands `vsubax\.xyzw \$ACCxyzw,\$vf31xyzw,\$vf0xyzw'
+.*: Error: invalid operands `vsubax\.xzw \$ACCxzw,\$vf1xzw,\$vf2xzw'
+.*: Error: invalid operands `vsubax\.y \$ACCy,\$vf31y,\$vf0y'
+.*: Error: invalid operands `vsubax\.yw \$ACCyw,\$vf0yw,\$vf0yw'
+.*: Error: invalid operands `vsubay\.yw \$ACCyw,\$vf0yw,\$vf31yw'
+.*: Error: invalid operands `vsubay\.yzw \$ACCyzw,\$vf0yzw,\$vf31yzw'
+.*: Error: invalid operands `vsubay\.z \$ACCz,\$vf0z,\$vf31z'
+.*: Error: invalid operands `vsubay\.zw \$ACCzw,\$vf0zw,\$vf0zw'
+.*: Error: invalid operands `vsubaz\.w \$ACCw,\$vf31w,\$vf15w'
+.*: Error: invalid operands `vsubaz\.x \$ACCx,\$vf0x,\$vf31x'
+.*: Error: invalid operands `vsubaz\.xy \$ACCxy,\$vf0xy,\$vf0xy'
+.*: Error: invalid operands `vsubaz\.xz \$ACCxz,\$vf31xz,\$vf15xz'
+.*: Error: invalid operands `vsubaz\.xz \$ACCxz,\$vf31z,\$vf31z'
+.*: Error: invalid operands `vsubaz\.xzw \$ACCxw,\$vf0xzw,\$vf0z'
+.*: Error: invalid operands `vsubaz\.xzw \$ACCz,\$vf0xzw,\$vf31z'
+.*: Error: invalid operands `vsubaz\.xzw \$ACCxzw,\$vf1z,\$vf2z'
+.*: Error: invalid operands `vsubaz\.yw \$ACCyw,\$vf1yw,\$vf2yw'
+.*: Error: invalid operands `vsubi\.w \$vf31w,\$vf15w,\$0'
+.*: Error: invalid operands `vsubi\.w \$vf31w,\$vf31w,\$R'
+.*: Error: invalid operands `vsubi\.x \$vf0x,\$vf0y,\$I'
+.*: Error: invalid operands `vsubi\.x \$vf0x,\$vf31x,\$Ix'
+.*: Error: invalid operands `vsubi\.xy \$vf0xy,\$vf31y,\$I'
+.*: Error: invalid operands `vsubi\.xy \$vf1x,\$vf2xy,\$I'
+.*: Error: invalid operands `vsubq\.x \$vf31x,\$vf15x,\$Qx'
+.*: Error: invalid operands `vsubq\.x \$vf31x,\$vf31y,\$Q'
+.*: Error: invalid operands `vsubq\.xw \$vf0xw,\$vf0xw,\$0'
+.*: Error: invalid operands `vsubq\.xw \$vf0xw,\$vf31xw,\$2'
+.*: Error: invalid operands `vsubq\.xyzw \$vf1yzw,\$vf2xyzw,\$Q'
+.*: Error: invalid operands `vsubq\.yw \$vf31w,\$vf15yw,\$Q'
+.*: Error: invalid operands `vsubq\.yw \$vf31yw,\$vf31y,\$Q'
+.*: Error: invalid operands `vsubx\.xyw \$vf0xyw,\$vf31xyw,\$vf0xyw'
+.*: Error: invalid operands `vsubx\.xzw \$vf1xzw,\$vf2xzw,\$vf3xzw'
+.*: Error: invalid operands `vsuby\.xw \$vf0xw,\$vf0xw,\$vf0xw'
+.*: Error: invalid operands `vsuby\.zw \$vf0zw,\$vf0zw,\$vf0zw'
+.*: Error: invalid operands `vsub\.z \$vf0z,\$vf31z,\$vf0x'
+.*: Error: invalid operands `vsubz\.xyw \$vf31yw,\$vf15xyw,\$vf7z'
+.*: Error: invalid operands `vsubz\.xyw \$vf31xyw,\$vf31yw,\$vf31z'
+.*: Error: invalid operands `vsubz\.xyz \$vf0xyz,\$vf0xyz,\$vf0x'
+.*: Error: invalid operands `vwaitq \$vf0x'

diff --git a/gas/testsuite/gas/mips/r5900-nollsc.l b/gas/testsuite/gas/mips/r5900-nollsc.l
index 23a1c7b2c12b5974809f2d38cb93ddffea46819a..f5e4fff7bc4fa293276c103295ab1e5e01f6bdce 100644 (file)
--- a/gas/testsuite/gas/mips/r5900-nollsc.l
+++ b/gas/testsuite/gas/mips/r5900-nollsc.l
@@ -1,5 +1,5 @@
 .*: Assembler messages:
-.*: Error: Opcode not supported on this processor: r5900 \(mips3\) `ll \$5,0\(\$6\)'
-.*: Error: Opcode not supported on this processor: r5900 \(mips3\) `sc \$5,0\(\$6\)'
-.*: Error: Opcode not supported on this processor: r5900 \(mips3\) `lld \$5,0\(\$6\)'
-.*: Error: Opcode not supported on this processor: r5900 \(mips3\) `scd \$5,0\(\$6\)'
+.*: Error: opcode not supported on this processor: r5900 \(mips3\) `ll \$5,0\(\$6\)'
+.*: Error: opcode not supported on this processor: r5900 \(mips3\) `sc \$5,0\(\$6\)'
+.*: Error: opcode not supported on this processor: r5900 \(mips3\) `lld \$5,0\(\$6\)'
+.*: Error: opcode not supported on this processor: r5900 \(mips3\) `scd \$5,0\(\$6\)'

diff --git a/gas/testsuite/gas/mips/relax-bc1any.l b/gas/testsuite/gas/mips/relax-bc1any.l
index 02f166f3050b03351d31679e2ed935863380a17c..957c67498c82ec1bdc6c0960f232557c43c8a0cc 100644 (file)
--- a/gas/testsuite/gas/mips/relax-bc1any.l
+++ b/gas/testsuite/gas/mips/relax-bc1any.l
@@ -1,7 +1,7 @@
 .*: Assembler messages:
-.*:6: Warning: Relaxed out-of-range branch into a jump
-.*:11: Warning: Relaxed out-of-range branch into a jump
-.*:7: Error: Branch out of range
-.*:8: Error: Branch out of range
-.*:9: Error: Branch out of range
-.*:10: Error: Branch out of range
+.*:6: Warning: relaxed out-of-range branch into a jump
+.*:11: Warning: relaxed out-of-range branch into a jump
+.*:7: Error: branch out of range
+.*:8: Error: branch out of range
+.*:9: Error: branch out of range
+.*:10: Error: branch out of range

diff --git a/gas/testsuite/gas/mips/relax-bposge.l b/gas/testsuite/gas/mips/relax-bposge.l
index ab3c846361f38b866b9dca8af2fa358bff4a9cf4..a9b4e101236c8cde32b2764eec5f9ba9f0f89f48 100644 (file)
--- a/gas/testsuite/gas/mips/relax-bposge.l
+++ b/gas/testsuite/gas/mips/relax-bposge.l
@@ -1,5 +1,5 @@
 .*: Assembler messages:
-.*:6: Warning: Relaxed out-of-range branch into a jump
-.*:9: Warning: Relaxed out-of-range branch into a jump
-.*:7: Error: Branch out of range
-.*:8: Error: Branch out of range
+.*:6: Warning: relaxed out-of-range branch into a jump
+.*:9: Warning: relaxed out-of-range branch into a jump
+.*:7: Error: branch out of range
+.*:8: Error: branch out of range

diff --git a/gas/testsuite/gas/mips/relax-swap1.l b/gas/testsuite/gas/mips/relax-swap1.l
index 6928f3ba5494e154cbb3bd1aee7fdac516cacb70..d35902f5f917de68ab5ea5f1f2303eb1b5e179db 100644 (file)
--- a/gas/testsuite/gas/mips/relax-swap1.l
+++ b/gas/testsuite/gas/mips/relax-swap1.l
@@ -1,24 +1,24 @@
 .*: Assembler messages:
-.*:9: Warning: Relaxed out-of-range branch into a jump
-.*:14: Warning: Relaxed out-of-range branch into a jump
-.*:19: Warning: Relaxed out-of-range branch into a jump
-.*:24: Warning: Relaxed out-of-range branch into a jump
-.*:28: Warning: Relaxed out-of-range branch into a jump
-.*:33: Warning: Relaxed out-of-range branch into a jump
-.*:37: Warning: Relaxed out-of-range branch into a jump
-.*:42: Warning: Relaxed out-of-range branch into a jump
-.*:46: Warning: Relaxed out-of-range branch into a jump
-.*:51: Warning: Relaxed out-of-range branch into a jump
-.*:55: Warning: Relaxed out-of-range branch into a jump
-.*:62: Warning: Relaxed out-of-range branch into a jump
-.*:68: Warning: Relaxed out-of-range branch into a jump
-.*:73: Warning: Relaxed out-of-range branch into a jump
-.*:79: Warning: Relaxed out-of-range branch into a jump
-.*:85: Warning: Relaxed out-of-range branch into a jump
-.*:96: Warning: Relaxed out-of-range branch into a jump
-.*:101: Warning: Relaxed out-of-range branch into a jump
-.*:106: Warning: Relaxed out-of-range branch into a jump
-.*:111: Warning: Relaxed out-of-range branch into a jump
-.*:116: Warning: Relaxed out-of-range branch into a jump
-.*:121: Warning: Relaxed out-of-range branch into a jump
-.*:126: Warning: Relaxed out-of-range branch into a jump
+.*:9: Warning: relaxed out-of-range branch into a jump
+.*:14: Warning: relaxed out-of-range branch into a jump
+.*:19: Warning: relaxed out-of-range branch into a jump
+.*:24: Warning: relaxed out-of-range branch into a jump
+.*:28: Warning: relaxed out-of-range branch into a jump
+.*:33: Warning: relaxed out-of-range branch into a jump
+.*:37: Warning: relaxed out-of-range branch into a jump
+.*:42: Warning: relaxed out-of-range branch into a jump
+.*:46: Warning: relaxed out-of-range branch into a jump
+.*:51: Warning: relaxed out-of-range branch into a jump
+.*:55: Warning: relaxed out-of-range branch into a jump
+.*:62: Warning: relaxed out-of-range branch into a jump
+.*:68: Warning: relaxed out-of-range branch into a jump
+.*:73: Warning: relaxed out-of-range branch into a jump
+.*:79: Warning: relaxed out-of-range branch into a jump
+.*:85: Warning: relaxed out-of-range branch into a jump
+.*:96: Warning: relaxed out-of-range branch into a jump
+.*:101: Warning: relaxed out-of-range branch into a jump
+.*:106: Warning: relaxed out-of-range branch into a jump
+.*:111: Warning: relaxed out-of-range branch into a jump
+.*:116: Warning: relaxed out-of-range branch into a jump
+.*:121: Warning: relaxed out-of-range branch into a jump
+.*:126: Warning: relaxed out-of-range branch into a jump

diff --git a/gas/testsuite/gas/mips/relax-swap2.l b/gas/testsuite/gas/mips/relax-swap2.l
index 3abb9f3434050a926a5911c43ba37cade171afa3..efe7e005ecbf252d72bd5abfd7f5518649393d32 100644 (file)
--- a/gas/testsuite/gas/mips/relax-swap2.l
+++ b/gas/testsuite/gas/mips/relax-swap2.l
@@ -1,10 +1,10 @@
 .*: Assembler messages:
-.*:9: Warning: Relaxed out-of-range branch into a jump
-.*:13: Warning: Relaxed out-of-range branch into a jump
-.*:18: Warning: Relaxed out-of-range branch into a jump
-.*:22: Warning: Relaxed out-of-range branch into a jump
-.*:27: Warning: Relaxed out-of-range branch into a jump
-.*:31: Warning: Relaxed out-of-range branch into a jump
-.*:36: Warning: Relaxed out-of-range branch into a jump
-.*:40: Warning: Relaxed out-of-range branch into a jump
-.*:45: Warning: Relaxed out-of-range branch into a jump
+.*:9: Warning: relaxed out-of-range branch into a jump
+.*:13: Warning: relaxed out-of-range branch into a jump
+.*:18: Warning: relaxed out-of-range branch into a jump
+.*:22: Warning: relaxed out-of-range branch into a jump
+.*:27: Warning: relaxed out-of-range branch into a jump
+.*:31: Warning: relaxed out-of-range branch into a jump
+.*:36: Warning: relaxed out-of-range branch into a jump
+.*:40: Warning: relaxed out-of-range branch into a jump
+.*:45: Warning: relaxed out-of-range branch into a jump

diff --git a/gas/testsuite/gas/mips/relax.l b/gas/testsuite/gas/mips/relax.l
index 0e5004bf20f7655321b2904d85fe493e4e31a202..d95d7742de5dab87e19d13bdd1488ef2b85988d4 100644 (file)
--- a/gas/testsuite/gas/mips/relax.l
+++ b/gas/testsuite/gas/mips/relax.l
@@ -1,45 +1,45 @@
 .*: Assembler messages:
-.*:9: Warning: Relaxed out-of-range branch into a jump
-.*:10: Warning: Relaxed out-of-range branch into a jump
-.*:11: Warning: Relaxed out-of-range branch into a jump
-.*:12: Warning: Relaxed out-of-range branch into a jump
-.*:13: Warning: Relaxed out-of-range branch into a jump
-.*:14: Warning: Relaxed out-of-range branch into a jump
-.*:15: Warning: Relaxed out-of-range branch into a jump
-.*:16: Warning: Relaxed out-of-range branch into a jump
-.*:17: Warning: Relaxed out-of-range branch into a jump
-.*:18: Warning: Relaxed out-of-range branch into a jump
-.*:20: Warning: Relaxed out-of-range branch into a jump
-.*:21: Warning: Relaxed out-of-range branch into a jump
-.*:23: Warning: Relaxed out-of-range branch into a jump
-.*:24: Warning: Relaxed out-of-range branch into a jump
-.*:25: Warning: Relaxed out-of-range branch into a jump
-.*:26: Warning: Relaxed out-of-range branch into a jump
-.*:27: Warning: Relaxed out-of-range branch into a jump
-.*:28: Warning: Relaxed out-of-range branch into a jump
-.*:29: Warning: Relaxed out-of-range branch into a jump
-.*:30: Warning: Relaxed out-of-range branch into a jump
-.*:32: Warning: Relaxed out-of-range branch into a jump
-.*:33: Warning: Relaxed out-of-range branch into a jump
-.*:37: Warning: Relaxed out-of-range branch into a jump
-.*:38: Warning: Relaxed out-of-range branch into a jump
-.*:39: Warning: Relaxed out-of-range branch into a jump
-.*:40: Warning: Relaxed out-of-range branch into a jump
-.*:41: Warning: Relaxed out-of-range branch into a jump
-.*:42: Warning: Relaxed out-of-range branch into a jump
-.*:43: Warning: Relaxed out-of-range branch into a jump
-.*:44: Warning: Relaxed out-of-range branch into a jump
-.*:45: Warning: Relaxed out-of-range branch into a jump
-.*:46: Warning: Relaxed out-of-range branch into a jump
-.*:48: Warning: Relaxed out-of-range branch into a jump
-.*:49: Warning: Relaxed out-of-range branch into a jump
-.*:51: Warning: Relaxed out-of-range branch into a jump
-.*:52: Warning: Relaxed out-of-range branch into a jump
-.*:53: Warning: Relaxed out-of-range branch into a jump
-.*:54: Warning: Relaxed out-of-range branch into a jump
-.*:55: Warning: Relaxed out-of-range branch into a jump
-.*:56: Warning: Relaxed out-of-range branch into a jump
-.*:57: Warning: Relaxed out-of-range branch into a jump
-.*:58: Warning: Relaxed out-of-range branch into a jump
-.*:60: Warning: Relaxed out-of-range branch into a jump
-.*:61: Warning: Relaxed out-of-range branch into a jump
+.*:9: Warning: relaxed out-of-range branch into a jump
+.*:10: Warning: relaxed out-of-range branch into a jump
+.*:11: Warning: relaxed out-of-range branch into a jump
+.*:12: Warning: relaxed out-of-range branch into a jump
+.*:13: Warning: relaxed out-of-range branch into a jump
+.*:14: Warning: relaxed out-of-range branch into a jump
+.*:15: Warning: relaxed out-of-range branch into a jump
+.*:16: Warning: relaxed out-of-range branch into a jump
+.*:17: Warning: relaxed out-of-range branch into a jump
+.*:18: Warning: relaxed out-of-range branch into a jump
+.*:20: Warning: relaxed out-of-range branch into a jump
+.*:21: Warning: relaxed out-of-range branch into a jump
+.*:23: Warning: relaxed out-of-range branch into a jump
+.*:24: Warning: relaxed out-of-range branch into a jump
+.*:25: Warning: relaxed out-of-range branch into a jump
+.*:26: Warning: relaxed out-of-range branch into a jump
+.*:27: Warning: relaxed out-of-range branch into a jump
+.*:28: Warning: relaxed out-of-range branch into a jump
+.*:29: Warning: relaxed out-of-range branch into a jump
+.*:30: Warning: relaxed out-of-range branch into a jump
+.*:32: Warning: relaxed out-of-range branch into a jump
+.*:33: Warning: relaxed out-of-range branch into a jump
+.*:37: Warning: relaxed out-of-range branch into a jump
+.*:38: Warning: relaxed out-of-range branch into a jump
+.*:39: Warning: relaxed out-of-range branch into a jump
+.*:40: Warning: relaxed out-of-range branch into a jump
+.*:41: Warning: relaxed out-of-range branch into a jump
+.*:42: Warning: relaxed out-of-range branch into a jump
+.*:43: Warning: relaxed out-of-range branch into a jump
+.*:44: Warning: relaxed out-of-range branch into a jump
+.*:45: Warning: relaxed out-of-range branch into a jump
+.*:46: Warning: relaxed out-of-range branch into a jump
+.*:48: Warning: relaxed out-of-range branch into a jump
+.*:49: Warning: relaxed out-of-range branch into a jump
+.*:51: Warning: relaxed out-of-range branch into a jump
+.*:52: Warning: relaxed out-of-range branch into a jump
+.*:53: Warning: relaxed out-of-range branch into a jump
+.*:54: Warning: relaxed out-of-range branch into a jump
+.*:55: Warning: relaxed out-of-range branch into a jump
+.*:56: Warning: relaxed out-of-range branch into a jump
+.*:57: Warning: relaxed out-of-range branch into a jump
+.*:58: Warning: relaxed out-of-range branch into a jump
+.*:60: Warning: relaxed out-of-range branch into a jump
+.*:61: Warning: relaxed out-of-range branch into a jump

diff --git a/gas/testsuite/gas/mips/set-arch.l b/gas/testsuite/gas/mips/set-arch.l
index e6cd7239e804dee83321b7594950447f9fc1d09a..63cb870e0f6c5b6ab8ca91404d26d393860c3dfd 100644 (file)
--- a/gas/testsuite/gas/mips/set-arch.l
+++ b/gas/testsuite/gas/mips/set-arch.l
@@ -1,3 +1,3 @@
 .*: Assembler messages:
-.*:146: Warning: Condition code register should be even for c.eq.ps, was 3
-.*:147: Warning: Condition code register should be even for movf.ps, was 3
+.*:146: Warning: condition code register should be even for c.eq.ps, was 3
+.*:147: Warning: condition code register should be even for movf.ps, was 3

diff --git a/gas/testsuite/gas/mips/tls-ill.l b/gas/testsuite/gas/mips/tls-ill.l
index 6eb2d7982604094650f957f0fd1a310f6a74db35..8085f8205d9cafa148af99c77109b08b78209198 100644 (file)
--- a/gas/testsuite/gas/mips/tls-ill.l
+++ b/gas/testsuite/gas/mips/tls-ill.l
@@ -1,11 +1,11 @@
 .*: Assembler messages:
 .*:6: Error: bad expression
-.*:6: Error: Illegal operands `addiu \$4,\$28,%dtprel\(tlsvar\)'
+.*:6: Error: invalid operands `addiu \$4,\$28,%dtprel\(tlsvar\)'
 .*:7: Error: bad expression
-.*:7: Error: Illegal operands `addiu \$4,\$28,%tprel\(tlsvar\)'
+.*:7: Error: invalid operands `addiu \$4,\$28,%tprel\(tlsvar\)'
 .*:8: Error: bad expression
 .*:8: Error: missing '\)'
-.*:8: Error: Illegal operands `addiu \$4,\$28,%lo\(%gottprel\(tlsvar\)\)'
+.*:8: Error: invalid operands `addiu \$4,\$28,%lo\(%gottprel\(tlsvar\)\)'
 .*:9: Error: bad expression
 .*:9: Error: missing '\)'
-.*:9: Error: Illegal operands `addiu \$4,\$28,%hi\(%gottprel\(tlsvar\)\)'
+.*:9: Error: invalid operands `addiu \$4,\$28,%hi\(%gottprel\(tlsvar\)\)'

diff --git a/gas/testsuite/gas/mips/vr5400-ill.l b/gas/testsuite/gas/mips/vr5400-ill.l
index 065e5c1776ae24dce851fad38bf13b84478edea7..e91527d559d53bb8be55d6af3d3221469f3cb74a 100644 (file)
--- a/gas/testsuite/gas/mips/vr5400-ill.l
+++ b/gas/testsuite/gas/mips/vr5400-ill.l
@@ -3,13 +3,13 @@
 .*:7: Error: operand 3 must be scalar `srl.ob \$f2,\$f4,\$f6'
 .*:10: Error: operand 2 must be an immediate `rzu.ob \$f2,\$f6\[1\]'
 .*:11: Error: operand 2 must be an immediate `rzu.ob \$f2,\$f6'
-.*:14: Error: Illegal operands `add.ob \$v2,\$f4,\$f6'
-.*:15: Error: Illegal operands `add.ob \$f2,\$v4,\$f6'
-.*:16: Error: Illegal operands `add.ob \$f2,\$f4,\$v6'
-.*:17: Error: Illegal operands `add.ob \$v2,\$v4,\$v6'
-.*:20: Error: Illegal operands `add.ob \$v2,\$f4,\$f6\[1\]'
-.*:21: Error: Illegal operands `add.ob \$f2,\$v4,\$f6\[1\]'
-.*:22: Error: Illegal operands `add.ob \$f2,\$f4,\$v6\[1\]'
-.*:23: Error: Illegal operands `add.ob \$v2,\$v4,\$v6\[1\]'
-.*:25: Error: Vector element must be constant `add.ob \$f2,\$f4,\$f6\[foo\]'
-.*:26: Error: Missing `\]' `add.ob \$f2,\$f4,\$f6\[1}'
+.*:14: Error: invalid operands `add.ob \$v2,\$f4,\$f6'
+.*:15: Error: invalid operands `add.ob \$f2,\$v4,\$f6'
+.*:16: Error: invalid operands `add.ob \$f2,\$f4,\$v6'
+.*:17: Error: invalid operands `add.ob \$v2,\$v4,\$v6'
+.*:20: Error: invalid operands `add.ob \$v2,\$f4,\$f6\[1\]'
+.*:21: Error: invalid operands `add.ob \$f2,\$v4,\$f6\[1\]'
+.*:22: Error: invalid operands `add.ob \$f2,\$f4,\$v6\[1\]'
+.*:23: Error: invalid operands `add.ob \$v2,\$v4,\$v6\[1\]'
+.*:25: Error: vector element must be constant `add.ob \$f2,\$f4,\$f6\[foo\]'
+.*:26: Error: missing `\]' `add.ob \$f2,\$f4,\$f6\[1}'