pa.c (pa_output_move_double): Directly handle register indexed memory operand.

	* config/pa/pa.c (pa_output_move_double): Directly handle register
	indexed memory operand.  Simplify handling of scaled register indexed
	memory operands.

From-SVN: r221835

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4c832e7f1dd8fe7111fe3f432a733fa4f1ae43b7..d0ab5c364b623a32190eba88736d65652fe03820 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-04-02  John David Anglin  <danglin@gcc.gnu.org>
+
+       * config/pa/pa.c (pa_output_move_double): Directly handle register
+       indexed memory operand.  Simplify handling of scaled register indexed
+       memory operands.
+
 2015-04-02  Ilya Enkovich  <ilya.enkovich@intel.com>
 
        PR driver/65444

diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 2f2735c7c44e9735ab46abb1b48af93652541a68..d5b0c5081a899ba70e94e0fc9bf20d248530da5f 100644 (file)
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -2595,28 +2595,29 @@ pa_output_move_double (rtx *operands)
               && GET_CODE (XEXP (addr, 0)) == MULT)
        {
          rtx xoperands[4];
-         rtx high_reg = gen_rtx_SUBREG (SImode, operands[0], 0);
 
-         if (!reg_overlap_mentioned_p (high_reg, addr))
-           {
-             xoperands[0] = high_reg;
-             xoperands[1] = XEXP (addr, 1);
-             xoperands[2] = XEXP (XEXP (addr, 0), 0);
-             xoperands[3] = XEXP (XEXP (addr, 0), 1);
-             output_asm_insn ("{sh%O3addl %2,%1,%0|shladd,l %2,%O3,%1,%0}",
-                              xoperands);
-             return "ldw 4(%0),%R0\n\tldw 0(%0),%0";
-           }
-         else
-           {
-             xoperands[0] = high_reg;
-             xoperands[1] = XEXP (addr, 1);
-             xoperands[2] = XEXP (XEXP (addr, 0), 0);
-             xoperands[3] = XEXP (XEXP (addr, 0), 1);
-             output_asm_insn ("{sh%O3addl %2,%1,%R0|shladd,l %2,%O3,%1,%R0}",
-                              xoperands);
-             return "ldw 0(%R0),%0\n\tldw 4(%R0),%R0";
-           }
+         /* Load address into left half of destination register.  */
+         xoperands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
+         xoperands[1] = XEXP (addr, 1);
+         xoperands[2] = XEXP (XEXP (addr, 0), 0);
+         xoperands[3] = XEXP (XEXP (addr, 0), 1);
+         output_asm_insn ("{sh%O3addl %2,%1,%0|shladd,l %2,%O3,%1,%0}",
+                          xoperands);
+         return "ldw 4(%0),%R0\n\tldw 0(%0),%0";
+       }
+      else if (GET_CODE (addr) == PLUS
+              && REG_P (XEXP (addr, 0))
+              && REG_P (XEXP (addr, 1)))
+       {
+         rtx xoperands[3];
+
+         /* Load address into left half of destination register.  */
+         xoperands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
+         xoperands[1] = XEXP (addr, 0);
+         xoperands[2] = XEXP (addr, 1);
+         output_asm_insn ("{addl|add,l} %1,%2,%0",
+                          xoperands);
+         return "ldw 4(%0),%R0\n\tldw 0(%0),%0";
        }
     }