bus: fix CSR interconnect data readback

diff --git a/migen/bus/csr.py b/migen/bus/csr.py
index 667d58b83a7e4cf8602f14844c2e8e0ffad093ed..c62f4fafb1e5f3a34f78264342c22e95af2214d6 100644 (file)
--- a/migen/bus/csr.py
+++ b/migen/bus/csr.py
@@ -30,5 +30,5 @@ class Interconnect:
                        comb.append(a(slave.we_i, self.master.we_o))
                        comb.append(a(slave.d_i, self.master.d_o))
                        rb = rb | slave.d_o
-               comb.append(a(master.d_i, rb))
+               comb.append(a(self.master.d_i, rb))
                return f.Fragment(comb)