+2018-02-16 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/70023
+ * lra-constraints.c (inherit_in_ebb): Take hard reg mode of
+ src_regno into account.
+
2018-02-16 Carl Love <cel@us.ibm.com>
* config/rs6000/altivec.h: Remove vec_vextract4b and vec_vinsert4b.
PSEUDO_REGNO_MODE (src_regno),
reg_renumber[src_regno]);
}
- add_next_usage_insn (src_regno, use_insn, reloads_num);
+ if (src_regno >= FIRST_PSEUDO_REGISTER)
+ add_next_usage_insn (src_regno, use_insn, reloads_num);
+ else
+ {
+ for (i = 0; i < hard_regno_nregs (src_regno, reg->biggest_mode); i++)
+ add_next_usage_insn (src_regno + i, use_insn, reloads_num);
+ }
}
}
/* Process used call regs. */
+2018-02-16 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/70023
+ * gcc.target/i386/pr70023.c: New.
+
2018-02-16 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/p9-vinsert4b-1.c: Remove test file for non-ABI
--- /dev/null
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O -fno-sched-critical-path-heuristic -fschedule-insns -m8bit-idiv -w" } */
+
+typedef int v8si __attribute__ ((vector_size (32)));
+typedef __int128 i128;
+
+i128
+foo(int u16_0, int u64_0, i128 u128_0, i128 u128_1, v8si v32u32_0, v8si v32u32_1, v8si v32u64_1)
+{
+ v32u32_0[6] <<= u128_1 & 31;
+ v32u32_0 &= (v8si){v32u64_1[2], v32u32_1[6], 0xc5a661b, 0, 2};
+ u128_1 += 0x16fe7853d732;
+ v32u32_1 /= (v8si){v32u32_0[5], u128_1, 0x92d} | 1;
+ return u128_0 + v32u32_1[1];
+}