* arm.md (fix_truncsfsi2, fix_truncdfsi2, arm_fix_truncsfsi2)
authorRichard Earnshaw <rearnsha@arm.com>
Sun, 9 Mar 2003 17:07:45 +0000 (17:07 +0000)
committerRichard Earnshaw <rearnsha@gcc.gnu.org>
Sun, 9 Mar 2003 17:07:45 +0000 (17:07 +0000)
(arm_fix_truncdfsi2): Add missing fix in floating point mode before
conversion to integer.
* cirrus.md (cirrus_truncsfsi2, cirrus_truncdfsi2): Likewise.

From-SVN: r64037

gcc/ChangeLog
gcc/config/arm/arm.md
gcc/config/arm/cirrus.md

index c2545b7edf46e49411bedc52a0c279d0bb4c54db..6b70af9308d6cf1c82bb19663ade98a43b2f082e 100644 (file)
@@ -1,3 +1,10 @@
+2003-03-09  Richard Earnshaw  <rearnsha@arm.com>
+
+       * arm.md (fix_truncsfsi2, fix_truncdfsi2, arm_fix_truncsfsi2)
+       (arm_fix_truncdfsi2): Add missing fix in floating point mode before
+       conversion to integer.
+       * cirrus.md (cirrus_truncsfsi2, cirrus_truncdfsi2): Likewise.
+
 2003-03-09  Roger Sayle  <roger@eyesopen.com>
 
        * builtins.def: Fix typo and improve grammar.
index 4d3df96cf2395b21991e61d829bd7675a39f0a65..9811bf8579ab891407bcc4df8e8c5a61b46da3d0 100644 (file)
 
 (define_expand "fix_truncsfsi2"
   [(set (match_operand:SI         0 "s_register_operand" "")
-       (fix:SI (match_operand:SF 1 "s_register_operand"  "")))]
+       (fix:SI (fix:SF (match_operand:SF 1 "s_register_operand"  ""))))]
   "TARGET_ARM && TARGET_ANY_HARD_FLOAT"
   "
   if (TARGET_CIRRUS)
 
 (define_insn "*arm_fix_truncsfsi2"
   [(set (match_operand:SI         0 "s_register_operand" "=r")
-       (fix:SI (match_operand:SF 1 "s_register_operand" "f")))]
+       (fix:SI (fix:SF (match_operand:SF 1 "s_register_operand" "f"))))]
   "TARGET_ARM && TARGET_HARD_FLOAT"
   "fix%?z\\t%0, %1"
   [(set_attr "type" "f_2_r")
 
 (define_expand "fix_truncdfsi2"
   [(set (match_operand:SI         0 "s_register_operand" "")
-       (fix:SI (match_operand:DF 1 "s_register_operand"  "")))]
+       (fix:SI (fix:DF (match_operand:DF 1 "s_register_operand"  ""))))]
   "TARGET_ARM && TARGET_ANY_HARD_FLOAT"
   "
   if (TARGET_CIRRUS)
 
 (define_insn "*arm_fix_truncdfsi2"
   [(set (match_operand:SI         0 "s_register_operand" "=r")
-       (fix:SI (match_operand:DF 1 "s_register_operand" "f")))]
+       (fix:SI (fix:DF (match_operand:DF 1 "s_register_operand" "f"))))]
   "TARGET_ARM && TARGET_HARD_FLOAT"
   "fix%?z\\t%0, %1"
   [(set_attr "type" "f_2_r")
index 328a0ebe5d4e4ec711ddc859f060967b79914df0..0da8469ddd2a49598440a21547a605a755cff869 100644 (file)
 
 (define_insn "cirrus_truncsfsi2"
   [(set (match_operand:SI         0 "s_register_operand" "=r")
-       (fix:SI (match_operand:SF 1 "cirrus_fp_register"  "v")))
+       (fix:SI (fix:SF (match_operand:SF 1 "cirrus_fp_register"  "v"))))
    (clobber (match_scratch:DF     2                      "=v"))]
   "TARGET_ARM && TARGET_CIRRUS"
   "cftruncs32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
 
 (define_insn "cirrus_truncdfsi2"
   [(set (match_operand:SI         0 "s_register_operand" "=r")
-       (fix:SI (match_operand:DF 1 "cirrus_fp_register"  "v")))
+       (fix:SI (fix:DF (match_operand:DF 1 "cirrus_fp_register"  "v"))))
    (clobber (match_scratch:DF     2                      "=v"))]
   "TARGET_ARM && TARGET_CIRRUS"
   "cftruncd32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"