+2003-03-09 Richard Earnshaw <rearnsha@arm.com>
+
+ * arm.md (fix_truncsfsi2, fix_truncdfsi2, arm_fix_truncsfsi2)
+ (arm_fix_truncdfsi2): Add missing fix in floating point mode before
+ conversion to integer.
+ * cirrus.md (cirrus_truncsfsi2, cirrus_truncdfsi2): Likewise.
+
2003-03-09 Roger Sayle <roger@eyesopen.com>
* builtins.def: Fix typo and improve grammar.
(define_expand "fix_truncsfsi2"
[(set (match_operand:SI 0 "s_register_operand" "")
- (fix:SI (match_operand:SF 1 "s_register_operand" "")))]
+ (fix:SI (fix:SF (match_operand:SF 1 "s_register_operand" ""))))]
"TARGET_ARM && TARGET_ANY_HARD_FLOAT"
"
if (TARGET_CIRRUS)
(define_insn "*arm_fix_truncsfsi2"
[(set (match_operand:SI 0 "s_register_operand" "=r")
- (fix:SI (match_operand:SF 1 "s_register_operand" "f")))]
+ (fix:SI (fix:SF (match_operand:SF 1 "s_register_operand" "f"))))]
"TARGET_ARM && TARGET_HARD_FLOAT"
"fix%?z\\t%0, %1"
[(set_attr "type" "f_2_r")
(define_expand "fix_truncdfsi2"
[(set (match_operand:SI 0 "s_register_operand" "")
- (fix:SI (match_operand:DF 1 "s_register_operand" "")))]
+ (fix:SI (fix:DF (match_operand:DF 1 "s_register_operand" ""))))]
"TARGET_ARM && TARGET_ANY_HARD_FLOAT"
"
if (TARGET_CIRRUS)
(define_insn "*arm_fix_truncdfsi2"
[(set (match_operand:SI 0 "s_register_operand" "=r")
- (fix:SI (match_operand:DF 1 "s_register_operand" "f")))]
+ (fix:SI (fix:DF (match_operand:DF 1 "s_register_operand" "f"))))]
"TARGET_ARM && TARGET_HARD_FLOAT"
"fix%?z\\t%0, %1"
[(set_attr "type" "f_2_r")
(define_insn "cirrus_truncsfsi2"
[(set (match_operand:SI 0 "s_register_operand" "=r")
- (fix:SI (match_operand:SF 1 "cirrus_fp_register" "v")))
+ (fix:SI (fix:SF (match_operand:SF 1 "cirrus_fp_register" "v"))))
(clobber (match_scratch:DF 2 "=v"))]
"TARGET_ARM && TARGET_CIRRUS"
"cftruncs32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
(define_insn "cirrus_truncdfsi2"
[(set (match_operand:SI 0 "s_register_operand" "=r")
- (fix:SI (match_operand:DF 1 "cirrus_fp_register" "v")))
+ (fix:SI (fix:DF (match_operand:DF 1 "cirrus_fp_register" "v"))))
(clobber (match_scratch:DF 2 "=v"))]
"TARGET_ARM && TARGET_CIRRUS"
"cftruncd32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"