2016-05-09 Richard Biener <rguenther@suse.de>
PR tree-optimization/70985
* match.pd (BIT_FIELD_REF -> (type)): Disable on GIMPLE when
op0 isn't a gimple register.
* gcc.dg/torture/pr70985.c: New testcase.
From-SVN: r236032
+2016-05-09 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/70985
+ * match.pd (BIT_FIELD_REF -> (type)): Disable on GIMPLE when
+ op0 isn't a gimple register.
+
2016-05-09 Prachi Godbole <prachi.godbole@imgtec.com>
* config/mips/i6400.md (i6400_fpu_intadd, i6400_fpu_logic)
(view_convert (imagpart @0)))))
(if (INTEGRAL_TYPE_P (TREE_TYPE (@0))
&& INTEGRAL_TYPE_P (type)
+ /* On GIMPLE this should only apply to register arguments. */
+ && (! GIMPLE || is_gimple_reg (@0))
/* A bit-field-ref that referenced the full argument can be stripped. */
&& ((compare_tree_int (@1, TYPE_PRECISION (TREE_TYPE (@0))) == 0
&& integer_zerop (@2))
+2016-05-09 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/70985
+ * gcc.dg/torture/pr70985.c: New testcase.
+
2016-05-09 Bin Cheng <bin.cheng@arm.com>
* gcc.dg/tree-ssa/ifc-9.c: New test.
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target int32plus } */
+
+struct
+{
+ int f0:24;
+} a, c, d;
+
+int b;
+
+int
+fn1 ()
+{
+ return 0;
+}
+
+void
+fn2 ()
+{
+ int e;
+ if (b)
+ for (; e;)
+ {
+ d = c;
+ if (fn1 (b))
+ b = a.f0;
+ }
+}