re PR target/31388 (ICE building libiberty multilib for mips16 multilibs)

gcc/
	PR target/31388
	* config/mips/mips.md (load_const_gp): New insn.
	* config/mips/mips.c (mips_split_symbol): Avoid using or creating
	the MIPS16 GP pseudo register if no_new_pseudos.
	(mips16_gp_pseudo_reg): Use gen_load_const_gp.

From-SVN: r123398

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 91ab03c1af71ddbee55219a494579e6977f1d26d..7d8f39bb7d9d2a4deaaac5fc5930faf6b22d2ca7 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2007-04-01  Richard Sandiford  <richard@codesourcery.com>
+
+       PR target/31388
+       * config/mips/mips.md (load_const_gp): New insn.
+       * config/mips/mips.c (mips_split_symbol): Avoid using or creating
+       the MIPS16 GP pseudo register if no_new_pseudos.
+       (mips16_gp_pseudo_reg): Use gen_load_const_gp.
+
 2007-03-31  Andrew Pinski  <andrew_pinski@playstation.sony.com>
 
        PR target/31364

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 7203a83a7ccb50f925e6c049d4a6c1af7824df48..4c0ce09a36d161c162f1f59c026ff42f7c66142f 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -1888,10 +1888,15 @@ mips_split_symbol (rtx temp, rtx addr)
 {
   rtx high;
 
-  if (TARGET_MIPS16)
-    high = mips16_gp_pseudo_reg ();
-  else
+  if (!TARGET_MIPS16)
     high = mips_force_temporary (temp, gen_rtx_HIGH (Pmode, copy_rtx (addr)));
+  else if (no_new_pseudos)
+    {
+      emit_insn (gen_load_const_gp (copy_rtx (temp)));
+      high = temp;
+    }
+  else
+    high = mips16_gp_pseudo_reg ();
   return gen_rtx_LO_SUM (Pmode, high, addr);
 }
 
@@ -7808,19 +7813,13 @@ mips16_gp_pseudo_reg (void)
 {
   if (cfun->machine->mips16_gp_pseudo_rtx == NULL_RTX)
     {
-      rtx unspec;
       rtx insn, scan;
 
       cfun->machine->mips16_gp_pseudo_rtx = gen_reg_rtx (Pmode);
 
       /* We want to initialize this to a value which gcc will believe
          is constant.  */
-      start_sequence ();
-      unspec = gen_rtx_UNSPEC (VOIDmode, gen_rtvec (1, const0_rtx), UNSPEC_GP);
-      emit_move_insn (cfun->machine->mips16_gp_pseudo_rtx,
-                     gen_rtx_CONST (Pmode, unspec));
-      insn = get_insns ();
-      end_sequence ();
+      insn = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx);
 
       push_topmost_sequence ();
       /* We need to emit the initialization after the FUNCTION_BEG

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 9d07cec4d913af3477814b72221a469951376bfb..cfe7150d49596dc1ba0e406a1df1559f183f909d 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -4074,6 +4074,11 @@
   [(set_attr "type"    "mfc")
    (set_attr "mode"    "SF")])
 
+;; Move a constant that satisfies CONST_GP_P into operand 0.
+(define_expand "load_const_gp"
+  [(set (match_operand 0 "register_operand" "=d")
+       (const (unspec [(const_int 0)] UNSPEC_GP)))])
+
 ;; Insn to initialize $gp for n32/n64 abicalls.  Operand 0 is the offset
 ;; of _gp from the start of this function.  Operand 1 is the incoming
 ;; function address.