(no commit message)

diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn
index eb35d16fce85aff992886c4ffd06af92cb8a1f96..f8faa63880ab53a8a99df5cce2c46e710ddc010c 100644 (file)
--- a/openpower/sv/cr_int_predication.mdwn
+++ b/openpower/sv/cr_int_predication.mdwn
@@ -73,7 +73,8 @@ Below is some pseudocode that, given a CR offset `offs` to represent `CR.eq` thr
 
 Assuming that `offs` is set to `CR.eq` this results in:
 
-* Arithmetic bit 0 (the LSB) of RS being inserted into CR0.eq
+* Arithmetic bit 0 (the LSB, numbered 63 in IBM MSB0 terminology)
+  of RS being inserted into CR0.eq
 * Arithmetic bit 1  of RS being inserted into CR1.eq
 * ...
 * Arithmetic bit 7 of RS being inserted into CR7.eq