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diff --git a/3d_gpu/architecture/decoder.mdwn b/3d_gpu/architecture/decoder.mdwn
index 6fc8270306db567ce2526229425d64f06e539802..c720b98484501f16458858d0923adee991431f1c 100644 (file)
--- a/3d_gpu/architecture/decoder.mdwn
+++ b/3d_gpu/architecture/decoder.mdwn
@@ -1,8 +1,9 @@
 # Decoder
 
-<http://bugs.libre-riscv.org/show_bug.cgi?id=186>
+* Context and walkthrough <https://libre-soc.org/irclog/%23libre-soc.2021-07-13.log.html>
+* bugreport <http://bugs.libre-riscv.org/show_bug.cgi?id=186>
 
-The decoder is in charge of translating the POWER instruction stream into operations that can be handled by our backend. It will have an extra input bit, set via a MSR, that will switch on GPU instructions.
+The decoder is in charge of translating the POWER instruction stream into operations that can be handled by the backend.
 
 Source code: <https://git.libre-riscv.org/?p=soc.git;a=tree;f=src/soc/decoder;hb=HEAD>