ira: Don't substitute into TRAP_IF insns (PR78610)

In the testcase, IRA propagates a constant into a TRAP_IF insn, which
then becomes an unconditional trap.  Unconditional traps are control
flow insns so doing this requires surgery on the cfg.  We cannot do
that here, so instead refuse to do the substitution.

	PR rtl-optimization/78610
	* ira.c (combine_and_move_insns): Don't substitute into TRAP_IF
	instructions.

gcc/testsuite/
	PR rtl-optimization/78610
	* gcc.c-torture/compile/pr78610.c: New testcase.

From-SVN: r243028

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0fc87d259a86a2359a998cb8d24e3bf6965dc697..97daa79d06b81d967fe3b9fbe40ffcc683039a25 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-11-30  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       PR rtl-optimization/78610
+       * ira.c (combine_and_move_insns): Don't substitute into TRAP_IF
+       instructions.
+
 2016-11-30  Bin Cheng  <bin.cheng@arm.com>
 
        PR tree-optimization/78574

diff --git a/gcc/ira.c b/gcc/ira.c
index 358110b6a318851e324f5ad21887fca05e960afa..ab322889c6c5b0976fb5ce89ce57ca80b3addd73 100644 (file)
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -3669,6 +3669,11 @@ combine_and_move_insns (void)
       if (JUMP_P (use_insn))
        continue;
 
+      /* Also don't substitute into a conditional trap insn -- it can become
+        an unconditional trap, and that is a flow control insn.  */
+      if (GET_CODE (PATTERN (use_insn)) == TRAP_IF)
+       continue;
+
       df_ref def = DF_REG_DEF_CHAIN (regno);
       gcc_assert (DF_REG_DEF_COUNT (regno) == 1 && DF_REF_INSN_INFO (def));
       rtx_insn *def_insn = DF_REF_INSN (def);

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index eac361b5f85732e47cf86a9c1d778f4848f185e8..7164611f9fff8e46edb1dd0faacc0e7256ea18ff 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-11-30  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       PR rtl-optimization/78610
+       * gcc.c-torture/compile/pr78610.c: New testcase.
+
 2016-11-30  Bin Cheng  <bin.cheng@arm.com>
 
        PR tree-optimization/78574

diff --git a/gcc/testsuite/gcc.c-torture/compile/pr78610.c b/gcc/testsuite/gcc.c-torture/compile/pr78610.c
new file mode 100644 (file)
index 0000000..0415ae6
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr78610.c
@@ -0,0 +1,14 @@
+/* PR rtl-optimization/78610 */
+
+unsigned int ao, gl;
+
+void
+ri (void)
+{
+  for (;;)
+    {
+      if (ao != 1)
+        ao /= 0;
+      gl = 0;
+    }
+}