$size() now works with memories as well!

diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc
index 541fe1b18969421af20fa610e92b8179e2fb5baa..608df0cb95fe35f54bf1e32a54f83f013711fd4c 100644 (file)
--- a/frontends/ast/simplify.cc
+++ b/frontends/ast/simplify.cc
@@ -387,7 +387,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
                }
                for (size_t i = 0; i < children.size(); i++) {
                        AstNode *node = children[i];
-                       if (node->type == AST_PARAMETER || node->type == AST_LOCALPARAM || node->type == AST_WIRE || node->type == AST_AUTOWIRE)
+                       if (node->type == AST_PARAMETER || node->type == AST_LOCALPARAM || node->type == AST_WIRE || node->type == AST_AUTOWIRE || node->type == AST_MEMORY)
                                while (node->simplify(true, false, false, 1, -1, false, node->type == AST_PARAMETER || node->type == AST_LOCALPARAM))
                                        did_something = true;
                }
@@ -1877,6 +1877,8 @@ skip_dynamic_range_lvalue_expansion:;
                                                        RTLIL::unescape_id(str).c_str(), int(children.size()), filename.c_str(), linenum);
 
                                AstNode *buf = children[0]->clone();
+                               // Is this needed?
+                               //while (buf->simplify(true, false, false, stage, width_hint, sign_hint, false)) { }
                                buf->detectSignWidth(width_hint, sign_hint);
                                delete buf;
 

diff --git a/tests/simple/functions01.sv b/tests/simple/functions01.sv
index 0fa1da6bd5fa9642528fd391c6c9fce45de2630f..cd87a49b717cbbb85231161d9b212fa8d5a3a9a4 100644 (file)
--- a/tests/simple/functions01.sv
+++ b/tests/simple/functions01.sv
@@ -2,13 +2,15 @@ module functions01;
 wire [3:0]x;
 wire [$size(x)-1:0]x_size;
 wire [$size({x, x})-1:0]xx_size;
-wire [3:0]w[0:5];
+wire [3:0]y[0:5];
+wire [$size(y)-1:0]y_size;
+wire [3:0]z[0:5][0:7];
+wire [$size(z)-1:0]z_size;
 
 //
 // The following are not supported yet:
 //
 
-//wire [$size(w)-1:0]w_s;
 //wire [$bits(x)-1:0]x_bits;
 //wire [$bits({x, x})-1:0]xx_bits;