(no commit message)

diff --git a/openpower/sv/rfc/ls012.mdwn b/openpower/sv/rfc/ls012.mdwn
index 956158b84b56a533af01cf9f5a48d491db2a4f4f..b7738b6cd06920d5ab0f5e45c2b0da06abea6b87 100644 (file)
--- a/openpower/sv/rfc/ls012.mdwn
+++ b/openpower/sv/rfc/ls012.mdwn
@@ -580,8 +580,8 @@ just stall straight away.
 Less extreme examples include instructions that take only a few cycles
 to complete, but if commonly used in tight loops with Conditional Branches, an
 Out-of-Order system with Speculative capability may need significantly
-more Reservation Stations to hold in-flight data for instructions which
-take longer than those which do not, so even a single clock cycle reduction
+more Reservation Stations to hold in-flight data for *all* instructions when
+some take longer, so even a single clock cycle reduction
 could become important.
 
 A rule of thumb is that in Hardware, at 4.8 ghz the budget for what is called