SLICC: Remove external_type for structures

In SLICC, in order to define a type a data type for which it should not
generate any code, the keyword external_type is used. For those data types for
which code should be generated, the keyword structure is used. This patch
eliminates the use of keyword external_type for defining structures. structure
key word can now have an optional attribute external, which would be used for
figuring out whether or not to generate the code for this structure. Also, now
structures can have functions as well data members in them.

diff --git a/src/mem/protocol/MESI_CMP_directory-L1cache.sm b/src/mem/protocol/MESI_CMP_directory-L1cache.sm
index ecd8c968123d49b45350b8ab31ada3d448c382d4..ab37a1bd85f23a4c38368f7dd1ca261e56831150 100644 (file)
--- a/src/mem/protocol/MESI_CMP_directory-L1cache.sm
+++ b/src/mem/protocol/MESI_CMP_directory-L1cache.sm
@@ -119,7 +119,7 @@ machine(L1Cache, "MSI Directory L1 Cache CMP")
     int pendingAcks, default="0", desc="number of pending acks";
   }
 
-  external_type(TBETable) {
+  structure(TBETable, external="yes") {
     TBE lookup(Address);
     void allocate(Address);
     void deallocate(Address);

diff --git a/src/mem/protocol/MESI_CMP_directory-L2cache.sm b/src/mem/protocol/MESI_CMP_directory-L2cache.sm
index c30e42e69d5bbdd172496c0bbbdbd2efc7d427bd..42fe0823f3ca09568f986d1c2afc674501d0681a 100644 (file)
--- a/src/mem/protocol/MESI_CMP_directory-L2cache.sm
+++ b/src/mem/protocol/MESI_CMP_directory-L2cache.sm
@@ -145,7 +145,7 @@ machine(L2Cache, "MESI Directory L2 Cache CMP")
     int pendingAcks,            desc="number of pending acks for invalidates during writeback";
   }
 
-  external_type(TBETable) {
+  structure(TBETable, external="yes") {
     TBE lookup(Address);
     void allocate(Address);
     void deallocate(Address);

diff --git a/src/mem/protocol/MESI_CMP_directory-dir.sm b/src/mem/protocol/MESI_CMP_directory-dir.sm
index 46c14bc0feb875875a71dd37867180739365eae1..c47df943393a123a24d4976348b94a43daa01b00 100644 (file)
--- a/src/mem/protocol/MESI_CMP_directory-dir.sm
+++ b/src/mem/protocol/MESI_CMP_directory-dir.sm
@@ -95,7 +95,7 @@ machine(Directory, "MESI_CMP_filter_directory protocol")
     int Len,               desc="...";
   }
     
-  external_type(TBETable) {
+  structure(TBETable, external="yes") {
     TBE lookup(Address);  
     void allocate(Address); 
     void deallocate(Address);

diff --git a/src/mem/protocol/MESI_CMP_directory-dma.sm b/src/mem/protocol/MESI_CMP_directory-dma.sm
index 3fab439c6c2a8cc5b72cebf1e83d6d202a4c3041..da8b94b7c19e450e51b54cb739bf4e4f8075b719 100644 (file)
--- a/src/mem/protocol/MESI_CMP_directory-dma.sm
+++ b/src/mem/protocol/MESI_CMP_directory-dma.sm
@@ -20,7 +20,7 @@ machine(DMA, "DMA Controller")
     Ack,          desc="DMA write to memory completed";
   }
 
-  external_type(DMASequencer) {
+  structure(DMASequencer, external="yes") {
     void ackCallback();
     void dataCallback(DataBlock);
   }

diff --git a/src/mem/protocol/MI_example-cache.sm b/src/mem/protocol/MI_example-cache.sm
index 26572770c5170e1bd8adc8c21e2b2b26ae302440..c992e4a68efd10d01c1f9f8b3d6a444abb1f4fe0 100644 (file)
--- a/src/mem/protocol/MI_example-cache.sm
+++ b/src/mem/protocol/MI_example-cache.sm
@@ -61,7 +61,7 @@ machine(L1Cache, "MI Example L1 Cache")
     DataBlock DataBlk,       desc="data for the block, required for concurrent writebacks";
   }
 
-  external_type(TBETable) {
+  structure(TBETable, external="yes") {
     TBE lookup(Address);
     void allocate(Address);
     void deallocate(Address);

diff --git a/src/mem/protocol/MI_example-dir.sm b/src/mem/protocol/MI_example-dir.sm
index d4ba3829d1f443b5cf78881dc59ddab935c76c7c..71e022df532ce8cadf8258da1fab7143ba6668d5 100644 (file)
--- a/src/mem/protocol/MI_example-dir.sm
+++ b/src/mem/protocol/MI_example-dir.sm
@@ -66,7 +66,7 @@ machine(Directory, "Directory protocol")
     MachineID DmaRequestor, desc="DMA requestor";
   }
 
-  external_type(TBETable) {
+  structure(TBETable, external="yes") {
     TBE lookup(Address);
     void allocate(Address);
     void deallocate(Address);

diff --git a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
index 50df2e52ac2ef2bd5f2b47eec0ee3953397a6dcf..78641d014ea08d30e5a9802715f63f1b4c1cb02b 100644 (file)
--- a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
@@ -127,7 +127,7 @@ machine(L1Cache, "Directory protocol")
     int NumPendingMsgs, default="0",     desc="Number of acks/data messages that this processor is waiting for";
   }
 
-  external_type(TBETable) {
+  structure(TBETable, external ="yes") {
     TBE lookup(Address);
     void allocate(Address);
     void deallocate(Address);

diff --git a/src/mem/protocol/MOESI_CMP_directory-L2cache.sm b/src/mem/protocol/MOESI_CMP_directory-L2cache.sm
index cdc91c2922dfd5a3f4cc29f514a00df286d2ecb7..059fcac71bce54eedd7708c085d25aebef0f8feb 100644 (file)
--- a/src/mem/protocol/MOESI_CMP_directory-L2cache.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-L2cache.sm
@@ -203,14 +203,14 @@ machine(L2Cache, "Token protocol")
     MachineID Fwd_GetX_ID,          desc="ID of the L1 cache to forward the block to once we get a response";
   }
 
-  external_type(TBETable) {
+  structure(TBETable, external = "yes") {
     TBE lookup(Address);
     void allocate(Address);
     void deallocate(Address);
     bool isPresent(Address);
   }
 
-  external_type(PerfectCacheMemory) {
+  structure(PerfectCacheMemory, external = "yes") {
     void allocate(Address);
     void deallocate(Address);
     DirEntry lookup(Address);

diff --git a/src/mem/protocol/MOESI_CMP_directory-dir.sm b/src/mem/protocol/MOESI_CMP_directory-dir.sm
index 55afa71616916a5fa8a2e10e1b41e96fb4804fc7..42d46e501ab4cc8ba5c47e1d7b22e8717fcb901b 100644 (file)
--- a/src/mem/protocol/MOESI_CMP_directory-dir.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-dir.sm
@@ -109,7 +109,7 @@ machine(Directory, "Directory protocol")
     MachineID Requestor, desc="original requestor";
   }
 
-  external_type(TBETable) {
+  structure(TBETable, external = "yes") {
     TBE lookup(Address);
     void allocate(Address);
     void deallocate(Address);

diff --git a/src/mem/protocol/MOESI_CMP_directory-dma.sm b/src/mem/protocol/MOESI_CMP_directory-dma.sm
index 43503ee2598a6d8089c5268238ae125b552fa7e5..30a311f6747dc6e7dde537842557eea35594d78a 100644 (file)
--- a/src/mem/protocol/MOESI_CMP_directory-dma.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-dma.sm
@@ -34,12 +34,12 @@ machine(DMA, "DMA Controller")
     DataBlock DataBlk, desc="Data";
   }
 
-  external_type(DMASequencer) {
+  structure(DMASequencer, external = "yes") {
     void ackCallback();
     void dataCallback(DataBlock);
   }
 
-  external_type(TBETable) {
+  structure(TBETable, external = "yes") {
     TBE lookup(Address);
     void allocate(Address);
     void deallocate(Address);

diff --git a/src/mem/protocol/MOESI_CMP_token-L1cache.sm b/src/mem/protocol/MOESI_CMP_token-L1cache.sm
index edaf5f8ae4075a42cc63da06f654bc5d8da464a7..7683b485fcaaa87c021cbd347261f5220a57ece2 100644 (file)
--- a/src/mem/protocol/MOESI_CMP_token-L1cache.sm
+++ b/src/mem/protocol/MOESI_CMP_token-L1cache.sm
@@ -153,14 +153,14 @@ machine(L1Cache, "Token protocol")
     PrefetchBit Prefetch,         desc="Is this a prefetch request";
   }
 
-  external_type(TBETable) {
+  structure(TBETable, external="yes") {
     TBE lookup(Address);
     void allocate(Address);
     void deallocate(Address);
     bool isPresent(Address);
   }
 
-  external_type(PersistentTable) {
+  structure(PersistentTable, external="yes") {
     void persistentRequestLock(Address, MachineID, AccessType);
     void persistentRequestUnlock(Address, MachineID);
     bool okToIssueStarving(Address, MachineID);

diff --git a/src/mem/protocol/MOESI_CMP_token-L2cache.sm b/src/mem/protocol/MOESI_CMP_token-L2cache.sm
index e685984c595bd164b4ccaf9f17d5aa7802087d24..6f43e771219cd339eba4fa7a4b1fd05b48f984bc 100644 (file)
--- a/src/mem/protocol/MOESI_CMP_token-L2cache.sm
+++ b/src/mem/protocol/MOESI_CMP_token-L2cache.sm
@@ -127,14 +127,14 @@ machine(L2Cache, "Token protocol")
     bool exclusive, default="false", desc="if local exclusive is likely";
   }
 
-  external_type(PerfectCacheMemory) {
+  structure(PerfectCacheMemory, external="yes") {
     void allocate(Address);
     void deallocate(Address);
     DirEntry lookup(Address);
     bool isTagPresent(Address);
   }
 
-  external_type(PersistentTable) {
+  structure(PersistentTable, external="yes") {
     void persistentRequestLock(Address, MachineID, AccessType);
     void persistentRequestUnlock(Address, MachineID);
     MachineID findSmallest(Address);

diff --git a/src/mem/protocol/MOESI_CMP_token-dir.sm b/src/mem/protocol/MOESI_CMP_token-dir.sm
index 14a2f0fb207c716d929a08a6ea77ee43ed85f804..5cad4d448bef6f8416dd38e61385b113cfb93fbc 100644 (file)
--- a/src/mem/protocol/MOESI_CMP_token-dir.sm
+++ b/src/mem/protocol/MOESI_CMP_token-dir.sm
@@ -122,7 +122,7 @@ machine(Directory, "Token protocol")
     Set Sharers,                   desc="Probable sharers of the line.  More accurately, the set of processors who need to see a GetX";
   }
 
-  external_type(PersistentTable) {
+  structure(PersistentTable, external="yes") {
     void persistentRequestLock(Address, MachineID, AccessType);
     void persistentRequestUnlock(Address, MachineID);
     bool okToIssueStarving(Address, MachineID);
@@ -145,7 +145,7 @@ machine(Directory, "Token protocol")
     bool WentPersistent,   desc="Did the DMA request require a persistent request";
   }
 
-  external_type(TBETable) {
+  structure(TBETable, external="yes") {
     TBE lookup(Address);
     void allocate(Address);
     void deallocate(Address);

diff --git a/src/mem/protocol/MOESI_CMP_token-dma.sm b/src/mem/protocol/MOESI_CMP_token-dma.sm
index e80f919954fe71e3abf68e81bed848f2bc727254..9a090145cf754dc0c048d7ab241db70983aef280 100644 (file)
--- a/src/mem/protocol/MOESI_CMP_token-dma.sm
+++ b/src/mem/protocol/MOESI_CMP_token-dma.sm
@@ -48,7 +48,7 @@ machine(DMA, "DMA Controller")
     Ack,          desc="DMA write to memory completed";
   }
 
-  external_type(DMASequencer) {
+  structure(DMASequencer, external="yes") {
     void ackCallback();
     void dataCallback(DataBlock);
   }

diff --git a/src/mem/protocol/MOESI_hammer-cache.sm b/src/mem/protocol/MOESI_hammer-cache.sm
index 4bbf3bde1531b41755e2ee9e355479b809f190ac..4ac59940b2a0c549d4a47297266742266069d89e 100644 (file)
--- a/src/mem/protocol/MOESI_hammer-cache.sm
+++ b/src/mem/protocol/MOESI_hammer-cache.sm
@@ -145,7 +145,7 @@ machine(L1Cache, "AMD Hammer-like protocol")
     Time FirstResponseTime, default="0", desc="the time the first response was received";
   }
 
-  external_type(TBETable) {
+  structure(TBETable, external="yes") {
     TBE lookup(Address);
     void allocate(Address);
     void deallocate(Address);

diff --git a/src/mem/protocol/MOESI_hammer-dir.sm b/src/mem/protocol/MOESI_hammer-dir.sm
index 439723d685c2463d1c36e94373ec3add95e169c3..4946ba0f31efd6e3dfe67ba6f8209aac6b5b047c 100644 (file)
--- a/src/mem/protocol/MOESI_hammer-dir.sm
+++ b/src/mem/protocol/MOESI_hammer-dir.sm
@@ -162,7 +162,7 @@ machine(Directory, "AMD Hammer-like protocol")
     bool Owned, default="false", desc="Indicates whether a cache has indicated it is currently a sharer";
   }
 
-  external_type(TBETable) {
+  structure(TBETable, external="yes") {
     TBE lookup(Address);
     void allocate(Address);
     void deallocate(Address);

diff --git a/src/mem/protocol/RubySlicc_Exports.sm b/src/mem/protocol/RubySlicc_Exports.sm
index c02af62ef8810b04c06477bc51136f2f42a02214..e3eb8ebeb9d3e8bff397a8321fa15ff676b93146 100644 (file)
--- a/src/mem/protocol/RubySlicc_Exports.sm
+++ b/src/mem/protocol/RubySlicc_Exports.sm
@@ -39,7 +39,7 @@ external_type(std::string, primitive="yes");
 external_type(uint64, primitive="yes");
 external_type(Time, primitive="yes", default="0");
 external_type(Address);
-external_type(DataBlock, desc="..."){
+structure(DataBlock, external = "yes", desc="..."){
   void clear();
   void copyPartial(DataBlock, int, int);
 }

diff --git a/src/mem/protocol/RubySlicc_Types.sm b/src/mem/protocol/RubySlicc_Types.sm
index f8783230e75015da8287b74e3a1521c687aa0dae..c856dd921d691d590fafef4201716e2638c3fc89 100644 (file)
--- a/src/mem/protocol/RubySlicc_Types.sm
+++ b/src/mem/protocol/RubySlicc_Types.sm
@@ -40,7 +40,7 @@ external_type(MessageBuffer, buffer="yes", inport="yes", outport="yes");
 
 external_type(OutPort, primitive="yes");
 
-external_type(InPort, primitive="yes") {
+structure(InPort, external = "yes", primitive="yes") {
   bool isReady();
   void dequeue();
   int dequeue_getDelayCycles();
@@ -53,7 +53,7 @@ external_type(MachineID);
 
 MessageBuffer getMandatoryQueue(int core_id);
 
-external_type(Set, non_obj="yes") {
+structure (Set, external = "yes", non_obj="yes") {
   void setSize(int);
   void add(NodeID);
   void addSet(Set);
@@ -70,7 +70,7 @@ external_type(Set, non_obj="yes") {
   NodeID smallestElement();
 }
 
-external_type(NetDest, non_obj="yes") {
+structure (NetDest, external = "yes", non_obj="yes") {
   void setSize(int);
   void setSize(int, int);
   void add(NodeID);
@@ -98,7 +98,7 @@ external_type(NetDest, non_obj="yes") {
   MachineID smallestElement(MachineType);
 }
 
-external_type(Sequencer) {
+structure (Sequencer, external = "yes") {
   void readCallback(Address, DataBlock);
   void readCallback(Address, GenericMachineType, DataBlock);
   void readCallback(Address, GenericMachineType, DataBlock, Time, Time, Time);
@@ -111,7 +111,7 @@ external_type(Sequencer) {
 
 external_type(AbstractEntry, primitive="yes");
 
-external_type(DirectoryMemory) {
+structure (DirectoryMemory, external = "yes") {
   AbstractEntry lookup(Address);
   bool isPresent(Address);
   void invalidateBlock(Address);
@@ -119,7 +119,7 @@ external_type(DirectoryMemory) {
 
 external_type(AbstractCacheEntry, primitive="yes");
 
-external_type(CacheMemory) {
+structure (CacheMemory, external = "yes") {
   bool cacheAvail(Address);
   Address cacheProbe(Address);
   AbstractCacheEntry allocate(Address, AbstractCacheEntry);
@@ -135,16 +135,16 @@ external_type(CacheMemory) {
   void setMRU(Address);
 }
 
-external_type(MemoryControl, inport="yes", outport="yes") {
+structure (MemoryControl, inport="yes", outport="yes", external = "yes") {
 
 }
 
-external_type(DMASequencer) {
+structure (DMASequencer, external = "yes") {
   void ackCallback();
   void dataCallback(DataBlock);
 }
 
-external_type(TimerTable, inport="yes") {
+structure (TimerTable, inport="yes", external = "yes") {
   bool isReady();
   Address readyAddress();
   void set(Address, int);
@@ -152,8 +152,7 @@ external_type(TimerTable, inport="yes") {
   bool isSet(Address);
 }
 
-external_type(GenericBloomFilter) {
-
+structure (GenericBloomFilter, external = "yes") {
   void clear(int);
   void increment(Address, int);
   void decrement(Address, int);
@@ -163,7 +162,3 @@ external_type(GenericBloomFilter) {
   bool isSet(Address, int);
   int getCount(Address, int);
 }
-
-
-
-

diff --git a/src/mem/slicc/parser.py b/src/mem/slicc/parser.py
index 8095fc8b4fed9732d5ab94570aa38ac3c7ede2f9..aeda218f7a9564d71ba5ee2ca72262c8389e5430 100644 (file)
--- a/src/mem/slicc/parser.py
+++ b/src/mem/slicc/parser.py
@@ -309,11 +309,6 @@ class SLICC(Grammar):
         p[4]["external"] = "yes"
         p[0] = ast.TypeDeclAST(self, p[3], p[4], [])
 
-    def p_decl__extern1(self, p):
-        "decl : EXTERN_TYPE '(' type pairs ')' '{' type_methods '}'"
-        p[4]["external"] = "yes"
-        p[0] = ast.TypeDeclAST(self, p[3], p[4], p[7])
-
     def p_decl__global(self, p):
         "decl : GLOBAL '(' type pairs ')' '{' type_members '}'"
         p[4]["global"] = "yes"
@@ -357,28 +352,19 @@ class SLICC(Grammar):
         "type_members : empty"
         p[0] = []
 
+    def p_type_method__0(self, p):
+        "type_member : type_or_void ident '(' types ')' pairs SEMI"
+        p[0] = ast.TypeFieldMethodAST(self, p[1], p[2], p[4], p[6])
+
     def p_type_member__1(self, p):
-        "type_member : type ident pairs SEMI"
+        "type_member : type_or_void ident pairs SEMI"
         p[0] = ast.TypeFieldMemberAST(self, p[1], p[2], p[3], None)
 
     def p_type_member__2(self, p):
-        "type_member : type ident ASSIGN expr SEMI"
+        "type_member : type_or_void ident ASSIGN expr SEMI"
         p[0] = ast.TypeFieldMemberAST(self, p[1], p[2],
                                       ast.PairListAST(self), p[4])
 
-    # Methods
-    def p_type_methods__list(self, p):
-        "type_methods : type_method type_methods"
-        p[0] = [ p[1] ] + p[2]
-
-    def p_type_methods(self, p):
-        "type_methods : empty"
-        p[0] = []
-
-    def p_type_method(self, p):
-        "type_method : type_or_void ident '(' types ')' pairs SEMI"
-        p[0] = ast.TypeFieldMethodAST(self, p[1], p[2], p[4], p[6])
-
     # Enum fields
     def p_type_enums__list(self, p):
         "type_enums : type_enum type_enums"