+2019-10-30 Delia Burduv <Delia.Burduv@arm.com>
+
+ * config/tc-aarch64.c (parse_address_main): Accept the omission of
+ the immediate argument for ldraa and ldrab as a shorthand for the
+ immediate being 0.
+ * testsuite/gas/aarch64/ldraa-ldrab-no-offset.d: New test.
+ * testsuite/gas/aarch64/ldraa-ldrab-no-offset.s: New test.
+ * testsuite/gas/aarch64/illegal-ldraa.s: Modified to accept the
+ writeback form with no offset.
+ * testsuite/gas/aarch64/illegal-ldraa.s: Removed missing offset
+ error.
+
2019-10-30 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.s,
[base,Xm,SXTX {#imm}]
[base,Wm,(S|U)XTW {#imm}]
Pre-indexed
+ [base]! // in ldraa/ldrab exclusive
[base,#imm]!
Post-indexed
[base],#imm
}
/* If at this point neither .preind nor .postind is set, we have a
- bare [Rn]{!}; reject [Rn]! accept [Rn] as a shorthand for [Rn,#0].
+ bare [Rn]{!}; only accept [Rn]! as a shorthand for [Rn,#0]! for ldraa and
+ ldrab, accept [Rn] as a shorthand for [Rn,#0].
For SVE2 vector plus scalar offsets, allow [Zn.<T>] as shorthand for
[Zn.<T>, xzr]. */
if (operand->addr.preind == 0 && operand->addr.postind == 0)
{
if (operand->addr.writeback)
{
- /* Reject [Rn]! */
- set_syntax_error (_("missing offset in the pre-indexed address"));
- return FALSE;
+ if (operand->type == AARCH64_OPND_ADDR_SIMM10)
+ {
+ /* Accept [Rn]! as a shorthand for [Rn,#0]! */
+ operand->addr.offset.is_reg = 0;
+ operand->addr.offset.imm = 0;
+ operand->addr.preind = 1;
+ }
+ else
+ {
+ /* Reject [Rn]! */
+ set_syntax_error (_("missing offset in the pre-indexed address"));
+ return FALSE;
+ }
}
-
- operand->addr.preind = 1;
- if (operand->type == AARCH64_OPND_SVE_ADDR_ZX)
- {
- operand->addr.offset.is_reg = 1;
- operand->addr.offset.regno = REG_ZR;
- *offset_qualifier = AARCH64_OPND_QLF_X;
- }
- else
+ else
{
- inst.reloc.exp.X_op = O_constant;
- inst.reloc.exp.X_add_number = 0;
+ operand->addr.preind = 1;
+ if (operand->type == AARCH64_OPND_SVE_ADDR_ZX)
+ {
+ operand->addr.offset.is_reg = 1;
+ operand->addr.offset.regno = REG_ZR;
+ *offset_qualifier = AARCH64_OPND_QLF_X;
+ }
+ else
+ {
+ inst.reloc.exp.X_op = O_constant;
+ inst.reloc.exp.X_add_number = 0;
+ }
}
}
[^:]+:13: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldraa x0,\[x1,#5555\]'
[^:]+:14: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldraa x0,\[x1,#-4104\]'
[^:]+:15: Error: 64-bit integer or SP register expected at operand 2 -- `ldraa x0,\[xz\]'
-[^:]+:16: Error: missing offset in the pre-indexed address at operand 2 -- `ldraa x0,\[x1\]!'
-[^:]+:17: Error: invalid expression in the address at operand 2 -- `ldraa x0,\[sp\],'
-[^:]+:18: Error: immediate value must be a multiple of 8 at operand 2 -- `ldraa x0,\[x1,#1\]!'
-[^:]+:19: Error: immediate value must be a multiple of 8 at operand 2 -- `ldraa x0,\[x1,#4\]!'
-[^:]+:20: Error: immediate value must be a multiple of 8 at operand 2 -- `ldraa x0,\[x1,#-10\]!'
-[^:]+:21: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldraa x0,\[x1,#4096\]!'
-[^:]+:22: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldraa x0,\[x1,#5555\]!'
-[^:]+:23: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldraa x0,\[x1,#-4104\]!'
-[^:]+:24: Error: 64-bit integer or SP register expected at operand 2 -- `ldraa x0,\[xz\]'
-[^:]+:25: Error: invalid addressing mode at operand 2 -- `ldraa x0,\[x1\],#8'
-[^:]+:28: Error: immediate value must be a multiple of 8 at operand 2 -- `ldrab x0,\[x1,#1\]'
-[^:]+:29: Error: immediate value must be a multiple of 8 at operand 2 -- `ldrab x0,\[x1,#4\]'
-[^:]+:30: Error: immediate value must be a multiple of 8 at operand 2 -- `ldrab x0,\[x1,#-10\]'
-[^:]+:31: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldrab x0,\[x1,#4096\]'
-[^:]+:32: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldrab x0,\[x1,#5555\]'
-[^:]+:33: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldrab x0,\[x1,#-4104\]'
-[^:]+:34: Error: 64-bit integer or SP register expected at operand 2 -- `ldrab x0,\[xz\]'
-[^:]+:35: Error: missing offset in the pre-indexed address at operand 2 -- `ldrab x0,\[x1\]!'
-[^:]+:36: Error: invalid expression in the address at operand 2 -- `ldrab x0,\[sp\],'
-[^:]+:37: Error: immediate value must be a multiple of 8 at operand 2 -- `ldrab x0,\[x1,#1\]!'
-[^:]+:38: Error: immediate value must be a multiple of 8 at operand 2 -- `ldrab x0,\[x1,#4\]!'
-[^:]+:39: Error: immediate value must be a multiple of 8 at operand 2 -- `ldrab x0,\[x1,#-10\]!'
-[^:]+:40: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldrab x0,\[x1,#4096\]!'
-[^:]+:41: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldrab x0,\[x1,#5555\]!'
-[^:]+:42: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldrab x0,\[x1,#-4104\]!'
-[^:]+:43: Error: 64-bit integer or SP register expected at operand 2 -- `ldrab x0,\[xz\]'
-[^:]+:44: Error: invalid addressing mode at operand 2 -- `ldrab x0,\[x1\],#8'
+[^:]+:16: Error: invalid expression in the address at operand 2 -- `ldraa x0,\[sp\],'
+[^:]+:17: Error: immediate value must be a multiple of 8 at operand 2 -- `ldraa x0,\[x1,#1\]!'
+[^:]+:18: Error: immediate value must be a multiple of 8 at operand 2 -- `ldraa x0,\[x1,#4\]!'
+[^:]+:19: Error: immediate value must be a multiple of 8 at operand 2 -- `ldraa x0,\[x1,#-10\]!'
+[^:]+:20: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldraa x0,\[x1,#4096\]!'
+[^:]+:21: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldraa x0,\[x1,#5555\]!'
+[^:]+:22: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldraa x0,\[x1,#-4104\]!'
+[^:]+:23: Error: 64-bit integer or SP register expected at operand 2 -- `ldraa x0,\[xz\]'
+[^:]+:24: Error: invalid addressing mode at operand 2 -- `ldraa x0,\[x1\],#8'
+[^:]+:27: Error: immediate value must be a multiple of 8 at operand 2 -- `ldrab x0,\[x1,#1\]'
+[^:]+:28: Error: immediate value must be a multiple of 8 at operand 2 -- `ldrab x0,\[x1,#4\]'
+[^:]+:29: Error: immediate value must be a multiple of 8 at operand 2 -- `ldrab x0,\[x1,#-10\]'
+[^:]+:30: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldrab x0,\[x1,#4096\]'
+[^:]+:31: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldrab x0,\[x1,#5555\]'
+[^:]+:32: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldrab x0,\[x1,#-4104\]'
+[^:]+:33: Error: 64-bit integer or SP register expected at operand 2 -- `ldrab x0,\[xz\]'
+[^:]+:34: Error: invalid expression in the address at operand 2 -- `ldrab x0,\[sp\],'
+[^:]+:35: Error: immediate value must be a multiple of 8 at operand 2 -- `ldrab x0,\[x1,#1\]!'
+[^:]+:36: Error: immediate value must be a multiple of 8 at operand 2 -- `ldrab x0,\[x1,#4\]!'
+[^:]+:37: Error: immediate value must be a multiple of 8 at operand 2 -- `ldrab x0,\[x1,#-10\]!'
+[^:]+:38: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldrab x0,\[x1,#4096\]!'
+[^:]+:39: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldrab x0,\[x1,#5555\]!'
+[^:]+:40: Error: immediate offset out of range -4096 to 4088 at operand 2 -- `ldrab x0,\[x1,#-4104\]!'
+[^:]+:41: Error: 64-bit integer or SP register expected at operand 2 -- `ldrab x0,\[xz\]'
+[^:]+:42: Error: invalid addressing mode at operand 2 -- `ldrab x0,\[x1\],#8'
ldraa x0, [x1,#5555]
ldraa x0, [x1,#-4104]
ldraa x0, [xz]
- ldraa x0, [x1]!
ldraa x0, [sp],
ldraa x0, [x1,#1]!
ldraa x0, [x1,#4]!
ldrab x0, [x1,#5555]
ldrab x0, [x1,#-4104]
ldrab x0, [xz]
- ldrab x0, [x1]!
ldrab x0, [sp],
ldrab x0, [x1,#1]!
ldrab x0, [x1,#4]!
--- /dev/null
+#as: -march=armv8.3-a
+#objdump: -dr
+
+.*: .*
+
+
+Disassembly of section \.text:
+
+0+ <.*>:
+.*: f8200c01 ldraa x1, \[x0]!
+.*: f8a00c02 ldrab x2, \[x0]!
+.*: f8200c01 ldraa x1, \[x0]!
+.*: f8a00c02 ldrab x2, \[x0]!
--- /dev/null
+.text
+
+ ldraa x1, [x0]!
+ ldrab x2, [x0]!
+
+ ldraa x1, [x0, #0]!
+ ldrab x2, [x0, #0]!
+2019-10-30 Delia Burduv <delia.burduv@arm.com>
+
+ * aarch64-opc.c (print_immediate_offset_address): Don't print the
+ immediate for the writeback form of ldraa/ldrab if it is 0.
+ * aarch64-tbl.h: Updated the documentation for ADDR_SIMM10.
+ * aarch64-opc-2.c: Regenerated.
+
2019-10-30 Jan Beulich <jbeulich@suse.com>
* i386-gen.c (operand_type_shorthands): Delete.
{AARCH64_OPND_CLASS_ADDRESS, "ADDR_SIMM7", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm7,FLD_index2}, "an address with 7-bit signed immediate offset"},
{AARCH64_OPND_CLASS_ADDRESS, "ADDR_SIMM9", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm9,FLD_index}, "an address with 9-bit signed immediate offset"},
{AARCH64_OPND_CLASS_ADDRESS, "ADDR_SIMM9_2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm9,FLD_index}, "an address with 9-bit negative or unaligned immediate offset"},
- {AARCH64_OPND_CLASS_ADDRESS, "ADDR_SIMM10", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_S_imm10,FLD_imm9,FLD_index}, "an address with 10-bit scaled, signed immediate offset"},
+ {AARCH64_OPND_CLASS_ADDRESS, "ADDR_SIMM10", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_S_imm10,FLD_imm9,FLD_index}, "an address with an optional 10-bit scaled, signed immediate offset"},
{AARCH64_OPND_CLASS_ADDRESS, "ADDR_SIMM11", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm7,FLD_index2}, "an address with 11-bit signed immediate (multiple of 16) offset"},
{AARCH64_OPND_CLASS_ADDRESS, "ADDR_UIMM12", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_imm12}, "an address with scaled, unsigned immediate offset"},
{AARCH64_OPND_CLASS_ADDRESS, "ADDR_SIMM13", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm9,FLD_index}, "an address with 13-bit signed immediate (multiple of 16) offset"},
if (opnd->addr.writeback)
{
if (opnd->addr.preind)
- snprintf (buf, size, "[%s, #%d]!", base, opnd->addr.offset.imm);
+ {
+ if (opnd->type == AARCH64_OPND_ADDR_SIMM10 && !opnd->addr.offset.imm)
+ snprintf (buf, size, "[%s]!", base);
+ else
+ snprintf (buf, size, "[%s, #%d]!", base, opnd->addr.offset.imm);
+ }
else
snprintf (buf, size, "[%s], #%d", base, opnd->addr.offset.imm);
}
Y(ADDRESS, addr_simm, "ADDR_SIMM9_2", 0, F(FLD_imm9,FLD_index), \
"an address with 9-bit negative or unaligned immediate offset") \
Y(ADDRESS, addr_simm10, "ADDR_SIMM10", 0, F(FLD_Rn,FLD_S_imm10,FLD_imm9,FLD_index),\
- "an address with 10-bit scaled, signed immediate offset") \
+ "an address with an optional 10-bit scaled, signed immediate offset") \
Y(ADDRESS, addr_simm, "ADDR_SIMM11", 0, F(FLD_imm7,FLD_index2),\
"an address with 11-bit signed immediate (multiple of 16) offset")\
Y(ADDRESS, addr_uimm12, "ADDR_UIMM12", 0, F(FLD_Rn,FLD_imm12), \
projects / binutils-gdb.git / commitdiff