aarch64: Mark PMSIDR_EL1 as read-only

We were incorrectly allowing writes to PMSIDR_EL1, which is
a read-only register.
[https://developer.arm.com/documentation/ddi0595/2021-09/AArch64-Registers/PMSIDR-EL1--Sampling-Profiling-ID-Register?lang=en]

opcodes/
	* aarch64-opc.c (aarch64_sys_regs): Make pmsidr_el1 as F_REG_READ.

gas/
	* testsuite/gas/aarch64/msr.s: Remove write to pmsidr_el1.
	* testsuite/gas/aarch64/msr.d: Update accordingly.
	* testsuite/gas/aarch64/illegal-sysreg-2.s,
	* testsuite/gas/aarch64/illegal-sysreg-2.d,
	* testsuite/gas/aarch64/illegal-sysreg-2.l: New test.

diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-2.d b/gas/testsuite/gas/aarch64/illegal-sysreg-2.d
new file mode 100644 (file)
index 0000000..bff7ea7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-sysreg-2.d
@@ -0,0 +1,2 @@
+#source: illegal-sysreg-2.s
+#warning_output: illegal-sysreg-2.l

diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-2.l b/gas/testsuite/gas/aarch64/illegal-sysreg-2.l
new file mode 100644 (file)
index 0000000..60aa5c2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-sysreg-2.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: specified register cannot be written to at operand 1 -- `msr pmsidr_el1,x0'

diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-2.s b/gas/testsuite/gas/aarch64/illegal-sysreg-2.s
new file mode 100644 (file)
index 0000000..f95584c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-sysreg-2.s
@@ -0,0 +1,3 @@
+/* Write to R/O system registers.  */
+.arch armv8.2-a+profile
+msr pmsidr_el1, x0

diff --git a/gas/testsuite/gas/aarch64/msr.d b/gas/testsuite/gas/aarch64/msr.d
index 4d5e630921a17cc483371e3b05d1f317d51c02b9..fedf2eecd0dbcd5142658b1d76dbe618a925ba0e 100644 (file)
--- a/gas/testsuite/gas/aarch64/msr.d
+++ b/gas/testsuite/gas/aarch64/msr.d
@@ -24,5 +24,4 @@ Disassembly of section \.text:
   3c:  d5300040        mrs     x0, osdtrrx_el1
   40:  d5100340        msr     osdtrtx_el1, x0
   44:  d5300340        mrs     x0, osdtrtx_el1
-  48:  d51899e0        msr     pmsidr_el1, x0
-  4c:  d53899e0        mrs     x0, pmsidr_el1
+  48:  d53899e0        mrs     x0, pmsidr_el1

diff --git a/gas/testsuite/gas/aarch64/msr.s b/gas/testsuite/gas/aarch64/msr.s
index 5e8ae850004bb8a5f0f0820a90afd8ce137f51d8..36ebfe441f40174b3bf3fccf19183b53977ab036 100644 (file)
--- a/gas/testsuite/gas/aarch64/msr.s
+++ b/gas/testsuite/gas/aarch64/msr.s
@@ -47,5 +47,4 @@ func:
        msr osdtrtx_el1, x0
        mrs x0, osdtrtx_el1
 
-       msr pmsidr_el1, x0
        mrs x0, pmsidr_el1

diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 714c705ea9172d4c81b8ec26741664974f4a81ed..372101a86a7a61899147921cd0513c5f970de5a2 100644 (file)
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -4346,7 +4346,7 @@ const aarch64_sys_reg aarch64_sys_regs [] =
   SR_PROFILE ("pmsfcr_el1",    CPENC (3,0,C9,C9,4),    0),
   SR_PROFILE ("pmsevfr_el1",   CPENC (3,0,C9,C9,5),    0),
   SR_PROFILE ("pmslatfr_el1",  CPENC (3,0,C9,C9,6),    0),
-  SR_PROFILE ("pmsidr_el1",    CPENC (3,0,C9,C9,7),    0),
+  SR_PROFILE ("pmsidr_el1",    CPENC (3,0,C9,C9,7),    F_REG_READ),
   SR_PROFILE ("pmscr_el2",     CPENC (3,4,C9,C9,0),    0),
   SR_PROFILE ("pmscr_el12",    CPENC (3,5,C9,C9,0),    0),
   SR_CORE ("pmcr_el0",         CPENC (3,3,C9,C12,0),   0),