re PR tree-optimization/89487 (ICE in expand_expr_addr_expr_1, at expr.c:7993)

	PR tree-optimization/89487
	* gcc.dg/tree-ssa/pr89487.c: Include ../pr87600.h.
	(caml_interprete): Ifdef the whole body out if REG1 or REG2 macros
	aren't defined.  Use REG1 instead of "%r15" and REG2 instead of
	"%r14".

From-SVN: r269388

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b9bfeced886778c40e05942fcdc94a8b620462dd..a019b6202be168a6f58d930fb42a57e3bb7e7472 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,11 @@
 2019-03-05  Jakub Jelinek  <jakub@redhat.com>
 
+       PR tree-optimization/89487
+       * gcc.dg/tree-ssa/pr89487.c: Include ../pr87600.h.
+       (caml_interprete): Ifdef the whole body out if REG1 or REG2 macros
+       aren't defined.  Use REG1 instead of "%r15" and REG2 instead of
+       "%r14".
+
        PR bootstrap/89560
        * g++.dg/other/pr89560.C: New test.
 

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr89487.c b/gcc/testsuite/gcc.dg/tree-ssa/pr89487.c
index a02419675ff5c6b83c02ef61d2e98ed77e26a851..974d005dcae289be4b9bcc44b5ab42076f494ae2 100644 (file)
--- a/gcc/testsuite/gcc.dg/tree-ssa/pr89487.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr89487.c
@@ -1,13 +1,18 @@
+/* PR tree-optimization/89487 */
 /* { dg-do compile } */
 /* { dg-options "-O2 -ftree-loop-distribution" } */
 
+#include "../pr87600.h"
+
 void
 caml_interprete (void)
 {
-  register int *pc asm("%r15");
-  register int *sp asm("%r14");
+#if defined(REG1) && defined(REG2)
+  register int *pc asm(REG1);
+  register int *sp asm(REG2);
   int i;
 
   for (i = 0; i < 3; ++i)
     *--sp = pc[i];
+#endif
 }