winsys/amdgpu: add REWIND emulation via INDIRECT_BUFFER into cs_check_space
authorMarek Olšák <marek.olsak@amd.com>
Thu, 4 Apr 2019 14:02:27 +0000 (10:02 -0400)
committerMarek Olšák <marek.olsak@amd.com>
Thu, 16 May 2019 17:10:07 +0000 (13:10 -0400)
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/drivers/r300/r300_blit.c
src/gallium/drivers/r300/r300_render.c
src/gallium/drivers/r600/r600_hw_context.c
src/gallium/drivers/r600/r600_pipe_common.c
src/gallium/drivers/radeon/radeon_winsys.h
src/gallium/drivers/radeonsi/si_dma_cs.c
src/gallium/drivers/radeonsi/si_gfx_cs.c
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
src/gallium/winsys/radeon/drm/radeon_drm_cs.c

index 01fccfbe7edf523d985e94d375e1cba6ac149eb2..4ac2589a9a716fc68782142f402fb97aaa858f27 100644 (file)
@@ -382,7 +382,7 @@ static void r300_clear(struct pipe_context* pipe,
             r300_get_num_cs_end_dwords(r300);
 
         /* Reserve CS space. */
-        if (!r300->rws->cs_check_space(r300->cs, dwords)) {
+        if (!r300->rws->cs_check_space(r300->cs, dwords, false)) {
             r300_flush(&r300->context, PIPE_FLUSH_ASYNC, NULL);
         }
 
index 211d35d06077bb9b57597ad8167d7b816477dee3..ed129e1a306c91031cbf49fb57407f394ee71727 100644 (file)
@@ -215,7 +215,7 @@ static boolean r300_reserve_cs_dwords(struct r300_context *r300,
     cs_dwords += r300_get_num_cs_end_dwords(r300);
 
     /* Reserve requested CS space. */
-    if (!r300->rws->cs_check_space(r300->cs, cs_dwords)) {
+    if (!r300->rws->cs_check_space(r300->cs, cs_dwords, false)) {
         r300_flush(&r300->context, PIPE_FLUSH_ASYNC, NULL);
         flushed = TRUE;
     }
index a2f5f637b20cf4f4153cc91bd42638aabf97ea82..abf5d03e4f9206fd38cb6491e61b2d8819bfb15c 100644 (file)
@@ -84,7 +84,7 @@ void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw,
        num_dw += 10;
 
        /* Flush if there's not enough space. */
-       if (!ctx->b.ws->cs_check_space(ctx->b.gfx.cs, num_dw)) {
+       if (!ctx->b.ws->cs_check_space(ctx->b.gfx.cs, num_dw, false)) {
                ctx->b.gfx.flush(ctx, PIPE_FLUSH_ASYNC, NULL);
        }
 }
index 664ca268b374b277a2600917db2a431edf237ef0..a90166148a1dce4e31df09e2dc2dbcf5e2ddf81a 100644 (file)
@@ -286,7 +286,7 @@ void r600_need_dma_space(struct r600_common_context *ctx, unsigned num_dw,
         * engine busy while uploads are being submitted.
         */
        num_dw++; /* for emit_wait_idle below */
-       if (!ctx->ws->cs_check_space(ctx->dma.cs, num_dw) ||
+       if (!ctx->ws->cs_check_space(ctx->dma.cs, num_dw, false) ||
            ctx->dma.cs->used_vram + ctx->dma.cs->used_gart > 64 * 1024 * 1024 ||
            !radeon_cs_memory_below_limit(ctx->screen, ctx->dma.cs, vram, gtt)) {
                ctx->dma.flush(ctx, PIPE_FLUSH_ASYNC, NULL);
index 770db2857d55032c0b5db5b071bb340ce1155802..5576a64f29b8ff019c318ca84fcf1e0609583958 100644 (file)
@@ -572,8 +572,12 @@ struct radeon_winsys {
      *
      * \param cs        A command stream.
      * \param dw        Number of CS dwords requested by the caller.
+     * \param force_chaining  Chain the IB into a new buffer now to discard
+     *                        the CP prefetch cache (to emulate PKT3_REWIND)
+     * \return true if there is enough space
      */
-    bool (*cs_check_space)(struct radeon_cmdbuf *cs, unsigned dw);
+    bool (*cs_check_space)(struct radeon_cmdbuf *cs, unsigned dw,
+                           bool force_chaining);
 
     /**
      * Return the buffer list.
index 8f2e15833b6796685f157f9dddfaf32ef4ea2d6e..8bc5d0ed209035e756da4cbb462a95e0418e6867 100644 (file)
@@ -164,7 +164,7 @@ void si_need_dma_space(struct si_context *ctx, unsigned num_dw,
         */
        num_dw++; /* for emit_wait_idle below */
        if (!ctx->sdma_uploads_in_progress &&
-           (!ws->cs_check_space(ctx->dma_cs, num_dw) ||
+           (!ws->cs_check_space(ctx->dma_cs, num_dw, false) ||
             ctx->dma_cs->used_vram + ctx->dma_cs->used_gart > 64 * 1024 * 1024 ||
             !radeon_cs_memory_below_limit(ctx->screen, ctx->dma_cs, vram, gtt))) {
                si_flush_dma_cs(ctx, PIPE_FLUSH_ASYNC, NULL);
index c81718950a4d2aa1d62e6c7647d8a4032e5f9dd0..121ab75c08b9bf49b7896e7e4420c3133d415766 100644 (file)
@@ -55,7 +55,7 @@ void si_need_gfx_cs_space(struct si_context *ctx)
        ctx->vram = 0;
 
        unsigned need_dwords = si_get_minimum_num_gfx_cs_dwords(ctx);
-       if (!ctx->ws->cs_check_space(cs, need_dwords))
+       if (!ctx->ws->cs_check_space(cs, need_dwords, false))
                si_flush_gfx_cs(ctx, RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW, NULL);
 }
 
index eb973bf8102262b9764dd4f821fde0e52c9c52ab..555150a7018a2e2166c49375766d3503dac46ce9 100644 (file)
@@ -1031,7 +1031,8 @@ static bool amdgpu_cs_validate(struct radeon_cmdbuf *rcs)
    return true;
 }
 
-static bool amdgpu_cs_check_space(struct radeon_cmdbuf *rcs, unsigned dw)
+static bool amdgpu_cs_check_space(struct radeon_cmdbuf *rcs, unsigned dw,
+                                  bool force_chaining)
 {
    struct amdgpu_ib *ib = amdgpu_ib(rcs);
    struct amdgpu_cs *cs = amdgpu_cs_from_ib(ib);
@@ -1048,16 +1049,21 @@ static bool amdgpu_cs_check_space(struct radeon_cmdbuf *rcs, unsigned dw)
    ib->max_check_space_size = MAX2(ib->max_check_space_size,
                                    safe_byte_size);
 
-   if (requested_size > amdgpu_ib_max_submit_dwords(ib->ib_type))
-      return false;
+   /* If force_chaining is true, we can't return. We have to chain. */
+   if (!force_chaining) {
+      if (requested_size > amdgpu_ib_max_submit_dwords(ib->ib_type))
+         return false;
 
-   ib->max_ib_size = MAX2(ib->max_ib_size, requested_size);
+      ib->max_ib_size = MAX2(ib->max_ib_size, requested_size);
 
-   if (rcs->current.max_dw - rcs->current.cdw >= dw)
-      return true;
+      if (rcs->current.max_dw - rcs->current.cdw >= dw)
+         return true;
+   }
 
-   if (!amdgpu_cs_has_chaining(cs))
+   if (!amdgpu_cs_has_chaining(cs)) {
+      assert(!force_chaining);
       return false;
+   }
 
    /* Allocate a new chunk */
    if (rcs->num_prev >= rcs->max_prev) {
index 670d2f57de6e74eb26172162cb771ab4a14c4d78..7de748a4affab5c6dfe1fb914a4057b62b952d91 100644 (file)
@@ -424,7 +424,8 @@ static bool radeon_drm_cs_validate(struct radeon_cmdbuf *rcs)
     return status;
 }
 
-static bool radeon_drm_cs_check_space(struct radeon_cmdbuf *rcs, unsigned dw)
+static bool radeon_drm_cs_check_space(struct radeon_cmdbuf *rcs, unsigned dw,
+                                      bool force_chaining)
 {
    assert(rcs->current.cdw <= rcs->current.max_dw);
    return rcs->current.max_dw - rcs->current.cdw >= dw;