nv50: Fix tiling mode for lower mipmap levels.

diff --git a/src/gallium/drivers/nv50/nv50_miptree.c b/src/gallium/drivers/nv50/nv50_miptree.c
index 03b9243b828fb28a792332fbf8ed34b2d9ee41e1..93479a0314a2c2279ead0ea25183d44166fad27b 100644 (file)
--- a/src/gallium/drivers/nv50/nv50_miptree.c
+++ b/src/gallium/drivers/nv50/nv50_miptree.c
@@ -148,6 +148,7 @@ nv50_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt,
        mt->image_nr = 1;
        mt->level[0].pitch = *stride;
        mt->level[0].image_offset = CALLOC(1, sizeof(unsigned));
+       mt->level[0].tile_mode = bo->tile_mode;
 
        nouveau_bo_ref(bo, &mt->base.bo);
        return &mt->base.base;

diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c
index 344c2cf6ddec81761b424a80560c414f724ea8fa..d294356f75d5561c925179db868cb8d3dbefa35c 100644 (file)
--- a/src/gallium/drivers/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nv50/nv50_state_validate.c
@@ -66,7 +66,8 @@ nv50_state_validate_fb(struct nv50_context *nv50)
                        so_data(so, NV50TCL_RT_FORMAT_X8R8G8B8_UNORM);
                        break;
                }
-               so_data(so, bo->tile_mode << 4);
+               so_data(so, nv50_miptree(pt)->
+                               level[fb->cbufs[i]->level].tile_mode << 4);
                so_data(so, 0x00000000);
 
                so_method(so, tesla, 0x1224, 1);
@@ -110,7 +111,8 @@ nv50_state_validate_fb(struct nv50_context *nv50)
                        so_data(so, NV50TCL_ZETA_FORMAT_S8Z24_UNORM);
                        break;
                }
-               so_data(so, bo->tile_mode << 4);
+               so_data(so, nv50_miptree(pt)->
+                               level[fb->zsbuf->level].tile_mode << 4);
                so_data(so, 0x00000000);
 
                so_method(so, tesla, 0x1538, 1);

diff --git a/src/gallium/drivers/nv50/nv50_surface.c b/src/gallium/drivers/nv50/nv50_surface.c
index b266324f58d7d40b30278c6acd625e0ad41d4ef3..6bf6f773b0c26b075282175c1d3292a1e3ddd753 100644 (file)
--- a/src/gallium/drivers/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nv50/nv50_surface.c
@@ -60,13 +60,13 @@ nv50_surface_set(struct nv50_screen *screen, struct pipe_surface *ps, int dst)
        format = nv50_format(ps->format);
        if (format < 0)
                return 1;
-  
+
        if (!bo->tile_flags) {
                BEGIN_RING(chan, eng2d, mthd, 2);
                OUT_RING  (chan, format);
                OUT_RING  (chan, 1);
                BEGIN_RING(chan, eng2d, mthd + 0x14, 5);
-               OUT_RING  (chan, mt->level[0].pitch);
+               OUT_RING  (chan, mt->level[ps->level].pitch);
                OUT_RING  (chan, ps->width);
                OUT_RING  (chan, ps->height);
                OUT_RELOCh(chan, bo, ps->offset, flags);
@@ -75,7 +75,7 @@ nv50_surface_set(struct nv50_screen *screen, struct pipe_surface *ps, int dst)
                BEGIN_RING(chan, eng2d, mthd, 5);
                OUT_RING  (chan, format);
                OUT_RING  (chan, 0);
-               OUT_RING  (chan, bo->tile_mode << 4);
+               OUT_RING  (chan, mt->level[ps->level].tile_mode << 4);
                OUT_RING  (chan, 1);
                OUT_RING  (chan, 0);
                BEGIN_RING(chan, eng2d, mthd + 0x18, 4);