AVX-512. Use `Yv' for SF mode operand in vec_concat pattern.

gcc/
	* config/i386/sse.md (define_insn "*vec_concatv2sf_sse4_1"): Use 'Yv'
	constraint fot SF mode.

From-SVN: r236363

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8aaaa816ebba8113069c83763848508598346994..c5376a102a352fa2886df308805a68444670e6dd 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-05-18  Kirill Yukhin  <kirill.yukhin@intel.com>
+
+       * config/i386/sse.md (define_insn "*vec_concatv2sf_sse4_1"): Use 'Yv'
+       constraint fot SF mode.
+
 2016-05-18  Petr Murzin  <petr.murzin@intel.com>
            Kirill Yukhin  <kirill.yukhin@intel.com>
 

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index e0af4916bc82b9a0e817e7a79cbd1c4aa95d22a2..a8492c7d61a3f05aad06d5cc0564d3b484db57bb 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -6546,12 +6546,12 @@
 ;; unpcklps with register source since it is shorter.
 (define_insn "*vec_concatv2sf_sse4_1"
   [(set (match_operand:V2SF 0 "register_operand"
-         "=Yr,*x,v,Yr,*x,v,v,*y ,*y")
+         "=Yr,*x, v,Yr,*x,v,v,*y ,*y")
        (vec_concat:V2SF
          (match_operand:SF 1 "nonimmediate_operand"
-         "  0, 0,v, 0,0, v,m, 0 , m")
+         "  0, 0,Yv, 0,0, v,m, 0 , m")
          (match_operand:SF 2 "vector_move_operand"
-         " Yr,*x,v, m,m, m,C,*ym, C")))]
+         " Yr,*x,Yv, m,m, m,C,*ym, C")))]
   "TARGET_SSE4_1 && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
   "@
    unpcklps\t{%2, %0|%0, %2}