Fix Turbo's LPRng compilation failure due to assembler errors.

	* ia64.c (ia64_print_operand, case 'r'): Correct comment.  Handle
	CONST_INT.
	* ia64.md (cmpsi_adjusted): Use %r3.
	(cmpdi_adjusted): Likewise.

From-SVN: r37025

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0215dd99675b3ebf36f89bb701874c052ad3bf76..4ed9cd34a1b17819a7264668fd9b720fbc9fd81c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2000-10-23  Jim Wilson  <wilson@cygnus.com>
+
+       * ia64.c (ia64_print_operand, case 'r'): Correct comment.  Handle
+       CONST_INT.
+       * ia64.md (cmpsi_adjusted): Use %r3.
+       (cmpdi_adjusted): Likewise.
+
 2000-10-23  Diego Novillo  <dnovillo@cygnus.com>
 
        * config/i386/att.h (ASM_FILE_START): Define.

diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 2026e9999b64446dbc89563fac83ae40e933da92..6d13ef8c7ef9772852ec380b78f1b218620cde4c 100644 (file)
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -3261,11 +3261,14 @@ ia64_print_operand (file, x, code)
       break;
 
     case 'r':
-      /* If this operand is the constant zero, write it as zero.  */
+      /* If this operand is the constant zero, write it as register zero.
+        Any register, zero, or CONST_INT value is OK here.  */
       if (GET_CODE (x) == REG)
        fputs (reg_names[REGNO (x)], file);
       else if (x == CONST0_RTX (GET_MODE (x)))
        fputs ("r0", file);
+      else if (GET_CODE (x) == CONST_INT)
+       output_addr_const (file, x);
       else
        output_operand_lossage ("invalid %%r value");
       return;

diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md
index 022161b8654185a5e7165ad69f159588320a0f3d..cf6fdd2aec94e4bde19304f2ead424d7ea987481 100644 (file)
--- a/gcc/config/ia64/ia64.md
+++ b/gcc/config/ia64/ia64.md
@@ -4200,13 +4200,16 @@
   "cmp4.%C1 %0, %I0 = %3, %2"
   [(set_attr "type" "A")])
 
+;; We use %r3 because it is possible for us to match a 0, and two of the
+;; unsigned comparisons don't accept immediate operands of zero.
+
 (define_insn "*cmpsi_adjusted"
   [(set (match_operand:BI 0 "register_operand" "=c")
        (match_operator:BI 1 "adjusted_comparison_operator"
           [(match_operand:SI 2 "gr_register_operand" "r")
            (match_operand:SI 3 "gr_reg_or_8bit_adjusted_operand" "rL")]))]
   ""
-  "cmp4.%C1 %0, %I0 = %3, %2"
+  "cmp4.%C1 %0, %I0 = %r3, %2"
   [(set_attr "type" "A")])
 
 (define_insn "*cmpdi_normal"
@@ -4218,13 +4221,16 @@
   "cmp.%C1 %0, %I0 = %3, %r2"
   [(set_attr "type" "A")])
 
+;; We use %r3 because it is possible for us to match a 0, and two of the
+;; unsigned comparisons don't accept immediate operands of zero.
+
 (define_insn "*cmpdi_adjusted"
   [(set (match_operand:BI 0 "register_operand" "=c")
        (match_operator:BI 1 "adjusted_comparison_operator"
           [(match_operand:DI 2 "gr_register_operand" "r")
            (match_operand:DI 3 "gr_reg_or_8bit_adjusted_operand" "rL")]))]
   ""
-  "cmp.%C1 %0, %I0 = %3, %2"
+  "cmp.%C1 %0, %I0 = %r3, %2"
   [(set_attr "type" "A")])
 
 (define_insn "*cmpsf_internal"