+2009-11-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/lock-1.s: Add cmpxchg16b test.
+ * gas/i386/lock-1-intel.d: Updated.
+ * gas/i386/lock-1.d: Likewise.
+
2009-11-19 Nick Clifton <nickc@redhat.com>
PR binutils/10924
[ ]*[a-f0-9]+: f0 0f ba 2b 64 lock bts DWORD PTR \[rbx\],0x64
[ ]*[a-f0-9]+: f0 0f b1 03 lock cmpxchg DWORD PTR \[rbx\],eax
[ ]*[a-f0-9]+: f0 0f c7 0b lock cmpxchg8b QWORD PTR \[rbx\]
+[ ]*[a-f0-9]+: f0 48 0f c7 0b lock cmpxchg16b OWORD PTR \[rbx\]
[ ]*[a-f0-9]+: f0 ff 0b lock dec DWORD PTR \[rbx\]
[ ]*[a-f0-9]+: f0 ff 03 lock inc DWORD PTR \[rbx\]
[ ]*[a-f0-9]+: f0 f7 1b lock neg DWORD PTR \[rbx\]
[ ]*[a-f0-9]+: f0 0f ba 2b 64 lock bts DWORD PTR \[rbx\],0x64
[ ]*[a-f0-9]+: f0 0f b1 03 lock cmpxchg DWORD PTR \[rbx\],eax
[ ]*[a-f0-9]+: f0 0f c7 0b lock cmpxchg8b QWORD PTR \[rbx\]
+[ ]*[a-f0-9]+: f0 48 0f c7 0b lock cmpxchg16b OWORD PTR \[rbx\]
[ ]*[a-f0-9]+: f0 ff 0b lock dec DWORD PTR \[rbx\]
[ ]*[a-f0-9]+: f0 ff 03 lock inc DWORD PTR \[rbx\]
[ ]*[a-f0-9]+: f0 f7 1b lock neg DWORD PTR \[rbx\]
[ ]*[a-f0-9]+: f0 0f ba 2b 64 lock btsl \$0x64,\(%rbx\)
[ ]*[a-f0-9]+: f0 0f b1 03 lock cmpxchg %eax,\(%rbx\)
[ ]*[a-f0-9]+: f0 0f c7 0b lock cmpxchg8b \(%rbx\)
+[ ]*[a-f0-9]+: f0 48 0f c7 0b lock cmpxchg16b \(%rbx\)
[ ]*[a-f0-9]+: f0 ff 0b lock decl \(%rbx\)
[ ]*[a-f0-9]+: f0 ff 03 lock incl \(%rbx\)
[ ]*[a-f0-9]+: f0 f7 1b lock negl \(%rbx\)
[ ]*[a-f0-9]+: f0 0f ba 2b 64 lock btsl \$0x64,\(%rbx\)
[ ]*[a-f0-9]+: f0 0f b1 03 lock cmpxchg %eax,\(%rbx\)
[ ]*[a-f0-9]+: f0 0f c7 0b lock cmpxchg8b \(%rbx\)
+[ ]*[a-f0-9]+: f0 48 0f c7 0b lock cmpxchg16b \(%rbx\)
[ ]*[a-f0-9]+: f0 ff 0b lock decl \(%rbx\)
[ ]*[a-f0-9]+: f0 ff 03 lock incl \(%rbx\)
[ ]*[a-f0-9]+: f0 f7 1b lock negl \(%rbx\)
lock bts $0x64, (%rbx)
lock cmpxchg %eax,(%rbx)
lock cmpxchg8b (%rbx)
+ lock cmpxchg16b (%rbx)
lock decl (%rbx)
lock incl (%rbx)
lock negl (%rbx)
lock bts DWORD PTR [rbx],0x64
lock cmpxchg DWORD PTR [rbx],eax
lock cmpxchg8b QWORD PTR [rbx]
+ lock cmpxchg16b OWORD PTR [rbx]
lock dec DWORD PTR [rbx]
lock inc DWORD PTR [rbx]
lock neg DWORD PTR [rbx]
+2009-11-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.tbl: Add IsLockable to cmpxch16b.
+ * i386-tbl.h: Regenerated.
+
2009-11-19 Nick Clifton <nickc@redhat.com>
PR binutils/10924
addsubpd, 2, 0x660fd0, None, 2, CpuSSE3, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
addsubps, 2, 0xf2d0, None, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
addsubps, 2, 0xf20fd0, None, 2, CpuSSE3, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
-cmpxchg16b, 1, 0xfc7, 0x1, 2, CpuSSE3|Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64|NoAVX, { Oword|Unspecified|BaseIndex|Disp8|Disp32|Disp32S }
+cmpxchg16b, 1, 0xfc7, 0x1, 2, CpuSSE3|Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64|NoAVX|IsLockable, { Oword|Unspecified|BaseIndex|Disp8|Disp32|Disp32S }
fisttp, 1, 0xdf, 0x1, 1, CpuFISTTP, Modrm|FloatMF|No_bSuf|No_wSuf|No_qSuf|No_ldSuf|NoAVX, { Word|Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
fisttp, 1, 0xdd, 0x1, 1, CpuFISTTP, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|NoAVX, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
fisttpll, 1, 0xdd, 0x1, 1, CpuFISTTP, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoAVX, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 1, 0, 0 } },
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,
- 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
+ 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 },
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,