i386: Also disable AVX512IFMA/AVX5124FMAPS/AVX5124VNNIW
authorH.J. Lu <hongjiu.lu@intel.com>
Sun, 14 Oct 2018 20:30:02 +0000 (20:30 +0000)
committerH.J. Lu <hjl@gcc.gnu.org>
Sun, 14 Oct 2018 20:30:02 +0000 (13:30 -0700)
Also disable AVX512IFMA, AVX5124FMAPS and AVX5124VNNIW when disabling
AVX512F.

gcc/

PR target/87572
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512F_UNSET):
Add OPTION_MASK_ISA_AVX512IFMA_UNSET,
OPTION_MASK_ISA_AVX5124FMAPS_UNSET and
OPTION_MASK_ISA_AVX5124VNNIW_UNSET.

gcc/testsuite/

PR target/87572
* gcc.target/i386/pr87572.c: New test.

From-SVN: r265150

gcc/ChangeLog
gcc/common/config/i386/i386-common.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/i386/pr87572.c [new file with mode: 0644]

index 49770e78a8539480743ada9f6ac5155a82b4930a..e6c6dbcbcad506f6ef3d4504515924f651dfbfb7 100644 (file)
@@ -1,3 +1,11 @@
+2018-10-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/87572
+       * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512F_UNSET):
+       Add OPTION_MASK_ISA_AVX512IFMA_UNSET,
+       OPTION_MASK_ISA_AVX5124FMAPS_UNSET and
+       OPTION_MASK_ISA_AVX5124VNNIW_UNSET.
+
 2018-10-13  Eric Botcazou  <ebotcazou@adacore.com>
 
        * dwarf2cfi.c (struct dw_trace_info): Add args_size_defined_for_eh.
index 3b5312d7250941b05c8eae6fe958d0f526976d30..36ef999df83edd2f724b2783f9c127492b91a373 100644 (file)
@@ -194,8 +194,12 @@ along with GCC; see the file COPYING3.  If not see
   (OPTION_MASK_ISA_AVX512F | OPTION_MASK_ISA_AVX512CD_UNSET \
    | OPTION_MASK_ISA_AVX512PF_UNSET | OPTION_MASK_ISA_AVX512ER_UNSET \
    | OPTION_MASK_ISA_AVX512DQ_UNSET | OPTION_MASK_ISA_AVX512BW_UNSET \
-   | OPTION_MASK_ISA_AVX512VL_UNSET | OPTION_MASK_ISA_AVX512VBMI2_UNSET \
-   | OPTION_MASK_ISA_AVX512VNNI_UNSET | OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET \
+   | OPTION_MASK_ISA_AVX512VL_UNSET | OPTION_MASK_ISA_AVX512IFMA_UNSET \
+   | OPTION_MASK_ISA_AVX5124FMAPS_UNSET \
+   | OPTION_MASK_ISA_AVX5124VNNIW_UNSET \
+   | OPTION_MASK_ISA_AVX512VBMI2_UNSET \
+   | OPTION_MASK_ISA_AVX512VNNI_UNSET \
+   | OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET \
    | OPTION_MASK_ISA_AVX512BITALG_UNSET)
 #define OPTION_MASK_ISA_AVX512CD_UNSET OPTION_MASK_ISA_AVX512CD
 #define OPTION_MASK_ISA_AVX512PF_UNSET OPTION_MASK_ISA_AVX512PF
index ad5c0e17eb73a80c541611176c2baeb2ef2d250f..d8fbbccabe54ee06a18afde8a8fcf81a86d6832b 100644 (file)
@@ -1,3 +1,8 @@
+2018-10-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/87572
+       * gcc.target/i386/pr87572.c: New test.
+
 2018-10-14  Paul Thomas  <pault@gcc.gnu.org>
 
        PR fortran/83146
diff --git a/gcc/testsuite/gcc.target/i386/pr87572.c b/gcc/testsuite/gcc.target/i386/pr87572.c
new file mode 100644 (file)
index 0000000..ea1beb7
--- /dev/null
@@ -0,0 +1,10 @@
+/* PR target/82483 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512ifma -mno-sse2 -w -Wno-psabi" } */
+
+typedef long long __m512i __attribute__((__vector_size__(64)));
+__m512i
+foo (__m512i c, __m512i d, __m512i e, int b)
+{
+  return __builtin_ia32_vpmadd52huq512_maskz (c, d, e, b); /* { dg-error "incompatible types" } */
+}