fixed error
authorMiodrag Milanovic <mmicko@gmail.com>
Fri, 18 Oct 2019 11:15:36 +0000 (13:15 +0200)
committerMiodrag Milanovic <mmicko@gmail.com>
Fri, 18 Oct 2019 11:15:36 +0000 (13:15 +0200)
tests/arch/common/counter.v

index 97604d3d886ac1cda855b331c661adb1b6af0299..9746fd701319a77ae4ea3c08bc8c0d37ee1fd28a 100644 (file)
@@ -6,6 +6,6 @@ module top ( out, clk, reset );
     always @(posedge clk, posedge reset)\r
       if (reset)\r
           out <= 8'b0;\r
-      end\r
+      else\r
           out <= out + 1;\r
 endmodule\r