The AuxVector class is responsible for holding Process data.
The data that it holds is normally setup by an OS kernel in
the process address space. The purpose behind doing this is
to pass in information that the process will need for various
reasons. (Check out the enum in the header file for an idea of
what the AuxVector holds.)
The AuxVector struct was changed into a class and encapsulation
methods were added to protect access to the member variables.
The host ISA may have a different endianness than the simulated
ISA. Since data is passed between the process address space and
the simulator for auxiliary vectors, we need to worry about
maintaining endianness for the right context.
Change-Id: I32c5ac4b679559886e1efeb4b5483b92dfc94af9
Reviewed-on: https://gem5-review.googlesource.com/12109
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
//Copy the aux stuff
for (vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) {
initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
- (uint8_t*)&(auxv[x].a_type), intSize);
+ (uint8_t*)&(auxv[x].getAuxType()), intSize);
initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
- (uint8_t*)&(auxv[x].a_val), intSize);
+ (uint8_t*)&(auxv[x].getAuxVal()), intSize);
}
ThreadContext *tc = system->getThreadContext(contextIds[0]);
//Fix up the aux vectors which point to other data
for (int i = auxv.size() - 1; i >= 0; i--) {
- if (auxv[i].a_type == M5_AT_PLATFORM) {
- auxv[i].a_val = platform_base;
+ if (auxv[i].getHostAuxType() == M5_AT_PLATFORM) {
+ auxv[i].setAuxVal(platform_base);
initVirtMem.writeString(platform_base, platform.c_str());
- } else if (auxv[i].a_type == M5_AT_EXECFN) {
- auxv[i].a_val = aux_data_base;
+ } else if (auxv[i].getHostAuxType() == M5_AT_EXECFN) {
+ auxv[i].setAuxVal(aux_data_base);
initVirtMem.writeString(aux_data_base, filename.c_str());
- } else if (auxv[i].a_type == M5_AT_RANDOM) {
- auxv[i].a_val = aux_random_base;
+ } else if (auxv[i].getHostAuxType() == M5_AT_RANDOM) {
+ auxv[i].setAuxVal(aux_random_base);
// Just leave the value 0, we don't want randomness
}
}
//Copy the aux stuff
for (int x = 0; x < auxv.size(); x++) {
initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
- (uint8_t*)&(auxv[x].a_type), intSize);
+ (uint8_t*)&(auxv[x].getAuxType()),
+ intSize);
initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
- (uint8_t*)&(auxv[x].a_val), intSize);
+ (uint8_t*)&(auxv[x].getAuxVal()),
+ intSize);
}
//Write out the terminating zeroed auxilliary vector
const uint64_t zero = 0;
// Copy the aux vector
for (typename vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) {
initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
- (uint8_t*)&(auxv[x].a_type), intSize);
+ (uint8_t*)&(auxv[x].getAuxType()), intSize);
initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
- (uint8_t*)&(auxv[x].a_val), intSize);
+ (uint8_t*)&(auxv[x].getAuxVal()), intSize);
}
// Write out the terminating zeroed auxilliary vector
//Fix up the aux vectors which point to other data
for (int i = auxv.size() - 1; i >= 0; i--) {
- if (auxv[i].a_type == M5_AT_PLATFORM) {
- auxv[i].a_val = platform_base;
+ if (auxv[i].getHostAuxType() == M5_AT_PLATFORM) {
+ auxv[i].setAuxVal(platform_base);
initVirtMem.writeString(platform_base, platform.c_str());
- } else if (auxv[i].a_type == M5_AT_EXECFN) {
- auxv[i].a_val = aux_data_base;
+ } else if (auxv[i].getHostAuxType() == M5_AT_EXECFN) {
+ auxv[i].setAuxVal(aux_data_base);
initVirtMem.writeString(aux_data_base, filename.c_str());
}
}
for (int x = 0; x < auxv.size(); x++)
{
initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
- (uint8_t*)&(auxv[x].a_type), intSize);
+ (uint8_t*)&(auxv[x].getAuxType()), intSize);
initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
- (uint8_t*)&(auxv[x].a_val), intSize);
+ (uint8_t*)&(auxv[x].getAuxVal()), intSize);
}
//Write out the terminating zeroed auxilliary vector
const uint64_t zero = 0;
};
for (const AuxVector<IntType>& aux: auxv) {
DPRINTF(Stack, "Wrote aux key %s to address %p\n",
- aux_keys[aux.a_type], (void*)sp);
- pushOntoStack((uint8_t*)&aux.a_type, sizeof(IntType));
+ aux_keys[aux.getAuxType()], (void*)sp);
+ pushOntoStack((uint8_t*)&aux.getAuxType(), sizeof(IntType));
DPRINTF(Stack, "Wrote aux value %x to address %p\n",
- aux.a_val, (void*)sp);
- pushOntoStack((uint8_t*)&aux.a_val, sizeof(IntType));
+ aux.getAuxVal(), (void*)sp);
+ pushOntoStack((uint8_t*)&aux.getAuxVal(), sizeof(IntType));
}
ThreadContext *tc = system->getThreadContext(contextIds[0]);
// Copy the aux stuff
for (int x = 0; x < auxv.size(); x++) {
initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
- (uint8_t*)&(auxv[x].a_type), intSize);
+ (uint8_t*)&(auxv[x].getAuxType()), intSize);
initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
- (uint8_t*)&(auxv[x].a_val), intSize);
+ (uint8_t*)&(auxv[x].getAuxVal()), intSize);
}
// Write out the terminating zeroed auxilliary vector
initVirtMem.writeString(file_name_base, filename.c_str());
// Fix up the aux vectors which point to data
- assert(auxv[auxv.size() - 3].a_type == M5_AT_RANDOM);
- auxv[auxv.size() - 3].a_val = aux_data_base;
- assert(auxv[auxv.size() - 2].a_type == M5_AT_EXECFN);
- auxv[auxv.size() - 2].a_val = argv_array_base;
- assert(auxv[auxv.size() - 1].a_type == M5_AT_PLATFORM);
- auxv[auxv.size() - 1].a_val = aux_data_base + numRandomBytes;
+ assert(auxv[auxv.size() - 3].getHostAuxType() == M5_AT_RANDOM);
+ auxv[auxv.size() - 3].setAuxVal(aux_data_base);
+ assert(auxv[auxv.size() - 2].getHostAuxType() == M5_AT_EXECFN);
+ auxv[auxv.size() - 2].setAuxVal(argv_array_base);
+ assert(auxv[auxv.size() - 1].getHostAuxType() == M5_AT_PLATFORM);
+ auxv[auxv.size() - 1].setAuxVal(aux_data_base + numRandomBytes);
// Copy the aux stuff
for (int x = 0; x < auxv.size(); x++) {
initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
- (uint8_t*)&(auxv[x].a_type), intSize);
+ (uint8_t*)&(auxv[x].getAuxType()),
+ intSize);
initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
- (uint8_t*)&(auxv[x].a_val), intSize);
+ (uint8_t*)&(auxv[x].getAuxVal()),
+ intSize);
}
// Write out the terminating zeroed auxiliary vector
const uint64_t zero = 0;
template<class IntType>
AuxVector<IntType>::AuxVector(IntType type, IntType val)
+ : _auxType(TheISA::htog(type)), _auxVal(TheISA::htog(val)),
+ _auxHostType(type), _auxHostVal(val)
+{ }
+
+template<class IntType>
+inline void
+AuxVector<IntType>::setAuxType(IntType type)
+{
+ _auxType = TheISA::htog(type);
+ _auxHostType = type;
+}
+
+template<class IntType>
+inline void
+AuxVector<IntType>::setAuxVal(IntType val)
{
- a_type = TheISA::htog(type);
- a_val = TheISA::htog(val);
+ _auxVal = TheISA::htog(val);
+ _auxHostVal = val;
}
-template struct AuxVector<uint32_t>;
-template struct AuxVector<uint64_t>;
+template class AuxVector<uint32_t>;
+template class AuxVector<uint64_t>;
#define __AUX_VECTOR_HH__
template<class IntType>
-struct AuxVector
+class AuxVector
{
- IntType a_type;
- IntType a_val;
+ public:
+ AuxVector() = default;
+ AuxVector(IntType type, IntType val);
- AuxVector()
- {}
+ IntType const& getAuxType() const { return _auxType; }
+ IntType const& getAuxVal() const { return _auxVal; }
+ IntType const& getHostAuxType() const { return _auxHostType; }
+ IntType const& getHostAuxVal() const { return _auxHostVal; }
- AuxVector(IntType type, IntType val);
+ void setAuxType(IntType type);
+ void setAuxVal(IntType val);
+
+ private:
+ IntType _auxType = 0;
+ IntType _auxVal = 0;
+ IntType _auxHostType = 0;
+ IntType _auxHostVal = 0;
};
enum AuxiliaryVectorType {
- M5_AT_NULL = 0,
- M5_AT_IGNORE = 1,
- M5_AT_EXECFD = 2,
- M5_AT_PHDR = 3,
- M5_AT_PHENT = 4,
- M5_AT_PHNUM = 5,
- M5_AT_PAGESZ = 6,
- M5_AT_BASE = 7,
- M5_AT_FLAGS = 8,
- M5_AT_ENTRY = 9,
- M5_AT_NOTELF = 10,
- M5_AT_UID = 11,
- M5_AT_EUID = 12,
- M5_AT_GID = 13,
- M5_AT_EGID = 14,
- M5_AT_PLATFORM = 15,
- M5_AT_HWCAP = 16,
- M5_AT_CLKTCK = 17,
- M5_AT_SECURE = 23,
- M5_BASE_PLATFORM = 24,
- M5_AT_RANDOM = 25,
- M5_AT_EXECFN = 31,
+ M5_AT_NULL = 0, // End of vector.
+ M5_AT_IGNORE = 1, // Ignored.
+ M5_AT_EXECFD = 2, // File descriptor of program if interpreter used.
+ M5_AT_PHDR = 3, // Address of program header tables in memory.
+ M5_AT_PHENT = 4, // Size in bytes of one program header entry.
+ M5_AT_PHNUM = 5, // Number of entries in program header table.
+ M5_AT_PAGESZ = 6, // System page size.
+ M5_AT_BASE = 7, // Base address of interpreter program in memory.
+ M5_AT_FLAGS = 8, // Unused.
+ M5_AT_ENTRY = 9, // Entry point of program after interpreter setup.
+ M5_AT_NOTELF = 10, // Non-zero if format is different than ELF.
+ M5_AT_UID = 11, // Address of real user ID of thread.
+ M5_AT_EUID = 12, // Address of effective user ID of thread.
+ M5_AT_GID = 13, // Address of real group ID of thread.
+ M5_AT_EGID = 14, // Address of effective group ID of thread.
+ M5_AT_PLATFORM = 15, // Platform string for the architecture.
+ M5_AT_HWCAP = 16, // Bits which describe the hardware capabilities.
+ M5_AT_CLKTCK = 17, // Frequency at which times() syscall increments.
+ M5_AT_SECURE = 23, // Whether to enable "secure mode" in executable.
+ M5_BASE_PLATFORM = 24, // Platform string (differs on PowerPC only).
+ M5_AT_RANDOM = 25, // Pointer to 16 bytes of random data.
+ M5_AT_HWCAP2 = 26, // Extension of AT_HWCAP.
+ M5_AT_EXECFN = 31, // Filename of the program.
M5_AT_VECTOR_SIZE = 44
};
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