[ARM/FDPIC v6 15/24] [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
authorChristophe Lyon <christophe.lyon@st.com>
Tue, 10 Sep 2019 08:02:38 +0000 (10:02 +0200)
committerChristophe Lyon <clyon@gcc.gnu.org>
Tue, 10 Sep 2019 08:02:38 +0000 (10:02 +0200)
In FDPIC mode, r9 is saved in addition to other registers, so update
the expected patterns accordingly.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>

gcc/testsuite/
* gcc.target/arm/interrupt-1.c: Add scan-assembler pattern for
arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/interrupt-2.c: Likewise.
* gcc.target/arm/pr70830.c: Likewise.

Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
From-SVN: r275577

gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/arm/interrupt-1.c
gcc/testsuite/gcc.target/arm/interrupt-2.c
gcc/testsuite/gcc.target/arm/pr70830.c

index 9b96065701742f1824e723d9237f702da2250892..6c94bea6131a61eb73072847b0c9acc183951a42 100644 (file)
@@ -1,3 +1,11 @@
+2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
+       Mickaël Guêné <mickael.guene@st.com>
+
+       * gcc.target/arm/interrupt-1.c: Add scan-assembler pattern for
+       arm*-*-uclinuxfdpiceabi.
+       * gcc.target/arm/interrupt-2.c: Likewise.
+       * gcc.target/arm/pr70830.c: Likewise.
+
 2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
        Mickaël Guêné <mickael.guene@st.com>
 
index fe94877cead7501dd73f2eba92feff395de9df2f..493763d7d4c99829c5a61b539f67a5ade65d05a9 100644 (file)
@@ -13,5 +13,7 @@ void foo ()
   bar (0);
 }
 
-/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, fp, ip, lr}" } } */
-/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, pc}\\^" } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, fp, ip, lr}" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, r9, fp, ip, lr}" { target arm*-*-uclinuxfdpiceabi } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, r9, fp, ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */
index 289eca0f6406bb73b029b9307cdcca6e047bcfb2..5be1f1612ac1fc1e1486df1cad0b4782d5140246 100644 (file)
@@ -15,5 +15,7 @@ void test()
   foo = 0;
 }
 
-/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, ip, lr}" } } */
-/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, pc}\\^" } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, ip, lr}" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, r6, r9, ip, lr}" { target arm*-*-uclinuxfdpiceabi } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, r6, r9, ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */
index cad903b0cf2904969355022a7850fb8381bb3ddd..cd84c4283bd0ab107d0384f63f1dfda30fc54ed0 100644 (file)
@@ -11,4 +11,5 @@ void __attribute__ ((interrupt ("IRQ"))) dm3730_IRQHandler(void)
 {
     prints("IRQ" );
 }
-/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, ip, pc}\\^" } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, ip, pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r9, ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */