arch: Eliminate an unused pair of constants from isa_traits.hh.

The one questionable use of CurThreadInfoImplemented (always false) and
CurThreadInfoReg (always -1) has been eliminated, making these constants
unnecessary.

Change-Id: Ibfe4f7be7ce5aaf9c5e896146e1b05b3ac752305
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32922
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/arch/arm/isa_traits.hh b/src/arch/arm/isa_traits.hh
index c9b6eb997f8c06da26eaf61895acee400bff3061..0ce38bcc9d69a201bf2bb5ef42ab2a0c0c74226d 100644 (file)
--- a/src/arch/arm/isa_traits.hh
+++ b/src/arch/arm/isa_traits.hh
@@ -95,9 +95,6 @@ namespace ArmISA
     // Memory accesses cannot be unaligned
     const bool HasUnalignedMemAcc = true;
 
-    const bool CurThreadInfoImplemented = false;
-    const int CurThreadInfoReg = -1;
-
     enum InterruptTypes
     {
         INT_RST,

diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh
index 5d20f7cb6fd9f99a4cf6abae1d9bafed629387e3..9b44d8649216ca93d3f08bc1129ae88e90eddf0a 100644 (file)
--- a/src/arch/mips/isa_traits.hh
+++ b/src/arch/mips/isa_traits.hh
@@ -138,9 +138,6 @@ const uint32_t ITOUCH_ANNOTE = 0xffffffff;
 
 const bool HasUnalignedMemAcc = true;
 
-const bool CurThreadInfoImplemented = false;
-const int CurThreadInfoReg = -1;
-
 } // namespace MipsISA
 
 #endif // __ARCH_MIPS_ISA_TRAITS_HH__

diff --git a/src/arch/power/isa_traits.hh b/src/arch/power/isa_traits.hh
index 25499ffe92abea5fc745cb4f90f2c99341e954b7..89bfa6bb5abe1c01f388e3f26a2aaa830baa82a6 100644 (file)
--- a/src/arch/power/isa_traits.hh
+++ b/src/arch/power/isa_traits.hh
@@ -57,9 +57,6 @@ const int MachineBytes = 4;
 // Memory accesses can be unaligned
 const bool HasUnalignedMemAcc = true;
 
-const bool CurThreadInfoImplemented = false;
-const int CurThreadInfoReg = -1;
-
 } // namespace PowerISA
 
 #endif // __ARCH_POWER_ISA_TRAITS_HH__

diff --git a/src/arch/riscv/isa_traits.hh b/src/arch/riscv/isa_traits.hh
index 18cf485131928e0346fa71e14b259d2552869bae..8ba2e0cdc07a6adde195120bd4a1ff9c211b59e3 100644 (file)
--- a/src/arch/riscv/isa_traits.hh
+++ b/src/arch/riscv/isa_traits.hh
@@ -57,9 +57,6 @@ const Addr PageBytes = ULL(1) << PageShift;
 // Memory accesses can be unaligned (at least for double-word memory accesses)
 const bool HasUnalignedMemAcc = true;
 
-const bool CurThreadInfoImplemented = false;
-const int CurThreadInfoReg = -1;
-
 }
 
 #endif //__ARCH_RISCV_ISA_TRAITS_HH__

diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index 3cd621607f93d2d3c5ee699ac8f77c1feb086770..79891076262fcd0749785b0dbcbd7401130a5ec0 100644 (file)
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -47,9 +47,6 @@ StaticInstPtr decodeInst(ExtMachInst);
 // Memory accesses cannot be unaligned
 const bool HasUnalignedMemAcc = false;
 
-const bool CurThreadInfoImplemented = false;
-const int CurThreadInfoReg = -1;
-
 }
 
 #endif // __ARCH_SPARC_ISA_TRAITS_HH__

diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh
index 7f55145c3793c29ff982411f2dcd106034d2e08e..98a2dc843ddf3cfe63db26e7d1e4d82b0cf2af2c 100644 (file)
--- a/src/arch/x86/isa_traits.hh
+++ b/src/arch/x86/isa_traits.hh
@@ -52,9 +52,6 @@ namespace X86ISA
 
     // Memory accesses can be unaligned
     const bool HasUnalignedMemAcc = true;
-
-    const bool CurThreadInfoImplemented = false;
-    const int CurThreadInfoReg = -1;
 }
 
 #endif // __ARCH_X86_ISATRAITS_HH__