(no commit message)

diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn
index bcada5b52c53cbca9814673114f92e99ef712384..eab4c99ba5271b47613dadf5b7c294176360f91d 100644 (file)
--- a/openpower/sv/svp64.mdwn
+++ b/openpower/sv/svp64.mdwn
@@ -223,7 +223,7 @@ than the normal 0..VL-1
 * **N** sets signed/unsigned saturation.
 **RC1** as if Rc=1, stores CRs *but not the result*
 
-For LD/ST Modes, see and [[sv/ldst]].  Immediate and Indexed LD/ST
+For LD/ST Modes, see [[sv/ldst]].  For Branch modes, see [[sv/branch]] Immediate and Indexed LD/ST
 are both different, in order to support a large range of features
 normally found in Vector ISAs.